+++ /dev/null
-From d4545ecab2075a980797c181279ea196e4bc60e7 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Wed, 31 Jan 2024 12:37:31 +0530
-Subject: arm64: dts: qcom: sm6115: Fix UFS PHY clocks
-
-From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-
-[ Upstream commit a820a285ef1b7c7fd94055bbb114c0413c04b96b ]
-
-QMP PHY used in SM6115 requires 3 clocks:
-
-* ref - 19.2MHz reference clock from RPM
-* ref_aux - Auxiliary reference clock from GCC
-* qref - QREF clock from GCC
-
-Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi")
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-8-58a49d2f4605@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sm6115.dtsi | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
-index 87cbc4e8b1ed5..442c821fc18d9 100644
---- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
-@@ -1040,8 +1040,12 @@ ufs_mem_phy: phy@4807000 {
- #size-cells = <2>;
- ranges;
-
-- clocks = <&gcc GCC_UFS_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
-- clock-names = "ref", "ref_aux";
-+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
-+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
-+ <&gcc GCC_UFS_CLKREF_CLK>;
-+ clock-names = "ref",
-+ "ref_aux",
-+ "qref";
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
---
-2.43.0
-
arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch
-arm64-dts-qcom-sm6115-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm6125-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm6350-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8150-switch-ufs-qmp-phy-to-new-styl.patch
+++ /dev/null
-From 56accb7a1df77daabd2beeac8ede4469d30d784b Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Wed, 31 Jan 2024 12:37:31 +0530
-Subject: arm64: dts: qcom: sm6115: Fix UFS PHY clocks
-
-From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-
-[ Upstream commit a820a285ef1b7c7fd94055bbb114c0413c04b96b ]
-
-QMP PHY used in SM6115 requires 3 clocks:
-
-* ref - 19.2MHz reference clock from RPM
-* ref_aux - Auxiliary reference clock from GCC
-* qref - QREF clock from GCC
-
-Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi")
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-8-58a49d2f4605@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sm6115.dtsi | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
-index 87cbc4e8b1ed5..442c821fc18d9 100644
---- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
-@@ -1040,8 +1040,12 @@ ufs_mem_phy: phy@4807000 {
- #size-cells = <2>;
- ranges;
-
-- clocks = <&gcc GCC_UFS_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
-- clock-names = "ref", "ref_aux";
-+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
-+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
-+ <&gcc GCC_UFS_CLKREF_CLK>;
-+ clock-names = "ref",
-+ "ref_aux",
-+ "qref";
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
---
-2.43.0
-
arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch
-arm64-dts-qcom-sm6115-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm6125-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm6350-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8150-switch-ufs-qmp-phy-to-new-styl.patch
+++ /dev/null
-From 9b3676bb66eaf5cf80bea43080add0b435aceb65 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Wed, 31 Jan 2024 12:37:31 +0530
-Subject: arm64: dts: qcom: sm6115: Fix UFS PHY clocks
-
-From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-
-[ Upstream commit a820a285ef1b7c7fd94055bbb114c0413c04b96b ]
-
-QMP PHY used in SM6115 requires 3 clocks:
-
-* ref - 19.2MHz reference clock from RPM
-* ref_aux - Auxiliary reference clock from GCC
-* qref - QREF clock from GCC
-
-Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi")
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-8-58a49d2f4605@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sm6115.dtsi | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
-index b627c473ffa54..4808982659eda 100644
---- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
-@@ -1201,8 +1201,12 @@ ufs_mem_phy: phy@4807000 {
- compatible = "qcom,sm6115-qmp-ufs-phy";
- reg = <0x0 0x04807000 0x0 0x1000>;
-
-- clocks = <&gcc GCC_UFS_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
-- clock-names = "ref", "ref_aux";
-+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
-+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
-+ <&gcc GCC_UFS_CLKREF_CLK>;
-+ clock-names = "ref",
-+ "ref_aux",
-+ "qref";
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
---
-2.43.0
-
arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch
-arm64-dts-qcom-sm6115-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm6125-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm6350-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8150-fix-ufs-phy-clocks.patch