s390: arch15: Vector generate element masks

Add instruction vgem and vector builtins
vec_gen_element_masks_{8,16,32,64,128}.

gcc/ChangeLog:

	* config/s390/s390-builtins.def (s390_vec_gen_element_masks_128): Add.
	(s390_vgemb): Add.
	(s390_vgemh): Add.
	(s390_vgemf): Add.
	(s390_vgemg): Add.
	(s390_vgemq): Add.
	* config/s390/s390-builtin-types.def: Update accordingly.
	* config/s390/s390.md (UNSPEC_VEC_VGEM): Add.
	* config/s390/vecintrin.h (vec_gen_element_masks_8): Define.
	(vec_gen_element_masks_16): Define.
	(vec_gen_element_masks_32): Define.
	(vec_gen_element_masks_64): Define.
	(vec_gen_element_masks_128): Define.
	* config/s390/vx-builtins.md (vgemv16qi): Add.
	(vgem<mode>): Add.

diff --git a/gcc/config/s390/s390-builtin-types.def b/gcc/config/s390/s390-builtin-types.def
index 1d361c27f63d4a36092cc0629c12c56adb7148e9..f056183930922f5e5bbecc7408adf776940b7e04 100644 (file)
--- a/gcc/config/s390/s390-builtin-types.def
+++ b/gcc/config/s390/s390-builtin-types.def
@@ -143,20 +143,25 @@ DEF_FN_TYPE_1 (BT_FN_OV4SI_INT, BT_OV4SI, BT_INT)
 DEF_FN_TYPE_1 (BT_FN_OV4SI_INTCONSTPTR, BT_OV4SI, BT_INTCONSTPTR)
 DEF_FN_TYPE_1 (BT_FN_OV4SI_OV4SI, BT_OV4SI, BT_OV4SI)
 DEF_FN_TYPE_1 (BT_FN_UINT128_UINT128, BT_UINT128, BT_UINT128)
+DEF_FN_TYPE_1 (BT_FN_UINT128_UV16QI, BT_UINT128, BT_UV16QI)
 DEF_FN_TYPE_1 (BT_FN_UINT128_UV2DI, BT_UINT128, BT_UV2DI)
 DEF_FN_TYPE_1 (BT_FN_UV16QI_UCHAR, BT_UV16QI, BT_UCHAR)
 DEF_FN_TYPE_1 (BT_FN_UV16QI_UCHARCONSTPTR, BT_UV16QI, BT_UCHARCONSTPTR)
 DEF_FN_TYPE_1 (BT_FN_UV16QI_USHORT, BT_UV16QI, BT_USHORT)
 DEF_FN_TYPE_1 (BT_FN_UV16QI_UV16QI, BT_UV16QI, BT_UV16QI)
+DEF_FN_TYPE_1 (BT_FN_UV16QI_UV8HI, BT_UV16QI, BT_UV8HI)
+DEF_FN_TYPE_1 (BT_FN_UV1TI_UV16QI, BT_UV1TI, BT_UV16QI)
 DEF_FN_TYPE_1 (BT_FN_UV2DI_ULONGLONG, BT_UV2DI, BT_ULONGLONG)
 DEF_FN_TYPE_1 (BT_FN_UV2DI_ULONGLONGCONSTPTR, BT_UV2DI, BT_ULONGLONGCONSTPTR)
 DEF_FN_TYPE_1 (BT_FN_UV2DI_USHORT, BT_UV2DI, BT_USHORT)
+DEF_FN_TYPE_1 (BT_FN_UV2DI_UV16QI, BT_UV2DI, BT_UV16QI)
 DEF_FN_TYPE_1 (BT_FN_UV2DI_UV2DI, BT_UV2DI, BT_UV2DI)
 DEF_FN_TYPE_1 (BT_FN_UV2DI_UV4SI, BT_UV2DI, BT_UV4SI)
 DEF_FN_TYPE_1 (BT_FN_UV2DI_V2DF, BT_UV2DI, BT_V2DF)
 DEF_FN_TYPE_1 (BT_FN_UV4SI_UINT, BT_UV4SI, BT_UINT)
 DEF_FN_TYPE_1 (BT_FN_UV4SI_UINTCONSTPTR, BT_UV4SI, BT_UINTCONSTPTR)
 DEF_FN_TYPE_1 (BT_FN_UV4SI_USHORT, BT_UV4SI, BT_USHORT)
+DEF_FN_TYPE_1 (BT_FN_UV4SI_UV16QI, BT_UV4SI, BT_UV16QI)
 DEF_FN_TYPE_1 (BT_FN_UV4SI_UV4SI, BT_UV4SI, BT_UV4SI)
 DEF_FN_TYPE_1 (BT_FN_UV4SI_UV8HI, BT_UV4SI, BT_UV8HI)
 DEF_FN_TYPE_1 (BT_FN_UV4SI_V4SF, BT_UV4SI, BT_V4SF)

diff --git a/gcc/config/s390/s390-builtins.def b/gcc/config/s390/s390-builtins.def
index 9e861b122f3d23a144aa0ae8a571eb908e9b3909..2cf443f6cdbacbc107bdb30083e802b2a0ae1baa 100644 (file)
--- a/gcc/config/s390/s390-builtins.def
+++ b/gcc/config/s390/s390-builtins.def
@@ -3213,3 +3213,11 @@ OB_DEF_VAR (s390_vec_evaluate_b128,     s390_veval,         0,
 OB_DEF_VAR (s390_vec_evaluate_u128,     s390_veval,         0,                  O4_U8,              BT_OV_UV1TI_UV1TI_UV1TI_UV1TI_INT)        /* veval */
 
 B_DEF      (s390_veval,                 vevalv16qi,         0,                  B_VXE3,             O4_U8,              BT_FN_UV16QI_UV16QI_UV16QI_UV16QI_INT)
+
+B_DEF      (s390_vec_gen_element_masks_128,vgemti,          0,                  B_VXE3,             0,                  BT_FN_UV1TI_UV16QI)
+
+B_DEF      (s390_vgemb,                 vgemv16qi,          0,                  B_VXE3,             0,                  BT_FN_UV16QI_UV8HI)
+B_DEF      (s390_vgemh,                 vgemv8hi,           0,                  B_VXE3,             0,                  BT_FN_UV8HI_UV16QI)
+B_DEF      (s390_vgemf,                 vgemv4si,           0,                  B_VXE3,             0,                  BT_FN_UV4SI_UV16QI)
+B_DEF      (s390_vgemg,                 vgemv2di,           0,                  B_VXE3,             0,                  BT_FN_UV2DI_UV16QI)
+B_DEF      (s390_vgemq,                 vgemti,             0,                  B_VXE3,             0,                  BT_FN_UINT128_UV16QI)

diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 53c4170ee46ef38bf507d5754b09fdd0dc92e7da..7b5b9709f56e9f74c9e3c83a4170c233e7e0cc9a 100644 (file)
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -246,6 +246,7 @@
 
    UNSPEC_VEC_VBLEND
    UNSPEC_VEC_VEVAL
+   UNSPEC_VEC_VGEM
 
    UNSPEC_TF_TO_FPRX2
 

diff --git a/gcc/config/s390/vecintrin.h b/gcc/config/s390/vecintrin.h
index 01aedc6f082c09b8ef963c5708c4fc261c74c298..b804eeddba6a98c1dcb4adfb59f795684a7f9f84 100644 (file)
--- a/gcc/config/s390/vecintrin.h
+++ b/gcc/config/s390/vecintrin.h
@@ -170,6 +170,12 @@ __lcbb(const void *ptr, int bndry)
 #define vec_convert_to_fp16 __builtin_s390_vcfn
 #define vec_convert_from_fp16 __builtin_s390_vcnf
 
+#define vec_gen_element_masks_8 __builtin_s390_vgemb
+#define vec_gen_element_masks_16 __builtin_s390_vgemh
+#define vec_gen_element_masks_32 __builtin_s390_vgemf
+#define vec_gen_element_masks_64 __builtin_s390_vgemg
+#define vec_gen_element_masks_128 __builtin_s390_vec_gen_element_masks_128
+
 #define vec_abs __builtin_s390_vec_abs
 #define vec_add_u128 __builtin_s390_vec_add_u128
 #define vec_addc __builtin_s390_vec_addc

diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md
index 9b0ebd31eaa6f52c432892264a863e26096c0ec9..c332e025b2aeacdaafe58121e577b44ad83fa1e2 100644 (file)
--- a/gcc/config/s390/vx-builtins.md
+++ b/gcc/config/s390/vx-builtins.md
@@ -2280,3 +2280,21 @@
   "TARGET_VXE3"
   "vblend<bhfgq>\t%v0,%v1,%v2,%v3"
   [(set_attr "op_type" "VRR")])
+
+; vgemb
+(define_insn "vgemv16qi"
+  [(set (match_operand:V16QI 0 "register_operand" "=v")
+       (unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v")]
+                     UNSPEC_VEC_VGEM))]
+  "TARGET_VXE3"
+  "vgemb\t%v0,%v1"
+  [(set_attr "op_type" "VRR")])
+
+; vgemh, vgemf, vgemg, vgemq
+(define_insn "vgem<mode>"
+  [(set (match_operand:VI_HW_HSDT 0 "register_operand" "=v")
+       (unspec:VI_HW_HSDT [(match_operand:V16QI 1 "register_operand" "v")]
+                          UNSPEC_VEC_VGEM))]
+  "TARGET_VXE3"
+  "vgem<bhfgq>\t%v0,%v1"
+  [(set_attr "op_type" "VRR")])