+++ /dev/null
-From 1154c3a467b6aa7ffbef75370e18c4c3cfff3141 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Wed, 31 Jan 2024 12:37:37 +0530
-Subject: arm64: dts: qcom: sc8280xp: Fix UFS PHY clocks
-
-From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-
-[ Upstream commit 1d4ef9644e219202ed89ac42f3e1defebcab9c7d ]
-
-QMP PHY used in SC8280XP requires 3 clocks:
-
-* ref - 19.2MHz reference clock from RPMh
-* ref_aux - Auxiliary reference clock from GCC
-* qref - QREF clock from GCC
-
-Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
-Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-14-58a49d2f4605@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 18 ++++++++++++------
- 1 file changed, 12 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
-index 88140ce104a44..57937fdd1e790 100644
---- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
-@@ -889,9 +889,12 @@ ufs_mem_phy: phy@1d87000 {
- compatible = "qcom,sc8280xp-qmp-ufs-phy";
- reg = <0 0x01d87000 0 0x1000>;
-
-- clocks = <&gcc GCC_UFS_CARD_CLKREF_CLK>,
-- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
-- clock-names = "ref", "ref_aux";
-+ clocks = <&rpmhcc RPMH_CXO_CLK>,
-+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
-+ <&gcc GCC_UFS_CARD_CLKREF_CLK>;
-+ clock-names = "ref",
-+ "ref_aux",
-+ "qref";
-
- power-domains = <&gcc UFS_PHY_GDSC>;
-
-@@ -951,9 +954,12 @@ ufs_card_phy: phy@1da7000 {
- compatible = "qcom,sc8280xp-qmp-ufs-phy";
- reg = <0 0x01da7000 0 0x1000>;
-
-- clocks = <&gcc GCC_UFS_1_CARD_CLKREF_CLK>,
-- <&gcc GCC_UFS_CARD_PHY_AUX_CLK>;
-- clock-names = "ref", "ref_aux";
-+ clocks = <&rpmhcc RPMH_CXO_CLK>,
-+ <&gcc GCC_UFS_CARD_PHY_AUX_CLK>,
-+ <&gcc GCC_UFS_1_CARD_CLKREF_CLK>;
-+ clock-names = "ref",
-+ "ref_aux",
-+ "qref";
-
- power-domains = <&gcc UFS_CARD_GDSC>;
-
---
-2.43.0
-
arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sc8280xp-update-ufs-phy-nodes.patch
-arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch
printk-disable-passing-console-lock-owner-completely.patch
pwm-sti-fix-capture-for-st-pwm-num-chan-st-capture-n.patch
tools-resolve_btfids-refactor-set-sorting-with-types.patch
+++ /dev/null
-From 1ba174627e2f7a08614d663d0fc669f563d02110 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Wed, 31 Jan 2024 12:37:37 +0530
-Subject: arm64: dts: qcom: sc8280xp: Fix UFS PHY clocks
-
-From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-
-[ Upstream commit 1d4ef9644e219202ed89ac42f3e1defebcab9c7d ]
-
-QMP PHY used in SC8280XP requires 3 clocks:
-
-* ref - 19.2MHz reference clock from RPMh
-* ref_aux - Auxiliary reference clock from GCC
-* qref - QREF clock from GCC
-
-Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
-Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-14-58a49d2f4605@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 18 ++++++++++++------
- 1 file changed, 12 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
-index b8081513176ac..8732a510245c8 100644
---- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
-@@ -2256,9 +2256,12 @@ ufs_mem_phy: phy@1d87000 {
- compatible = "qcom,sc8280xp-qmp-ufs-phy";
- reg = <0 0x01d87000 0 0x1000>;
-
-- clocks = <&gcc GCC_UFS_CARD_CLKREF_CLK>,
-- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
-- clock-names = "ref", "ref_aux";
-+ clocks = <&rpmhcc RPMH_CXO_CLK>,
-+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
-+ <&gcc GCC_UFS_CARD_CLKREF_CLK>;
-+ clock-names = "ref",
-+ "ref_aux",
-+ "qref";
-
- power-domains = <&gcc UFS_PHY_GDSC>;
-
-@@ -2318,9 +2321,12 @@ ufs_card_phy: phy@1da7000 {
- compatible = "qcom,sc8280xp-qmp-ufs-phy";
- reg = <0 0x01da7000 0 0x1000>;
-
-- clocks = <&gcc GCC_UFS_1_CARD_CLKREF_CLK>,
-- <&gcc GCC_UFS_CARD_PHY_AUX_CLK>;
-- clock-names = "ref", "ref_aux";
-+ clocks = <&rpmhcc RPMH_CXO_CLK>,
-+ <&gcc GCC_UFS_CARD_PHY_AUX_CLK>,
-+ <&gcc GCC_UFS_1_CARD_CLKREF_CLK>;
-+ clock-names = "ref",
-+ "ref_aux",
-+ "qref";
-
- power-domains = <&gcc UFS_CARD_GDSC>;
-
---
-2.43.0
-
arm64-dts-qcom-sm8150-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch
-arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8350-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8550-fix-ufs-phy-clocks.patch
+++ /dev/null
-From f96256045c7e5939008f0f7182934c2443150014 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Wed, 31 Jan 2024 12:37:37 +0530
-Subject: arm64: dts: qcom: sc8280xp: Fix UFS PHY clocks
-
-From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-
-[ Upstream commit 1d4ef9644e219202ed89ac42f3e1defebcab9c7d ]
-
-QMP PHY used in SC8280XP requires 3 clocks:
-
-* ref - 19.2MHz reference clock from RPMh
-* ref_aux - Auxiliary reference clock from GCC
-* qref - QREF clock from GCC
-
-Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
-Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-14-58a49d2f4605@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 18 ++++++++++++------
- 1 file changed, 12 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
-index b8081513176ac..8732a510245c8 100644
---- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
-@@ -2256,9 +2256,12 @@ ufs_mem_phy: phy@1d87000 {
- compatible = "qcom,sc8280xp-qmp-ufs-phy";
- reg = <0 0x01d87000 0 0x1000>;
-
-- clocks = <&gcc GCC_UFS_CARD_CLKREF_CLK>,
-- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
-- clock-names = "ref", "ref_aux";
-+ clocks = <&rpmhcc RPMH_CXO_CLK>,
-+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
-+ <&gcc GCC_UFS_CARD_CLKREF_CLK>;
-+ clock-names = "ref",
-+ "ref_aux",
-+ "qref";
-
- power-domains = <&gcc UFS_PHY_GDSC>;
-
-@@ -2318,9 +2321,12 @@ ufs_card_phy: phy@1da7000 {
- compatible = "qcom,sc8280xp-qmp-ufs-phy";
- reg = <0 0x01da7000 0 0x1000>;
-
-- clocks = <&gcc GCC_UFS_1_CARD_CLKREF_CLK>,
-- <&gcc GCC_UFS_CARD_PHY_AUX_CLK>;
-- clock-names = "ref", "ref_aux";
-+ clocks = <&rpmhcc RPMH_CXO_CLK>,
-+ <&gcc GCC_UFS_CARD_PHY_AUX_CLK>,
-+ <&gcc GCC_UFS_1_CARD_CLKREF_CLK>;
-+ clock-names = "ref",
-+ "ref_aux",
-+ "qref";
-
- power-domains = <&gcc UFS_CARD_GDSC>;
-
---
-2.43.0
-
arm64-dts-qcom-sm8150-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch
-arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8350-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8550-fix-ufs-phy-clocks.patch
+++ /dev/null
-From ded687f305f7c8f497b2f71fd79cc0644d622ffc Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Wed, 31 Jan 2024 12:37:37 +0530
-Subject: arm64: dts: qcom: sc8280xp: Fix UFS PHY clocks
-
-From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-
-[ Upstream commit 1d4ef9644e219202ed89ac42f3e1defebcab9c7d ]
-
-QMP PHY used in SC8280XP requires 3 clocks:
-
-* ref - 19.2MHz reference clock from RPMh
-* ref_aux - Auxiliary reference clock from GCC
-* qref - QREF clock from GCC
-
-Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
-Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-14-58a49d2f4605@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 18 ++++++++++++------
- 1 file changed, 12 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
-index febf28356ff8b..bb0786ab2864d 100644
---- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
-@@ -2257,9 +2257,12 @@ ufs_mem_phy: phy@1d87000 {
- compatible = "qcom,sc8280xp-qmp-ufs-phy";
- reg = <0 0x01d87000 0 0x1000>;
-
-- clocks = <&gcc GCC_UFS_CARD_CLKREF_CLK>,
-- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
-- clock-names = "ref", "ref_aux";
-+ clocks = <&rpmhcc RPMH_CXO_CLK>,
-+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
-+ <&gcc GCC_UFS_CARD_CLKREF_CLK>;
-+ clock-names = "ref",
-+ "ref_aux",
-+ "qref";
-
- power-domains = <&gcc UFS_PHY_GDSC>;
-
-@@ -2319,9 +2322,12 @@ ufs_card_phy: phy@1da7000 {
- compatible = "qcom,sc8280xp-qmp-ufs-phy";
- reg = <0 0x01da7000 0 0x1000>;
-
-- clocks = <&gcc GCC_UFS_1_CARD_CLKREF_CLK>,
-- <&gcc GCC_UFS_CARD_PHY_AUX_CLK>;
-- clock-names = "ref", "ref_aux";
-+ clocks = <&rpmhcc RPMH_CXO_CLK>,
-+ <&gcc GCC_UFS_CARD_PHY_AUX_CLK>,
-+ <&gcc GCC_UFS_1_CARD_CLKREF_CLK>;
-+ clock-names = "ref",
-+ "ref_aux",
-+ "qref";
-
- power-domains = <&gcc UFS_CARD_GDSC>;
-
---
-2.43.0
-
arm64-dts-qcom-sm6350-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8150-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch
-arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8350-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8550-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8650-fix-ufs-phy-clocks.patch