]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
Enable instruction fusion of AES instructions on ARM for Cortex-A53 and
authorwilco <wilco@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 10 Feb 2016 12:36:03 +0000 (12:36 +0000)
committerwilco <wilco@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 10 Feb 2016 12:36:03 +0000 (12:36 +0000)
Cortex-A57.

    gcc/
        * config/arm/arm.c (arm_cortex_a53_tune): Enable AES fusion.
        (arm_cortex_a57_tune): Likewise.
        (aarch_macro_fusion_pair_p): Add support for AES fusion.
        * config/arm/arm-protos.h (fuse_ops): Add FUSE_AES_AESMC

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@233266 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/arm/arm-protos.h
gcc/config/arm/arm.c

index 70290d9aabb82fc42d29aba54cea78642be7b3ba..42e89c7dc22a343fbb31cbc36448815c2c90b63e 100644 (file)
@@ -1,3 +1,10 @@
+2016-02-10  Wilco Dijkstra  <wdijkstr@arm.com>
+
+       * config/arm/arm.c (arm_cortex_a53_tune): Enable AES fusion.
+       (arm_cortex_a57_tune): Likewise.
+       (aarch_macro_fusion_pair_p): Add support for AES fusion.
+       * config/arm/arm-protos.h (fuse_ops): Add FUSE_AES_AESMC.
+
 2016-02-10  Eric Botcazou  <ebotcazou@adacore.com>
 
        * timevar.def (TV_PHASE_DBGINFO): Delete.
index e051d3b03ecb4325c50ff2909f7229da9339b6b7..0083673b161a49e19388c72d3a413aeb481dbfa3 100644 (file)
@@ -300,8 +300,9 @@ struct tune_params
   enum fuse_ops
   {
     FUSE_NOTHING   = 0,
-    FUSE_MOVW_MOVT = 1 << 0
-  } fusible_ops: 1;
+    FUSE_MOVW_MOVT = 1 << 0,
+    FUSE_AES_AESMC = 1 << 1
+  } fusible_ops: 2;
   /* Depth of scheduling queue to check for L2 autoprefetcher.  */
   enum {SCHED_AUTOPREF_OFF, SCHED_AUTOPREF_RANK, SCHED_AUTOPREF_FULL}
     sched_autopref: 2;
index 27aecf7d1a423848722b7c880370325f63ac1b88..82becef22308e036bbf7b0de2df4801146a627e4 100644 (file)
@@ -1982,7 +1982,7 @@ const struct tune_params arm_cortex_a53_tune =
   tune_params::DISPARAGE_FLAGS_NEITHER,
   tune_params::PREF_NEON_64_FALSE,
   tune_params::PREF_NEON_STRINGOPS_TRUE,
-  FUSE_OPS (tune_params::FUSE_MOVW_MOVT),
+  FUSE_OPS (tune_params::FUSE_MOVW_MOVT | tune_params::FUSE_AES_AESMC),
   tune_params::SCHED_AUTOPREF_OFF
 };
 
@@ -2005,7 +2005,7 @@ const struct tune_params arm_cortex_a57_tune =
   tune_params::DISPARAGE_FLAGS_ALL,
   tune_params::PREF_NEON_64_FALSE,
   tune_params::PREF_NEON_STRINGOPS_TRUE,
-  FUSE_OPS (tune_params::FUSE_MOVW_MOVT),
+  FUSE_OPS (tune_params::FUSE_MOVW_MOVT | tune_params::FUSE_AES_AESMC),
   tune_params::SCHED_AUTOPREF_FULL
 };
 
@@ -29683,6 +29683,10 @@ aarch_macro_fusion_pair_p (rtx_insn* prev, rtx_insn* curr)
   if (!arm_macro_fusion_p ())
     return false;
 
+  if (current_tune->fusible_ops & tune_params::FUSE_AES_AESMC
+      && aarch_crypto_can_dual_issue (prev, curr))
+    return true;
+
   if (current_tune->fusible_ops & tune_params::FUSE_MOVW_MOVT)
     {
       /* We are trying to fuse