--- /dev/null
+From lrodriguez@atheros.com Tue Apr 28 19:16:36 2009
+From: "Luis R. Rodriguez" <lrodriguez@atheros.com>
+Date: Mon, 23 Mar 2009 19:03:30 -0400
+Subject: ath9k: AR9280 PCI devices must serialize IO as well
+To: stable@kernel.org
+Cc: "Luis R. Rodriguez" <lrodriguez@atheros.com>, ath9k-devel@venema.h4ckr.net, linux-wireless@vger.kernel.org
+Message-ID: <1237849410-17314-2-git-send-email-lrodriguez@atheros.com>
+
+From: Luis R. Rodriguez <lrodriguez@atheros.com>
+
+This is a port of:
+commit SHA1 5ec905a8df3fa877566ba98298433fbfb3d688cc
+for 2.6.27
+
+Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+---
+ drivers/net/wireless/ath9k/hw.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/wireless/ath9k/hw.c
++++ b/drivers/net/wireless/ath9k/hw.c
+@@ -3313,7 +3313,8 @@ static struct ath_hal *ath9k_hw_do_attac
+ }
+
+ if (ah->ah_config.serialize_regmode == SER_REG_MODE_AUTO) {
+- if (ah->ah_macVersion == AR_SREV_VERSION_5416_PCI) {
++ if (ah->ah_macVersion == AR_SREV_VERSION_5416_PCI ||
++ (AR_SREV_9280(ah) && !ah->ah_isPciExpress)) {
+ ah->ah_config.serialize_regmode =
+ SER_REG_MODE_ON;
+ } else {
--- /dev/null
+From lrodriguez@atheros.com Tue Apr 28 19:16:18 2009
+From: "Luis R. Rodriguez" <lrodriguez@atheros.com>
+Date: Mon, 23 Mar 2009 19:03:29 -0400
+Subject: ath9k: implement IO serialization
+To: stable@kernel.org
+Cc: "Luis R. Rodriguez" <lrodriguez@atheros.com>, ath9k-devel@venema.h4ckr.net, linux-wireless@vger.kernel.org
+Message-ID: <1237849410-17314-1-git-send-email-lrodriguez@atheros.com>
+
+From: Luis R. Rodriguez <lrodriguez@atheros.com>
+
+This is a port of:
+commit SHA1 6158425be398936af1fd04451f78ffad01529cb0
+for 2.6.27
+
+All 802.11n PCI devices (Cardbus, PCI, mini-PCI) require
+serialization of IO when on non-uniprocessor systems. PCI
+express devices not not require this.
+
+This should fix our only last standing open ath9k kernel.org
+bugzilla bug report:
+
+http://bugzilla.kernel.org/show_bug.cgi?id=12110
+
+Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+---
+ drivers/net/wireless/ath9k/ath9k.h | 4 ++--
+ drivers/net/wireless/ath9k/core.c | 1 +
+ drivers/net/wireless/ath9k/core.h | 33 +++++++++++++++++++++++++++++++++
+ drivers/net/wireless/ath9k/hw.c | 19 +++++++++++++++++++
+ 4 files changed, 55 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/wireless/ath9k/ath9k.h
++++ b/drivers/net/wireless/ath9k/ath9k.h
+@@ -591,8 +591,8 @@ struct ath9k_country_entry {
+ u8 iso[3];
+ };
+
+-#define REG_WRITE(_ah, _reg, _val) iowrite32(_val, _ah->ah_sh + _reg)
+-#define REG_READ(_ah, _reg) ioread32(_ah->ah_sh + _reg)
++#define REG_WRITE(_ah, _reg, _val) ath9k_iowrite32((_ah), (_reg), (_val))
++#define REG_READ(_ah, _reg) ath9k_ioread32((_ah), (_reg))
+
+ #define SM(_v, _f) (((_v) << _f##_S) & _f)
+ #define MS(_v, _f) (((_v) & _f) >> _f##_S)
+--- a/drivers/net/wireless/ath9k/core.c
++++ b/drivers/net/wireless/ath9k/core.c
+@@ -1120,6 +1120,7 @@ int ath_init(u16 devid, struct ath_softc
+ sc->sc_cachelsz = csz << 2; /* convert to bytes */
+
+ spin_lock_init(&sc->sc_resetlock);
++ spin_lock_init(&sc->sc_serial_rw);
+
+ ah = ath9k_hw_attach(devid, sc, sc->mem, &status);
+ if (ah == NULL) {
+--- a/drivers/net/wireless/ath9k/core.h
++++ b/drivers/net/wireless/ath9k/core.h
+@@ -1022,6 +1022,7 @@ struct ath_softc {
+ spinlock_t sc_rxbuflock;
+ spinlock_t sc_txbuflock;
+ spinlock_t sc_resetlock;
++ spinlock_t sc_serial_rw;
+ spinlock_t node_lock;
+ };
+
+@@ -1069,4 +1070,36 @@ void ath_skb_unmap_single(struct ath_sof
+ void ath_mcast_merge(struct ath_softc *sc, u32 mfilt[2]);
+ enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc);
+
++/*
++ * Read and write, they both share the same lock. We do this to serialize
++ * reads and writes on Atheros 802.11n PCI devices only. This is required
++ * as the FIFO on these devices can only accept sanely 2 requests. After
++ * that the device goes bananas. Serializing the reads/writes prevents this
++ * from happening.
++ */
++
++static inline void ath9k_iowrite32(struct ath_hal *ah, u32 reg_offset, u32 val)
++{
++ if (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) {
++ unsigned long flags;
++ spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
++ iowrite32(val, ah->ah_sc->mem + reg_offset);
++ spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
++ } else
++ iowrite32(val, ah->ah_sc->mem + reg_offset);
++}
++
++static inline unsigned int ath9k_ioread32(struct ath_hal *ah, u32 reg_offset)
++{
++ u32 val;
++ if (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) {
++ unsigned long flags;
++ spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
++ val = ioread32(ah->ah_sc->mem + reg_offset);
++ spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
++ } else
++ val = ioread32(ah->ah_sc->mem + reg_offset);
++ return val;
++}
++
+ #endif /* CORE_H */
+--- a/drivers/net/wireless/ath9k/hw.c
++++ b/drivers/net/wireless/ath9k/hw.c
+@@ -369,6 +369,25 @@ static void ath9k_hw_set_defaults(struct
+ }
+
+ ah->ah_config.intr_mitigation = 0;
++
++ /*
++ * We need this for PCI devices only (Cardbus, PCI, miniPCI)
++ * _and_ if on non-uniprocessor systems (Multiprocessor/HT).
++ * This means we use it for all AR5416 devices, and the few
++ * minor PCI AR9280 devices out there.
++ *
++ * Serialization is required because these devices do not handle
++ * well the case of two concurrent reads/writes due to the latency
++ * involved. During one read/write another read/write can be issued
++ * on another CPU while the previous read/write may still be working
++ * on our hardware, if we hit this case the hardware poops in a loop.
++ * We prevent this by serializing reads and writes.
++ *
++ * This issue is not present on PCI-Express devices or pre-AR5416
++ * devices (legacy, 802.11abg).
++ */
++ if (num_possible_cpus() > 1)
++ ah->ah_config.serialize_regmode = SER_REG_MODE_AUTO;
+ }
+
+ static inline void ath9k_hw_override_ini(struct ath_hal *ah,
projects / thirdparty / kernel / stable-queue.git / commitdiff
