Typechecker cleanups (non-functional changes)

git-svn-id: svn://svn.valgrind.org/vex/trunk@1384

diff --git a/VEX/priv/guest-amd64/toIR.c b/VEX/priv/guest-amd64/toIR.c
index 13c5f955518d90710353431da28715560d0e503a..a7f1a1fdca89e51cd1a16796e32e005fdfaae476 100644 (file)
--- a/VEX/priv/guest-amd64/toIR.c
+++ b/VEX/priv/guest-amd64/toIR.c
@@ -5387,7 +5387,7 @@ ULong dis_FPU ( /*OUT*/Bool* decode_ok,
 
             case 0xD0 ... 0xD7: /* FST %st(0),%st(?) */
                r_dst = (UInt)modrm - 0xD0;
-               DIP("fst %%st(0),%%st(%d)\n", r_dst);
+               DIP("fst %%st(0),%%st(%u)\n", r_dst);
                /* P4 manual says: "If the destination operand is a
                   non-empty register, the invalid-operation exception
                   is not generated.  Hence put_ST_UNCHECKED. */

diff --git a/VEX/priv/guest-ppc32/ghelpers.c b/VEX/priv/guest-ppc32/ghelpers.c
index d5b97eb313c89c687a4442bebd06e32921bc0299..cd29e352b1911bd6e6e895c17b5df7ebf3fb9e9d 100644 (file)
--- a/VEX/priv/guest-ppc32/ghelpers.c
+++ b/VEX/priv/guest-ppc32/ghelpers.c
@@ -141,8 +141,8 @@ void LibVEX_GuestPPC32_put_CR ( UInt cr_native,
 #  define FIELD(_n)                                           \
       do {                                                    \
          t = cr_native >> (4*(7-(_n)));                       \
-         vex_state->guest_CR##_n##_0 = (UChar)(t & 1);        \
-         vex_state->guest_CR##_n##_321 = (UChar)(t & (7<<1)); \
+         vex_state->guest_CR##_n##_0 = toUChar(t & 1);        \
+         vex_state->guest_CR##_n##_321 = toUChar(t & (7<<1)); \
       } while (0)
 
    FIELD(0);
@@ -174,10 +174,10 @@ UInt LibVEX_GuestPPC32_get_XER ( /*IN*/VexGuestPPC32State* vex_state )
 void LibVEX_GuestPPC32_put_XER ( UInt xer_native,
                                  /*OUT*/VexGuestPPC32State* vex_state )
 {
-   vex_state->guest_XER_BC = (UChar)(xer_native & 0xFF);
-   vex_state->guest_XER_SO = (UChar)((xer_native >> 31) & 0x1);
-   vex_state->guest_XER_OV = (UChar)((xer_native >> 30) & 0x1);
-   vex_state->guest_XER_CA = (UChar)((xer_native >> 29) & 0x1);
+   vex_state->guest_XER_BC = toUChar(xer_native & 0xFF);
+   vex_state->guest_XER_SO = toUChar((xer_native >> 31) & 0x1);
+   vex_state->guest_XER_OV = toUChar((xer_native >> 30) & 0x1);
+   vex_state->guest_XER_CA = toUChar((xer_native >> 29) & 0x1);
 }
 
 

diff --git a/VEX/priv/guest-ppc32/toIR.c b/VEX/priv/guest-ppc32/toIR.c
index 28d19c70141f9817427acfad20828cbf589daae8..b3b23e47b61baeeb40db7f3c8a026cb56b966b3b 100644 (file)
--- a/VEX/priv/guest-ppc32/toIR.c
+++ b/VEX/priv/guest-ppc32/toIR.c
@@ -776,7 +776,7 @@ static IRExpr* /* :: Ity_I32 */ getCRbit ( UInt bi )
       return binop( Iop_And32, 
                     binop( Iop_Shr32, 
                            unop(Iop_8Uto32, getCR321(n)),
-                           mkU8(3-off) ),
+                           mkU8(toUChar(3-off)) ),
                     mkU32(1) );
    }
 }
@@ -805,7 +805,7 @@ static void putCRbit ( UInt bi, IRExpr* bit )
                       binop(Iop_And32, unop(Iop_8Uto32, getCR321(n)),
                                        mkU32(~(1 << off))),
                       /* new value in the right place */
-                      binop(Iop_Shl32, safe, mkU8(off))
+                      binop(Iop_Shl32, safe, mkU8(toUChar(off)))
                )
          )
       );
@@ -879,7 +879,7 @@ static void putCRfields ( IRExpr* w32, UInt mask )
       if ((mask & (1 << (7-cr))) == 0)
          continue;
       t = newTemp(Ity_I32);
-      assign( t, binop(Iop_Shr32, w32, mkU8(4*(7-cr))) );
+      assign( t, binop(Iop_Shr32, w32, mkU8(toUChar(4*(7-cr)))) );
       putCR0( cr, unop(Iop_32to8, 
                        binop(Iop_And32, mkexpr(t), mkU32(1))) );
       putCR321( cr, unop(Iop_32to8,
@@ -999,7 +999,7 @@ static void set_XER_OV( UInt op, IRExpr* res,
          break;
 
       default: 
-         vex_printf("set_XER_OV: op = %d\n", op);
+         vex_printf("set_XER_OV: op = %u\n", op);
          vpanic("set_XER_OV(ppc32)");
    }
  
@@ -1136,7 +1136,7 @@ static void set_XER_CA( UInt op,
          break;
 
       default: 
-         vex_printf("set_XER_CA: op = %d\n", op);
+         vex_printf("set_XER_CA: op = %u\n", op);
          vpanic("set_XER_CA(ppc32)");
    }
 
@@ -1450,10 +1450,10 @@ static Bool dis_int_arith ( UInt theInstr )
       // li rD,val   == addi rD,0,val
       // la disp(rA) == addi rD,rA,disp
       if ( Ra_addr == 0 ) {
-         DIP("li r%d,%d\n", Rd_addr, EXTS_SIMM);
+         DIP("li r%d,%d\n", Rd_addr, (Int)EXTS_SIMM);
          assign( Rd, mkU32(EXTS_SIMM) );
       } else {
-         DIP("addi r%d,r%d,0x%x\n", Rd_addr, Ra_addr, SIMM_16);
+         DIP("addi r%d,r%d,0x%x\n", Rd_addr, Ra_addr, (Int)SIMM_16);
          assign( Rd, binop( Iop_Add32, mkexpr(Ra), mkU32(EXTS_SIMM) ) );
       }
       break;
@@ -1461,7 +1461,7 @@ static Bool dis_int_arith ( UInt theInstr )
    case 0x0F: // addis  (Add Immediate Shifted, PPC32 p353)
       // lis rD,val == addis rD,0,val
       if ( Ra_addr == 0 ) {
-         DIP("lis r%d,%d\n", Rd_addr, SIMM_16);
+         DIP("lis r%d,%d\n", Rd_addr, (Int)SIMM_16);
          assign( Rd, mkU32(SIMM_16 << 16) );
       } else {
          DIP("addis r%d,r%d,0x%x\n", Rd_addr, Ra_addr, SIMM_16);
@@ -1815,7 +1815,7 @@ static Bool dis_int_cmp ( UInt theInstr )
    switch (opc1) {
       case 0x0B: // cmpi (Compare Immediate, PPC32 p368)
          EXTS_SIMM = extend_s_16to32(UIMM_16);
-         DIP("cmp cr%d,r%d,%d\n", crfD, Ra_addr, EXTS_SIMM);
+         DIP("cmp cr%d,r%d,%d\n", crfD, Ra_addr, (Int)EXTS_SIMM);
          putCR321( crfD, unop(Iop_32to8,
                               binop(Iop_CmpORD32S, mkexpr(Ra), 
                                                    mkU32(EXTS_SIMM))) );
@@ -2166,7 +2166,7 @@ static Bool dis_int_load ( UInt theInstr )
    
    switch (opc1) {
    case 0x22: // lbz (Load B & Zero, PPC32 p433)
-      DIP("lbz r%d,%d(r%d)\n", Rd_addr, exts_d_imm, Ra_addr);
+      DIP("lbz r%d,%d(r%d)\n", Rd_addr, (Int)exts_d_imm, Ra_addr);
       putIReg( Rd_addr, unop(Iop_8Uto32,
                              loadBE(Ity_I8, mkexpr(EA_imm))) );
       break;
@@ -2176,14 +2176,14 @@ static Bool dis_int_load ( UInt theInstr )
          vex_printf("dis_int_load(PPC32)(lbzu,Ra_addr|Rd_addr)\n");
          return False;
       }
-      DIP("lbzu r%d,%d(r%d)\n", Rd_addr, exts_d_imm, Ra_addr);
+      DIP("lbzu r%d,%d(r%d)\n", Rd_addr, (Int)exts_d_imm, Ra_addr);
       putIReg( Rd_addr, unop(Iop_8Uto32,
                              loadBE(Ity_I8, mkexpr(EA_imm))) );
       putIReg( Ra_addr, mkexpr(EA_imm) );
       break;
       
    case 0x2A: // lha (Load HW Algebraic, PPC32 p445)
-      DIP("lha r%d,%d(r%d)\n", Rd_addr, exts_d_imm, Ra_addr);
+      DIP("lha r%d,%d(r%d)\n", Rd_addr, (Int)exts_d_imm, Ra_addr);
       putIReg( Rd_addr, unop(Iop_16Sto32,
                              loadBE(Ity_I16, mkexpr(EA_imm))) );
       break;
@@ -2193,14 +2193,14 @@ static Bool dis_int_load ( UInt theInstr )
          vex_printf("dis_int_load(PPC32)(lhau,Ra_addr|Rd_addr)\n");
          return False;
       }
-      DIP("lhau r%d,%d(r%d)\n", Rd_addr, (Int)d_imm, Ra_addr);
+      DIP("lhau r%d,%d(r%d)\n", Rd_addr, (Int)exts_d_imm, Ra_addr);
       putIReg( Rd_addr, unop(Iop_16Sto32,
                              loadBE(Ity_I16, mkexpr(EA_imm))) );
       putIReg( Ra_addr, mkexpr(EA_imm) );
       break;
       
    case 0x28: // lhz (Load HW & Zero, PPC32 p450)
-      DIP("lhz r%d,%d(r%d)\n", Rd_addr, exts_d_imm, Ra_addr);
+      DIP("lhz r%d,%d(r%d)\n", Rd_addr, (Int)exts_d_imm, Ra_addr);
       putIReg( Rd_addr, unop(Iop_16Uto32,
                              loadBE(Ity_I16, mkexpr(EA_imm))) );
       break;
@@ -2210,14 +2210,14 @@ static Bool dis_int_load ( UInt theInstr )
          vex_printf("dis_int_load(PPC32)(lhzu,Ra_addr|Rd_addr)\n");
          return False;
       }
-      DIP("lhzu r%d,%d(r%d)\n", Rd_addr, exts_d_imm, Ra_addr);
+      DIP("lhzu r%d,%d(r%d)\n", Rd_addr, (Int)exts_d_imm, Ra_addr);
       putIReg( Rd_addr, unop(Iop_16Uto32,
                              loadBE(Ity_I16, mkexpr(EA_imm))) );
       putIReg( Ra_addr, mkexpr(EA_imm) );
       break;
 
    case 0x20: // lwz (Load W & Zero, PPC32 p460)
-      DIP("lwz r%d,%d(r%d)\n", Rd_addr, exts_d_imm, Ra_addr);
+      DIP("lwz r%d,%d(r%d)\n", Rd_addr, (Int)exts_d_imm, Ra_addr);
       putIReg( Rd_addr, loadBE(Ity_I32, mkexpr(EA_imm)) );
       break;
       
@@ -2226,7 +2226,7 @@ static Bool dis_int_load ( UInt theInstr )
          vex_printf("dis_int_load(PPC32)(lwzu,Ra_addr|Rd_addr)\n");
          return False;
       }
-      DIP("lwzu r%d,%d(r%d)\n", Rd_addr, exts_d_imm, Ra_addr);
+      DIP("lwzu r%d,%d(r%d)\n", Rd_addr, (Int)exts_d_imm, Ra_addr);
       putIReg( Rd_addr, loadBE(Ity_I32, mkexpr(EA_imm)) );
       putIReg( Ra_addr, mkexpr(EA_imm) );
       break;
@@ -2351,7 +2351,7 @@ static Bool dis_int_store ( UInt theInstr )
    
    switch (opc1) {
    case 0x26: // stb (Store B, PPC32 p509)
-      DIP("stb r%d,%d(r%d)\n", Rs_addr, simm16, Ra_addr);
+      DIP("stb r%u,%d(r%u)\n", Rs_addr, simm16, Ra_addr);
       storeBE( mkexpr(EA_imm), unop(Iop_32to8, mkexpr(Rs)) );
       break;
        
@@ -2360,13 +2360,13 @@ static Bool dis_int_store ( UInt theInstr )
          vex_printf("dis_int_store(PPC32)(stbu,Ra_addr)\n");
          return False;
       }
-      DIP("stbu r%d,%d(r%d)\n", Rs_addr, simm16, Ra_addr);
+      DIP("stbu r%u,%d(r%u)\n", Rs_addr, simm16, Ra_addr);
       putIReg( Ra_addr, mkexpr(EA_imm) );
       storeBE( mkexpr(EA_imm), unop(Iop_32to8, mkexpr(Rs)) );
       break;
 
    case 0x2C: // sth (Store HW, PPC32 p522)
-      DIP("sth r%d,%d(r%d)\n", Rs_addr, simm16, Ra_addr);
+      DIP("sth r%u,%d(r%u)\n", Rs_addr, simm16, Ra_addr);
       storeBE( mkexpr(EA_imm), unop(Iop_32to16, mkexpr(Rs)) );
       break;
       
@@ -2375,13 +2375,13 @@ static Bool dis_int_store ( UInt theInstr )
          vex_printf("dis_int_store(PPC32)(sthu,Ra_addr)\n");
          return False;
       }
-      DIP("sthu r%d,%d(r%d)\n", Rs_addr, simm16, Ra_addr);
+      DIP("sthu r%u,%d(r%u)\n", Rs_addr, simm16, Ra_addr);
       putIReg( Ra_addr, mkexpr(EA_imm) );
       storeBE( mkexpr(EA_imm), unop(Iop_32to16, mkexpr(Rs)) );
       break;
 
    case 0x24: // stw (Store W, PPC32 p530)
-      DIP("stw r%d,%d(r%d)\n", Rs_addr, simm16, Ra_addr);
+      DIP("stw r%u,%d(r%u)\n", Rs_addr, simm16, Ra_addr);
       storeBE( mkexpr(EA_imm), mkexpr(Rs) );
       break;
 
@@ -2390,7 +2390,7 @@ static Bool dis_int_store ( UInt theInstr )
          vex_printf("dis_int_store(PPC32)(stwu,Ra_addr)\n");
          return False;
       }
-      DIP("stwu r%d,%d(r%d)\n", Rs_addr, simm16, Ra_addr);
+      DIP("stwu r%u,%d(r%u)\n", Rs_addr, simm16, Ra_addr);
       putIReg( Ra_addr, mkexpr(EA_imm) );
       storeBE( mkexpr(EA_imm), mkexpr(Rs) );
       break;
@@ -2409,13 +2409,13 @@ static Bool dis_int_store ( UInt theInstr )
             vex_printf("dis_int_store(PPC32)(stbux,Ra_addr)\n");
             return False;
          }
-         DIP("stbux r%d,r%d,r%d\n", Rs_addr, Ra_addr, Rb_addr);
+         DIP("stbux r%u,r%u,r%u\n", Rs_addr, Ra_addr, Rb_addr);
          putIReg( Ra_addr, mkexpr(EA_reg) );
          storeBE( mkexpr(EA_reg), unop(Iop_32to8, mkexpr(Rs)) );
          break;
          
       case 0x0D7: // stbx (Store B Indexed, PPC32 p512)
-         DIP("stbx r%d,r%d,r%d\n", Rs_addr, Ra_addr, Rb_addr);
+         DIP("stbx r%u,r%u,r%u\n", Rs_addr, Ra_addr, Rb_addr);
          storeBE( mkexpr(EA_reg), unop(Iop_32to8, mkexpr(Rs)) );
          break;
          
@@ -2424,13 +2424,13 @@ static Bool dis_int_store ( UInt theInstr )
             vex_printf("dis_int_store(PPC32)(sthux,Ra_addr)\n");
             return False;
          }
-         DIP("sthux r%d,r%d,r%d\n", Rs_addr, Ra_addr, Rb_addr);
+         DIP("sthux r%u,r%u,r%u\n", Rs_addr, Ra_addr, Rb_addr);
          putIReg( Ra_addr, mkexpr(EA_reg) );
          storeBE( mkexpr(EA_reg), unop(Iop_32to16, mkexpr(Rs)) );
          break;
          
       case 0x197: // sthx (Store HW Indexed, PPC32 p526)
-         DIP("sthx r%d,r%d,r%d\n", Rs_addr, Ra_addr, Rb_addr);
+         DIP("sthx r%u,r%u,r%u\n", Rs_addr, Ra_addr, Rb_addr);
          storeBE( mkexpr(EA_reg), unop(Iop_32to16, mkexpr(Rs)) );
          break;
          
@@ -2439,13 +2439,13 @@ static Bool dis_int_store ( UInt theInstr )
             vex_printf("dis_int_store(PPC32)(stwux,Ra_addr)\n");
             return False;
          }
-         DIP("stwux r%d,r%d,r%d\n", Rs_addr, Ra_addr, Rb_addr);
+         DIP("stwux r%u,r%u,r%u\n", Rs_addr, Ra_addr, Rb_addr);
          putIReg( Ra_addr, mkexpr(EA_reg) );
          storeBE( mkexpr(EA_reg), mkexpr(Rs) );
          break;
 
       case 0x097: // stwx (Store W Indexed, PPC32 p536)
-         DIP("stwx r%d,r%d,r%d\n", Rs_addr, Ra_addr, Rb_addr);
+         DIP("stwx r%u,r%u,r%u\n", Rs_addr, Ra_addr, Rb_addr);
          storeBE( mkexpr(EA_reg), mkexpr(Rs) );
          break;
          
@@ -2562,7 +2562,7 @@ void generate_lsw_sequence ( IRTemp tNBytes,   // # bytes, :: Ity_I32
                      unop(Iop_8Uto32, 
                           loadBE(Ity_I8, 
                                  binop(Iop_Add32, e_EA, mkU32(i)))), 
-                     mkU8(shift)) 
+                     mkU8(toUChar(shift))) 
       ));
       shift -= 8;
    }
@@ -2597,7 +2597,7 @@ void generate_stsw_sequence ( IRTemp tNBytes,   // # bytes, :: Ity_I32
       storeBE(
          binop(Iop_Add32, e_EA, mkU32(i)),
          unop(Iop_32to8,
-              binop(Iop_Shr32, getIReg(rS), mkU8(shift)))
+              binop(Iop_Shr32, getIReg(rS), mkU8(toUChar(shift))))
       );
       shift -= 8;
    }
@@ -3650,7 +3650,7 @@ static Bool dis_proc_ctl ( UInt theInstr )
 //zz          return False;
 
          default:
-            vex_printf("dis_proc_ctl(PPC32)(mtspr,SPR_flipped)(%d)\n",
+            vex_printf("dis_proc_ctl(PPC32)(mtspr,SPR_flipped)(%u)\n",
                        SPR_flipped);
             return False;
       }
@@ -6092,7 +6092,7 @@ DisResult disInstr_PPC32_WRK (
    }
 
 
-   opc1 = ifieldOPC(theInstr);
+   opc1 = toUChar(ifieldOPC(theInstr));
    opc2 = ifieldOPClo10(theInstr);
 
 #if PPC32_TOIR_DEBUG
@@ -6567,7 +6567,7 @@ DisResult disInstr_PPC32_WRK (
    /* All decode failures end up here. */
    vex_printf("disInstr(ppc32): unhandled instruction: "
               "0x%x\n", theInstr);
-   vex_printf("                 primary %d(0x%x), secondary %d(0x%x)\n", 
+   vex_printf("                 primary %d(0x%x), secondary %u(0x%x)\n", 
               opc1, opc1, opc2, opc2);
    
 #if PPC32_TOIR_DEBUG

diff --git a/VEX/priv/host-ppc32/hdefs.c b/VEX/priv/host-ppc32/hdefs.c
index adbe2387280719d8f117e8aa11582539f4b497dc..c1259eee077582822a50b3f7843ed201d6decbee 100644 (file)
--- a/VEX/priv/host-ppc32/hdefs.c
+++ b/VEX/priv/host-ppc32/hdefs.c
@@ -435,7 +435,7 @@ void ppPPC32RH ( PPC32RH* op ) {
       if (op->Prh.Imm.syned)
          vex_printf("%d", (Int)(Short)op->Prh.Imm.imm16);
       else
-         vex_printf("%d", (UInt)(UShort)op->Prh.Imm.imm16);
+         vex_printf("%u", (UInt)(UShort)op->Prh.Imm.imm16);
       return;
    case Prh_Reg: 
       ppHRegPPC32(op->Prh.Reg.reg);
@@ -1015,7 +1015,7 @@ void ppPPC32Instr ( PPC32Instr* i )
          /* generic */
          vex_printf("%s ", 
                     showPPC32AluOp(i->Pin.Alu32.op,
-                                   i->Pin.Alu32.srcR->tag == Prh_Imm));
+                                   toBool(i->Pin.Alu32.srcR->tag == Prh_Imm)));
          ppHRegPPC32(i->Pin.Alu32.dst);
          vex_printf(",");
          ppHRegPPC32(i->Pin.Alu32.srcL);
@@ -2169,7 +2169,7 @@ Int emit_PPC32Instr ( UChar* buf, Int nbuf, PPC32Instr* i )
 
    case Pin_Alu32: {
       PPC32RH* srcR   = i->Pin.Alu32.srcR;
-      Bool     immR   = srcR->tag == Prh_Imm;
+      Bool     immR   = toBool(srcR->tag == Prh_Imm);
       UInt     r_dst  = iregNo(i->Pin.Alu32.dst);
       UInt     r_srcL = iregNo(i->Pin.Alu32.srcL);
       UInt     r_srcR = immR ? (-1)/*bogus*/ : iregNo(srcR->Prh.Reg.reg);

diff --git a/VEX/priv/host-ppc32/isel.c b/VEX/priv/host-ppc32/isel.c
index c1232296269fccf60b66c1981b85711455b9d41d..42330b947083f8618ef62f461ede96d4b7f051cd 100644 (file)
--- a/VEX/priv/host-ppc32/isel.c
+++ b/VEX/priv/host-ppc32/isel.c
@@ -332,14 +332,16 @@ static void add_to_sp ( ISelEnv* env, Int n )
 {
    HReg sp = StackFramePtr;
    vassert(n > 0 && n < 256 && (n%16) == 0);
-   addInstr(env, PPC32Instr_Alu32(Palu_ADD, sp, sp, PPC32RH_Imm(True,n)));
+   addInstr(env, PPC32Instr_Alu32(
+                    Palu_ADD, sp, sp, PPC32RH_Imm(True,toUShort(n))));
 }
 
 static void sub_from_sp ( ISelEnv* env, Int n )
 {
    HReg sp = StackFramePtr;
    vassert(n > 0 && n < 256 && (n%16) == 0);
-   addInstr(env, PPC32Instr_Alu32(Palu_SUB, sp, sp, PPC32RH_Imm(True,n)));
+   addInstr(env, PPC32Instr_Alu32(
+                    Palu_SUB, sp, sp, PPC32RH_Imm(True,toUShort(n))));
 }
 
 
@@ -850,8 +852,8 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
         /* widen the left arg if needed */
          if ((aluOp == Palu_SHR || aluOp == Palu_SAR)
              && (ty == Ity_I8 || ty == Ity_I16)) {
-            PPC32RH* amt = PPC32RH_Imm(False, ty == Ity_I8 ? 24 : 16);
-            HReg tmp = newVRegI(env);
+            PPC32RH* amt = PPC32RH_Imm(False, toUShort(ty == Ity_I8 ? 24 : 16));
+            HReg     tmp = newVRegI(env);
             addInstr(env, PPC32Instr_Alu32(Palu_SHL, tmp, r_srcL, amt));
             addInstr(env, PPC32Instr_Alu32(aluOp,    tmp, tmp, amt));
             r_srcL = tmp;
@@ -887,7 +889,7 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
       /* El-mutanto 3-way compare? */
       if (e->Iex.Binop.op == Iop_CmpORD32S
           || e->Iex.Binop.op == Iop_CmpORD32U) {
-         Bool     syned = e->Iex.Binop.op == Iop_CmpORD32S;
+         Bool     syned = toBool(e->Iex.Binop.op == Iop_CmpORD32S);
          HReg     dst   = newVRegI(env);
          HReg     srcL  = iselIntExpr_R(env, e->Iex.Binop.arg1);
          PPC32RH* srcR  = iselIntExpr_RH(env, syned, e->Iex.Binop.arg2);
@@ -1062,20 +1064,23 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
       case Iop_8Uto16:
       case Iop_8Uto32:
       case Iop_16Uto32: {
-         HReg r_dst = newVRegI(env);
-         HReg r_src = iselIntExpr_R(env, e->Iex.Unop.arg);
-         UInt mask  = e->Iex.Unop.op==Iop_16Uto32 ? 0xFFFF : 0xFF;
-         addInstr(env, PPC32Instr_Alu32(Palu_AND,r_dst,r_src,PPC32RH_Imm(False,mask)));
+         HReg   r_dst = newVRegI(env);
+         HReg   r_src = iselIntExpr_R(env, e->Iex.Unop.arg);
+         UShort mask  = toUShort(e->Iex.Unop.op==Iop_16Uto32 ? 0xFFFF : 0xFF);
+         addInstr(env, PPC32Instr_Alu32(Palu_AND,r_dst,r_src,
+                                                 PPC32RH_Imm(False,mask)));
          return r_dst;
       }
       case Iop_8Sto16:
       case Iop_8Sto32:
       case Iop_16Sto32: {
-         HReg r_dst = newVRegI(env);
-         HReg r_src = iselIntExpr_R(env, e->Iex.Unop.arg);
-         UInt amt   = e->Iex.Unop.op==Iop_16Sto32 ? 16 : 24;
-         addInstr(env, PPC32Instr_Alu32(Palu_SHL, r_dst, r_src, PPC32RH_Imm(False,amt)));
-         addInstr(env, PPC32Instr_Alu32(Palu_SAR, r_dst, r_dst, PPC32RH_Imm(False,amt)));
+         HReg   r_dst = newVRegI(env);
+         HReg   r_src = iselIntExpr_R(env, e->Iex.Unop.arg);
+         UShort amt   = toUShort(e->Iex.Unop.op==Iop_16Sto32 ? 16 : 24);
+         addInstr(env, PPC32Instr_Alu32(Palu_SHL, r_dst, r_src, 
+                                                  PPC32RH_Imm(False,amt)));
+         addInstr(env, PPC32Instr_Alu32(Palu_SAR, r_dst, r_dst, 
+                                                  PPC32RH_Imm(False,amt)));
          return r_dst;
       }
       case Iop_Not8:
@@ -1132,10 +1137,11 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
       }
       case Iop_16HIto8:
       case Iop_32HIto16: {
-         HReg r_dst = newVRegI(env);
-         HReg r_src = iselIntExpr_R(env, e->Iex.Unop.arg);
-         UInt shift = e->Iex.Unop.op == Iop_16HIto8 ? 8 : 16;
-         addInstr(env, PPC32Instr_Alu32(Palu_SHR, r_dst, r_src, PPC32RH_Imm(False,shift)));
+         HReg   r_dst = newVRegI(env);
+         HReg   r_src = iselIntExpr_R(env, e->Iex.Unop.arg);
+         UShort shift = toUShort(e->Iex.Unop.op == Iop_16HIto8 ? 8 : 16);
+         addInstr(env, PPC32Instr_Alu32(Palu_SHR, r_dst, r_src, 
+                                                  PPC32RH_Imm(False,shift)));
          return r_dst;
       }
       case Iop_1Uto32:
@@ -1152,8 +1158,10 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
          HReg          r_dst = newVRegI(env);
          PPC32CondCode cond  = iselCondCode(env, e->Iex.Unop.arg);
          addInstr(env, PPC32Instr_Set32(cond,r_dst));
-         addInstr(env, PPC32Instr_Alu32(Palu_SHL, r_dst, r_dst, PPC32RH_Imm(False,31)));
-         addInstr(env, PPC32Instr_Alu32(Palu_SAR, r_dst, r_dst, PPC32RH_Imm(False,31)));
+         addInstr(env, PPC32Instr_Alu32(Palu_SHL, r_dst, r_dst, 
+                                                  PPC32RH_Imm(False,31)));
+         addInstr(env, PPC32Instr_Alu32(Palu_SAR, r_dst, r_dst, 
+                                                  PPC32RH_Imm(False,31)));
          return r_dst;
       }
 
@@ -1420,10 +1428,10 @@ static PPC32RH* iselIntExpr_RH_wrk ( ISelEnv* env, Bool syned, IRExpr* e )
       i = (Int)u;
       /* Now figure out if it's representable. */
       if (!syned && u <= 65535) {
-         return PPC32RH_Imm(False/*unsigned*/, u & 0xFFFF);
+         return PPC32RH_Imm(False/*unsigned*/, toUShort(u & 0xFFFF));
       }
       if (syned && i >= -32767 && i <= 32767) {
-         return PPC32RH_Imm(True/*signed*/, u & 0xFFFF);
+         return PPC32RH_Imm(True/*signed*/, toUShort(u & 0xFFFF));
       }
       /* no luck; use the Slow Way. */
    }

diff --git a/VEX/priv/host-x86/hdefs.c b/VEX/priv/host-x86/hdefs.c
index 952cc75be2981e156658bd7f9511595292cb6fad..1338d1cfad3cb84d9716e34c008c812bc06e49ef 100644 (file)
--- a/VEX/priv/host-x86/hdefs.c
+++ b/VEX/priv/host-x86/hdefs.c
@@ -2221,7 +2221,7 @@ Int emit_X86Instr ( UChar* buf, Int nbuf, X86Instr* i )
 
       /* Alternative version which works on any x86 variant. */
       /* jmp fwds if !condition */
-      *p++ = 0x70 + (i->Xin.CMov32.cond ^ 1);
+      *p++ = toUChar(0x70 + (i->Xin.CMov32.cond ^ 1));
       *p++ = 0; /* # of bytes in the next bit, which we don't know yet */
       ptmp = p;
 
@@ -2245,7 +2245,7 @@ Int emit_X86Instr ( UChar* buf, Int nbuf, X86Instr* i )
             goto bad;
       }
       /* Fill in the jump offset. */
-      *(ptmp-1) = p - ptmp;
+      *(ptmp-1) = toUChar(p - ptmp);
       goto done;
 
       break;

diff --git a/VEX/priv/main/vex_util.c b/VEX/priv/main/vex_util.c
index 20f8fd13ebfdba729d2f2c22d0f0768aa90e8635..370e582a2db5bf4d7488888e5dcbb9357739e42b 100644 (file)
--- a/VEX/priv/main/vex_util.c
+++ b/VEX/priv/main/vex_util.c
@@ -106,6 +106,7 @@ void* LibVEX_Alloc ( Int nbytes )
       /* ugly hack -- do not remove */
       //extern void* malloc ( int );
       //return malloc(nbytes);
+      return NULL;
    } else {
       nbytes = (nbytes + ALIGN) & ~ALIGN;
       if (mode == VexAllocModeTEMP) {
@@ -223,7 +224,7 @@ void convert_int ( /*OUT*/HChar* buf, Long n0,
    }
 
    while (1) {
-     buf[bufi++] = '0' + (HChar)(u0 % base);
+     buf[bufi++] = toHChar('0' + toUInt(u0 % base));
      u0 /= base;
      if (u0 == 0) break;
    }
@@ -233,7 +234,7 @@ void convert_int ( /*OUT*/HChar* buf, Long n0,
    buf[bufi] = 0;
    for (i = 0; i < bufi; i++)
       if (buf[i] > '9') 
-         buf[i] += ((hexcaps ? 'A' : 'a') - '9' - 1);
+         buf[i] = toHChar(buf[i] + (hexcaps ? 'A' : 'a') - '9' - 1);
 
    i = 0;
    j = bufi-1;
@@ -374,7 +375,7 @@ UInt vprintf_wrk ( void(*sink)(HChar),
          }
          case 'p': 
          case 'P': {
-            Bool hexcaps = *format == 'P';
+            Bool hexcaps = toBool(*format == 'P');
             ULong l = Ptr_to_ULong( va_arg(ap, void*) );
             convert_int(intbuf, l, 16/*base*/, False/*unsigned*/, hexcaps);
             len1 = len3 = 0;
@@ -415,7 +416,7 @@ static Int   n_myprintf_buf;
 
 static void add_to_myprintf_buf ( HChar c )
 {
-   Bool emit = c == '\n' || n_myprintf_buf >= 1000-10 /*paranoia*/;
+   Bool emit = toBool(c == '\n' || n_myprintf_buf >= 1000-10 /*paranoia*/);
    myprintf_buf[n_myprintf_buf++] = c;
    myprintf_buf[n_myprintf_buf] = 0;
    if (emit) {