]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
mmc: sdhci-pci-gli: GL9763e: Mask the replay timer timeout of AER
authorVictor Shih <victor.shih@genesyslogic.com.tw>
Thu, 31 Jul 2025 06:57:52 +0000 (14:57 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 28 Aug 2025 14:34:35 +0000 (16:34 +0200)
commit 340be332e420ed37d15d4169a1b4174e912ad6cb upstream.

Due to a flaw in the hardware design, the GL9763e replay timer frequently
times out when ASPM is enabled. As a result, the warning messages will
often appear in the system log when the system accesses the GL9763e
PCI config. Therefore, the replay timer timeout must be masked.

Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
Fixes: 1ae1d2d6e555 ("mmc: sdhci-pci-gli: Add Genesys Logic GL9763E support")
Cc: stable@vger.kernel.org
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20250731065752.450231-4-victorshihgli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/mmc/host/sdhci-pci-gli.c

index f678c91f8d3eefcf6e1fa83fec98f004474174df..dc84d69fcf6481dcedce769faa41caeb62f7eab4 100644 (file)
@@ -1782,6 +1782,9 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
        value |= FIELD_PREP(GLI_9763E_HS400_RXDLY, GLI_9763E_HS400_RXDLY_5);
        pci_write_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, value);
 
+       /* mask the replay timer timeout of AER */
+       sdhci_gli_mask_replay_timer_timeout(pdev);
+
        pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
        value &= ~GLI_9763E_VHS_REV;
        value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);