--- /dev/null
+From 0920a48719f1ceefc909387a64f97563848c7854 Mon Sep 17 00:00:00 2001
+From: Stéphane Marchesin <marcheu@chromium.org>
+Date: Tue, 29 Jan 2013 19:41:59 -0800
+Subject: drm/i915: Increase the RC6p threshold.
+
+From: Stéphane Marchesin <marcheu@chromium.org>
+
+commit 0920a48719f1ceefc909387a64f97563848c7854 upstream.
+
+This increases GEN6_RC6p_THRESHOLD from 100000 to 150000. For some
+reason this avoids the gen6_gt_check_fifodbg.isra warnings and
+associated GPU lockups, which makes my ivy bridge machine stable.
+
+Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
+Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_display.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -8364,7 +8364,7 @@ void gen6_enable_rps(struct drm_i915_pri
+ I915_WRITE(GEN6_RC_SLEEP, 0);
+ I915_WRITE(GEN6_RC1e_THRESHOLD, 1000);
+ I915_WRITE(GEN6_RC6_THRESHOLD, 50000);
+- I915_WRITE(GEN6_RC6p_THRESHOLD, 100000);
++ I915_WRITE(GEN6_RC6p_THRESHOLD, 150000);
+ I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */
+
+ rc6_mode = intel_enable_rc6(dev_priv->dev);