]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/amdgpu: Wait for bootloader after PSPv11 reset
authorLijo Lazar <lijo.lazar@amd.com>
Fri, 18 Jul 2025 13:20:58 +0000 (18:50 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 8 Sep 2025 15:05:53 +0000 (11:05 -0400)
Some PSPv11 SOCs take a longer time for PSP based mode-1 reset. Instead
of checking for C2PMSG_33 status, add the callback wait_for_bootloader.
Wait for bootloader to be back to steady state is already part of the
generic mode-1 reset flow. Increase the retry count for bootloader wait
and also fix the mask to prevent fake pass.

Fixes: 8345a71fc54b ("drm/amdgpu: Add more checks to PSP mailbox")
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4531
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 32f73741d6ee41fd5db8791c1163931e313d0fdc)

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

index 6cc05d36e3594de61758da72a6b96c965fb3540e..64b240b51f1aa7ddb36a919bcdf51ed91ca00cb3 100644 (file)
@@ -149,12 +149,12 @@ static int psp_v11_0_wait_for_bootloader(struct psp_context *psp)
        int ret;
        int retry_loop;
 
-       for (retry_loop = 0; retry_loop < 10; retry_loop++) {
+       for (retry_loop = 0; retry_loop < 20; retry_loop++) {
                /* Wait for bootloader to signify that is
                    ready having bit 31 of C2PMSG_35 set to 1 */
                ret = psp_wait_for(
                        psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),
-                       0x80000000, 0x80000000, PSP_WAITREG_NOVERBOSE);
+                       0x80000000, 0x8000FFFF, PSP_WAITREG_NOVERBOSE);
 
                if (ret == 0)
                        return 0;
@@ -397,18 +397,6 @@ static int psp_v11_0_mode1_reset(struct psp_context *psp)
 
        msleep(500);
 
-       offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_33);
-
-       ret = psp_wait_for(psp, offset, MBOX_TOS_RESP_FLAG, MBOX_TOS_RESP_MASK,
-                          0);
-
-       if (ret) {
-               DRM_INFO("psp mode 1 reset failed!\n");
-               return -EINVAL;
-       }
-
-       DRM_INFO("psp mode1 reset succeed \n");
-
        return 0;
 }
 
@@ -665,7 +653,8 @@ static const struct psp_funcs psp_v11_0_funcs = {
        .ring_get_wptr = psp_v11_0_ring_get_wptr,
        .ring_set_wptr = psp_v11_0_ring_set_wptr,
        .load_usbc_pd_fw = psp_v11_0_load_usbc_pd_fw,
-       .read_usbc_pd_fw = psp_v11_0_read_usbc_pd_fw
+       .read_usbc_pd_fw = psp_v11_0_read_usbc_pd_fw,
+       .wait_for_bootloader = psp_v11_0_wait_for_bootloader
 };
 
 void psp_v11_0_set_psp_funcs(struct psp_context *psp)