testsuite: Fix ending of comment in test cases

gcc/testsuite/ChangeLog:

	* gcc.dg/pr108757-1.c: Fixed dg-comment.
	* gcc.dg/pr71071.c: Likewise.
	* gcc.dg/tree-ssa/noreturn-1.c: Likewise.
	* gcc.dg/tree-ssa/pr56727.c: Likewise.
	* gcc.target/arc/loop-2.cpp: Likewise.
	* gcc.target/arc/loop-3.c: Likewise.
	* gcc.target/arc/pr9001107555.c: Likewise.
	* gcc.target/arm/armv8_1m-fp16-move-1.c: Likewise.
	* gcc.target/arm/armv8_1m-fp32-move-1.c: Likewise.
	* gcc.target/arm/armv8_1m-fp64-move-1.c: Likewise.
	* gcc.target/i386/amxint8-asmatt-1.c: Likewise.
	* gcc.target/i386/amxint8-asmintel-1.c: Likewise.
	* gcc.target/i386/avx512bw-vpermt2w-1.c: Likewise.
	* gcc.target/i386/avx512vbmi-vpermt2b-1.c: Likewise.
	* gcc.target/i386/endbr_immediate.c: Likewise.
	* gcc.target/i386/pr96539.c: Likewise.
	* gcc.target/i386/sse2-pr98461-2.c: Likewise.
	* gcc.target/m68k/pr39726.c: Likewise.
	* gcc.target/m68k/pr52076-1.c: Likewise.
	* gcc.target/m68k/pr52076-2.c: Likewise.
	* gcc.target/nvptx/v2si-vec-set-extract.c: Likewise.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>

diff --git a/gcc/testsuite/gcc.dg/pr108757-1.c b/gcc/testsuite/gcc.dg/pr108757-1.c
index 7908f4bdcb8e225fe311b668efbe8f6db525b4d5..712dc4c30e92e448c5aee4c14f8c954c1f093b83 100644 (file)
--- a/gcc/testsuite/gcc.dg/pr108757-1.c
+++ b/gcc/testsuite/gcc.dg/pr108757-1.c
@@ -13,6 +13,6 @@ typedef int INT;
 #define IMIN INT_MIN
 #include "pr108757.h"
 
-/* { dg-final { scan-tree-dump-not " = x_\[0-9\]+\\(D\\) \\+ " "optimized" } } *
+/* { dg-final { scan-tree-dump-not " = x_\[0-9\]+\\(D\\) \\+ " "optimized" } } */
 /* { dg-final { scan-tree-dump-not " = x_\[0-9\]+\\(D\\) \\- " "optimized" } } */
 /* { dg-final { scan-tree-dump-not " = b_\[0-9\]+ \\+ " "optimized" } } */

diff --git a/gcc/testsuite/gcc.dg/pr71071.c b/gcc/testsuite/gcc.dg/pr71071.c
index 582f1f15a4321643bb5d7f229ebb3f99bf02da66..3e83dc9f1b7bc5eb2de04c7c2a44e41ec6627151 100644 (file)
--- a/gcc/testsuite/gcc.dg/pr71071.c
+++ b/gcc/testsuite/gcc.dg/pr71071.c
@@ -1,5 +1,5 @@
 /* PR bootstrap/71071 */
-/* { dg-do compile } *
+/* { dg-do compile } */
 /* { dg-options "-O2" } */
 
 struct S { unsigned b : 1; } a;

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/noreturn-1.c b/gcc/testsuite/gcc.dg/tree-ssa/noreturn-1.c
index ae7ee42fabcba5ceb4fdeca800b3ae938eb520a3..35f3d980217513997cf1f438255110d2d39d1e73 100644 (file)
--- a/gcc/testsuite/gcc.dg/tree-ssa/noreturn-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/noreturn-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } *
+/* { dg-do compile } */
 /* { dg-options "-O2 -fdump-tree-ssa -std=gnu11" } */
 /* { dg-final { scan-tree-dump-times "__builtin_unreachable" 4 "ssa" } } */
 

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr56727.c b/gcc/testsuite/gcc.dg/tree-ssa/pr56727.c
index 3080ce183b8adced0b6b876476c8d9f2a962ca26..da2c9ab31f21df4c6a74043ded73e6fec48fc373 100644 (file)
--- a/gcc/testsuite/gcc.dg/tree-ssa/pr56727.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr56727.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target fpic } } *
+/* { dg-do compile { target fpic } } */
 /* { dg-require-alias "" } */
 /* { dg-options "-O2 -fPIC -fdump-tree-optimized" } */
 void do_not_optimize(int b)

diff --git a/gcc/testsuite/gcc.target/arc/loop-2.cpp b/gcc/testsuite/gcc.target/arc/loop-2.cpp
index d1dc917ba47904329e3855a58de294f271755fb9..9cfb3274e2136f3b58b66fe4e576e82253fbacea 100644 (file)
--- a/gcc/testsuite/gcc.target/arc/loop-2.cpp
+++ b/gcc/testsuite/gcc.target/arc/loop-2.cpp
@@ -1,4 +1,4 @@
-/* { dg-options "-O2" } *
+/* { dg-options "-O2" } */
 /* { dg-do assemble } */
 
 /* This file fails to assemble if we forgot to increase the number of

diff --git a/gcc/testsuite/gcc.target/arc/loop-3.c b/gcc/testsuite/gcc.target/arc/loop-3.c
index ae0d6110f18232fef7a70817f29995b51e9acf12..d97c6f76b09559e42aaa3b45da7eb49f6695c489 100644 (file)
--- a/gcc/testsuite/gcc.target/arc/loop-3.c
+++ b/gcc/testsuite/gcc.target/arc/loop-3.c
@@ -1,6 +1,6 @@
 /* { dg-do assemble } */
 /* { dg-do compile } */
-/* { dg-options "-O2 -mno-sdata" } *
+/* { dg-options "-O2 -mno-sdata" } */
 
 /* This example will fail to assemble if the last instruction is a
    branch with delay slot.  */

diff --git a/gcc/testsuite/gcc.target/arc/pr9001107555.c b/gcc/testsuite/gcc.target/arc/pr9001107555.c
index 420fa835fa41b4ae55a1beeb26ad8103050fa780..1598653e788261b93a27e36298fdab6c307989c9 100644 (file)
--- a/gcc/testsuite/gcc.target/arc/pr9001107555.c
+++ b/gcc/testsuite/gcc.target/arc/pr9001107555.c
@@ -1,4 +1,4 @@
-/* { dg-do assemble } *
+/* { dg-do assemble } */
 /* { dg-skip-if "" { ! { clmcpu } } } */
 /* { dg-options "-O3 -funroll-loops -mno-sdata -mcpu=arc700" } */
 

diff --git a/gcc/testsuite/gcc.target/arm/armv8_1m-fp16-move-1.c b/gcc/testsuite/gcc.target/arm/armv8_1m-fp16-move-1.c
index f5ab6e719f412619d9ee51d4dd5359ed48a74f54..e6ed76870b49bb0129631df4bae0781ef516e9e5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/armv8_1m-fp16-move-1.c
+++ b/gcc/testsuite/gcc.target/arm/armv8_1m-fp16-move-1.c
@@ -2,7 +2,7 @@
 /* { dg-options "-O -mfp16-format=ieee" } */
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
-/* { dg-additional-options "-mfloat-abi=hard" } *
+/* { dg-additional-options "-mfloat-abi=hard" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 /*

diff --git a/gcc/testsuite/gcc.target/arm/armv8_1m-fp32-move-1.c b/gcc/testsuite/gcc.target/arm/armv8_1m-fp32-move-1.c
index 2f62e839545145156be3f3273762189e037ebbcd..d161cfebd920882a714b53cf630cb83cabd2ba55 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/armv8_1m-fp32-move-1.c
+++ b/gcc/testsuite/gcc.target/arm/armv8_1m-fp32-move-1.c
@@ -2,7 +2,7 @@
 /* { dg-options "-O" } */
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
-/* { dg-additional-options "-mfloat-abi=hard" } *
+/* { dg-additional-options "-mfloat-abi=hard" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 /*

diff --git a/gcc/testsuite/gcc.target/arm/armv8_1m-fp64-move-1.c b/gcc/testsuite/gcc.target/arm/armv8_1m-fp64-move-1.c
index d236f0826c309fce39f75d0b6cc98777cdbd3196..39e8c40632477ee571da4875435507df6e37ed10 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/armv8_1m-fp64-move-1.c
+++ b/gcc/testsuite/gcc.target/arm/armv8_1m-fp64-move-1.c
@@ -2,7 +2,7 @@
 /* { dg-options "-O" } */
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
-/* { dg-additional-options "-mfloat-abi=hard" } *
+/* { dg-additional-options "-mfloat-abi=hard" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 /*

diff --git a/gcc/testsuite/gcc.target/i386/amxint8-asmatt-1.c b/gcc/testsuite/gcc.target/i386/amxint8-asmatt-1.c
index 1842c234be8a0b35d0013b004bc9dc8271eeab72..c785c54c67fdf5a9eb6bc1982f9560a989013809 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/amxint8-asmatt-1.c
+++ b/gcc/testsuite/gcc.target/i386/amxint8-asmatt-1.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! ia32 } } } */
 /* { dg-options "-O2 -mamx-int8" } */
 /* { dg-final { scan-assembler "tdpbssd\[ \\t]+\[^\n\]*%tmm3+\[^\n\]*%tmm2+\[^\n\]*%tmm1"  } } */
-/* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n\]*%tmm3+\[^\n\]*%tmm2+\[^\n\]*%tmm1"  } } *
+/* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n\]*%tmm3+\[^\n\]*%tmm2+\[^\n\]*%tmm1"  } } */
 /* { dg-final { scan-assembler "tdpbusd\[ \\t]+\[^\n\]*%tmm3+\[^\n\]*%tmm2+\[^\n\]*%tmm1"  } } */
 /* { dg-final { scan-assembler "tdpbuud\[ \\t]+\[^\n\]*%tmm3+\[^\n\]*%tmm2+\[^\n\]*%tmm1"  } } */
 #include <immintrin.h>

diff --git a/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c b/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c
index f8c376ae6c4aa9152bc395e60356543f294fc106..abc98745a7691537ef8bbd8e6c3baf3870ea00c0 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c
+++ b/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c
@@ -2,7 +2,7 @@
 /* { dg-require-effective-target masm_intel } */
 /* { dg-options "-O2 -mamx-int8 -masm=intel" } */
 /* { dg-final { scan-assembler "tdpbssd\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
-/* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } *
+/* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
 /* { dg-final { scan-assembler "tdpbusd\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
 /* { dg-final { scan-assembler "tdpbuud\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
 #include <immintrin.h>

diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-1.c
index a734cb600ce676d5306aa07e383f4e3a31e629c7..94c95f8c3266cb4fa0fa8530a77ff14d363ff144 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-1.c
@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512bw -mavx512vl -O2" } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2w\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
-/* { dg-final { scan-assembler-times "vperm\[ti]2w\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } *
+/* { dg-final { scan-assembler-times "vperm\[ti]2w\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2w\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2w\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2w\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx512vbmi-vpermt2b-1.c b/gcc/testsuite/gcc.target/i386/avx512vbmi-vpermt2b-1.c
index 24a0b9e3fce37c80ec43db0727ec91944098e6b0..24640d5be3ad0f57f841ab1b54010ca4d1a131f5 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vbmi-vpermt2b-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vbmi-vpermt2b-1.c
@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512vbmi -mavx512vl -O2" } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2b\[ \\t\]+\[^\n\]*%zmm\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "vperm\[ti]2b\[ \\t\]+\[^\n\]*%ymm\[0-9\]+" 3 } } *
+/* { dg-final { scan-assembler-times "vperm\[ti]2b\[ \\t\]+\[^\n\]*%ymm\[0-9\]+" 3 } } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2b\[ \\t\]+\[^\n\]*%xmm\[0-9\]+" 3 } } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2b\[ \\t\]+\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\[^\{\]" 1 } } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2b\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\[^\{\]" 1 } } */

diff --git a/gcc/testsuite/gcc.target/i386/endbr_immediate.c b/gcc/testsuite/gcc.target/i386/endbr_immediate.c
index 3015512aa0e426ed3a62855fc38abf2bd9d1be62..0aa97a9a5a154cc0011695126508d366acf93681 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/endbr_immediate.c
+++ b/gcc/testsuite/gcc.target/i386/endbr_immediate.c
@@ -2,7 +2,7 @@
 /* { dg-do compile } */
 /* { dg-options "-fcf-protection -O2" } */
 /* { dg-final { scan-assembler-not "$-81915917" { target { ia32 } } } } */
-/* { dg-final { scan-assembler-not "$-98693133" { target { ! ia32 } } } } *
+/* { dg-final { scan-assembler-not "$-98693133" { target { ! ia32 } } } } */
 /* { dg-final { scan-assembler-not "$-423883778574778368" { target { ! ia32 } } } } */
 /* { dg-final { scan-assembler "\[ \t\]*-81915917" { target { ia32 } } } } */
 /* { dg-final { scan-assembler "\[ \t\]*-98693133" { target { ! ia32 } } } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr96539.c b/gcc/testsuite/gcc.target/i386/pr96539.c
index 696929be0af2da542728cafd2577e0d09d3085bd..cafcfda19b92cbc6bfae3860681704e143f14d97 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr96539.c
+++ b/gcc/testsuite/gcc.target/i386/pr96539.c
@@ -1,5 +1,5 @@
 /* PR rtl-optimization/96539 */
-/* { dg-do compile } *
+/* { dg-do compile } */
 /* { dg-options "-Os" } */
 /* The need to restore the PIC register prevents PLT tail-calls on ia32,
    so S has to be copied to call baz.  */

diff --git a/gcc/testsuite/gcc.target/i386/sse2-pr98461-2.c b/gcc/testsuite/gcc.target/i386/sse2-pr98461-2.c
index 330272c69bc955f2c77d1b828a50469a9140e2a7..6b2523236695f9f218313443ac98bed0612dbbc2 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/sse2-pr98461-2.c
+++ b/gcc/testsuite/gcc.target/i386/sse2-pr98461-2.c
@@ -3,7 +3,7 @@
 /* { dg-options "-O2 -msse2 -mno-sse3 -masm=att" } */
 /* { dg-final { scan-assembler-times "\tpmovmskb\t" 3 } } */
 /* { dg-final { scan-assembler-not "\tmovzwl" } } */
-/* { dg-final { scan-assembler-times "\tnotl" 1 } } *
+/* { dg-final { scan-assembler-times "\tnotl" 1 } } */
 /* { dg-final { scan-assembler-times "\txorl" 1 } } */
 
 #include <immintrin.h>

diff --git a/gcc/testsuite/gcc.target/m68k/pr39726.c b/gcc/testsuite/gcc.target/m68k/pr39726.c
index 94d41ba2159957482e3fb53bee2fed53560fc751..e79f111670644851f0f4dd301812e582f57e46a5 100644 (file)
--- a/gcc/testsuite/gcc.target/m68k/pr39726.c
+++ b/gcc/testsuite/gcc.target/m68k/pr39726.c
@@ -1,4 +1,4 @@
-/* { dg-do assemble } /*
+/* { dg-do assemble } */
 /* { dg-options "-O2 -fomit-frame-pointer" } */
 /* { dg-final { object-size text <= 228 } } */
 

diff --git a/gcc/testsuite/gcc.target/m68k/pr52076-1.c b/gcc/testsuite/gcc.target/m68k/pr52076-1.c
index 86df0dcae43f68107c22967b4fa7ef152955611e..dd3614dfc6a2f4618274c48ebffb20c94cea6b94 100644 (file)
--- a/gcc/testsuite/gcc.target/m68k/pr52076-1.c
+++ b/gcc/testsuite/gcc.target/m68k/pr52076-1.c
@@ -1,4 +1,4 @@
-/* { dg-do assemble } /*
+/* { dg-do assemble } */
 /* { dg-options "-Os -fomit-frame-pointer -m68040" } */
 /* { dg-final { object-size text <= 72 } } */
 

diff --git a/gcc/testsuite/gcc.target/m68k/pr52076-2.c b/gcc/testsuite/gcc.target/m68k/pr52076-2.c
index 30c6991839cce1157d49114d7856da506cf92bc0..ddfec38db45356bbb0d313e8b475434acbec338c 100644 (file)
--- a/gcc/testsuite/gcc.target/m68k/pr52076-2.c
+++ b/gcc/testsuite/gcc.target/m68k/pr52076-2.c
@@ -1,4 +1,4 @@
-/* { dg-do assemble } /*
+/* { dg-do assemble } */
 /* { dg-options "-Os -fomit-frame-pointer -m68040" } */
 /* { dg-final { object-size text <= 30 } } */
 

diff --git a/gcc/testsuite/gcc.target/nvptx/v2si-vec-set-extract.c b/gcc/testsuite/gcc.target/nvptx/v2si-vec-set-extract.c
index a0709e50718a34a5380ea4e1943e012aa1119670..ab213411e61e4d3ecabcbfdd6adeb7aa42311829 100644 (file)
--- a/gcc/testsuite/gcc.target/nvptx/v2si-vec-set-extract.c
+++ b/gcc/testsuite/gcc.target/nvptx/v2si-vec-set-extract.c
@@ -19,7 +19,7 @@ foo2 (unsigned int a, unsigned int b)
 }
 
 /* { dg-final { scan-assembler "mov.u32.*\\.x;" } } */
-/* { dg-final { scan-assembler "mov.u32.*\\.y;" } } *
+/* { dg-final { scan-assembler "mov.u32.*\\.y;" } } */
 
 /* { dg-final { scan-assembler "mov.u32\[\t\]%r\[0-9\]\[0-9\]*\\.x, " } } */
 /* { dg-final { scan-assembler "mov.u32\[\t\]%r\[0-9\]\[0-9\]*\\.y, " } } */