arm64: dts: broadcom: Add DT for D-step version of BCM2712

The D-Step has some minor variations in the hardware, so needs
matching changes to DT.

Add a new DTS file that modifies the existing (C-step) devicetree.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Link: https://lore.kernel.org/r/20241025-drm-vc4-2712-support-v2-36-35efa83c8fc0@raspberrypi.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>

diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
index 92565e9781ad3ca3a469d7b5d290c921849e98f6..3d0efb93b06d72a016edfd3cde529aa0c98627a3 100644 (file)
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \
                              bcm2711-rpi-4-b.dtb \
                              bcm2711-rpi-cm4-io.dtb \
                              bcm2712-rpi-5-b.dtb \
+                             bcm2712-d-rpi-5-b.dtb \
                              bcm2837-rpi-3-a-plus.dtb \
                              bcm2837-rpi-3-b.dtb \
                              bcm2837-rpi-3-b-plus.dtb \

diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dts b/arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dts
new file mode 100644 (file)
index 0000000..7de24d6
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dts
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/dts-v1/;
+
+#include "bcm2712-rpi-5-b.dts"
+
+&gio_aon {
+       brcm,gpio-bank-widths = <15 6>;
+
+       gpio-line-names =
+               "RP1_SDA", // AON_GPIO_00
+               "RP1_SCL", // AON_GPIO_01
+               "RP1_RUN", // AON_GPIO_02
+               "SD_IOVDD_SEL", // AON_GPIO_03
+               "SD_PWR_ON", // AON_GPIO_04
+               "SD_CDET_N", // AON_GPIO_05
+               "SD_FLG_N", // AON_GPIO_06
+               "", // AON_GPIO_07
+               "2712_WAKE", // AON_GPIO_08
+               "2712_STAT_LED", // AON_GPIO_09
+               "", // AON_GPIO_10
+               "", // AON_GPIO_11
+               "PMIC_INT", // AON_GPIO_12
+               "UART_TX_FS", // AON_GPIO_13
+               "UART_RX_FS", // AON_GPIO_14
+               "", // AON_GPIO_15
+               "", // AON_GPIO_16
+
+               // Pad bank0 out to 32 entries
+               "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+
+               "HDMI0_SCL", // AON_SGPIO_00
+               "HDMI0_SDA", // AON_SGPIO_01
+               "HDMI1_SCL", // AON_SGPIO_02
+               "HDMI1_SDA", // AON_SGPIO_03
+               "PMIC_SCL", // AON_SGPIO_04
+               "PMIC_SDA"; // AON_SGPIO_05
+};