if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_SCU]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->scu), 0,
+ sc->memmap[ASPEED_DEV_SCU]);
/* I2C */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->i2c), 0,
+ sc->memmap[ASPEED_DEV_I2C]);
for (i = 0; i < ASPEED_I2C_GET_CLASS(&s->i2c)->num_busses; i++) {
qemu_irq irq = qdev_get_gpio_in(DEVICE(&a->armv7m),
sc->irqmap[ASPEED_DEV_I2C] + i);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->i3c), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i3c), 0, sc->memmap[ASPEED_DEV_I3C]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->i3c), 0,
+ sc->memmap[ASPEED_DEV_I3C]);
for (i = 0; i < ASPEED_I3C_NR_DEVICES; i++) {
qemu_irq irq = qdev_get_gpio_in(DEVICE(&a->armv7m),
sc->irqmap[ASPEED_DEV_I3C] + i);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->peci), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->peci), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->peci), 0,
sc->memmap[ASPEED_DEV_PECI]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->peci), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_PECI));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->lpc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->lpc), 0, sc->memmap[ASPEED_DEV_LPC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->lpc), 0,
+ sc->memmap[ASPEED_DEV_LPC]);
/* Connect the LPC IRQ to the GIC. It is otherwise unused. */
sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 0,
if (!sysbus_realize(SYS_BUS_DEVICE(&s->timerctrl), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->timerctrl), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->timerctrl), 0,
sc->memmap[ASPEED_DEV_TIMER1]);
for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->adc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->adc), 0,
+ sc->memmap[ASPEED_DEV_ADC]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_ADC));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->fmc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_DEV_FMC]);
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fmc), 1,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fmc), 0,
+ sc->memmap[ASPEED_DEV_FMC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fmc), 1,
ASPEED_SMC_GET_CLASS(&s->fmc)->flash_window_base);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_FMC));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->spi[i]), 0,
sc->memmap[ASPEED_DEV_SPI1 + i]);
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 1,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->spi[i]), 1,
ASPEED_SMC_GET_CLASS(&s->spi[i])->flash_window_base);
}
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sbc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sbc), 0, sc->memmap[ASPEED_DEV_SBC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->sbc), 0,
+ sc->memmap[ASPEED_DEV_SBC]);
/* HACE */
object_property_set_link(OBJECT(&s->hace), "dram", OBJECT(&s->sram),
if (!sysbus_realize(SYS_BUS_DEVICE(&s->hace), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->hace), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->hace), 0,
sc->memmap[ASPEED_DEV_HACE]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->hace), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_HACE));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset);
}
/* GPIO */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gpio), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->gpio), 0,
sc->memmap[ASPEED_DEV_GPIO]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_GPIO));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_SCU]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->scu), 0,
+ sc->memmap[ASPEED_DEV_SCU]);
/* VIC */
if (!sysbus_realize(SYS_BUS_DEVICE(&a->vic), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->vic), 0, sc->memmap[ASPEED_DEV_VIC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&a->vic), 0,
+ sc->memmap[ASPEED_DEV_VIC]);
sysbus_connect_irq(SYS_BUS_DEVICE(&a->vic), 0,
qdev_get_gpio_in(DEVICE(&a->cpu), ARM_CPU_IRQ));
sysbus_connect_irq(SYS_BUS_DEVICE(&a->vic), 1,
if (!sysbus_realize(SYS_BUS_DEVICE(&s->rtc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_DEV_RTC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->rtc), 0,
+ sc->memmap[ASPEED_DEV_RTC]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_RTC));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->timerctrl), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->timerctrl), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->timerctrl), 0,
sc->memmap[ASPEED_DEV_TIMER1]);
for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->adc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->adc), 0,
+ sc->memmap[ASPEED_DEV_ADC]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_ADC));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->i2c), 0,
+ sc->memmap[ASPEED_DEV_I2C]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_I2C));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->peci), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->peci), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->peci), 0,
sc->memmap[ASPEED_DEV_PECI]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->peci), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_PECI));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->fmc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_DEV_FMC]);
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fmc), 1,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fmc), 0,
+ sc->memmap[ASPEED_DEV_FMC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fmc), 1,
ASPEED_SMC_GET_CLASS(&s->fmc)->flash_window_base);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_FMC));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->spi[i]), 0,
sc->memmap[ASPEED_DEV_SPI1 + i]);
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 1,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->spi[i]), 1,
ASPEED_SMC_GET_CLASS(&s->spi[i])->flash_window_base);
}
if (!sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->ehci[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->ehci[i]), 0,
sc->memmap[ASPEED_DEV_EHCI1 + i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_EHCI1 + i));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdmc), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->sdmc), 0,
sc->memmap[ASPEED_DEV_SDMC]);
/* Watch dog */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset);
}
/* RAM */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->ftgmac100[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
sc->memmap[ASPEED_DEV_ETH1 + i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_ETH1 + i));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->xdma), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->xdma), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->xdma), 0,
sc->memmap[ASPEED_DEV_XDMA]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->xdma), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_XDMA));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gpio), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->gpio), 0,
sc->memmap[ASPEED_DEV_GPIO]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_GPIO));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdhci), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->sdhci), 0,
sc->memmap[ASPEED_DEV_SDHCI]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->lpc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->lpc), 0, sc->memmap[ASPEED_DEV_LPC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->lpc), 0,
+ sc->memmap[ASPEED_DEV_LPC]);
/* Connect the LPC IRQ to the VIC */
sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 0,
if (!sysbus_realize(SYS_BUS_DEVICE(&s->hace), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->hace), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->hace), 0,
sc->memmap[ASPEED_DEV_HACE]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->hace), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_HACE));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->pcie_phy[0]), errp)) {
return false;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->pcie_phy[0]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->pcie_phy[0]), 0,
sc->memmap[ASPEED_DEV_PCIE_PHY1]);
object_property_set_int(OBJECT(&s->pcie[0]), "dram-base",
if (!sysbus_realize(SYS_BUS_DEVICE(&s->pcie[0]), errp)) {
return false;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->pcie[0]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->pcie[0]), 0,
sc->memmap[ASPEED_DEV_PCIE0]);
irq = qdev_get_gpio_in(DEVICE(&a->a7mpcore),
&error_abort);
sysbus_realize(SYS_BUS_DEVICE(&a->a7mpcore), &error_abort);
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->a7mpcore), 0, ASPEED_A7MPCORE_ADDR);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&a->a7mpcore), 0,
+ ASPEED_A7MPCORE_ADDR);
for (i = 0; i < sc->num_cpus; i++) {
SysBusDevice *sbd = SYS_BUS_DEVICE(&a->a7mpcore);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_SCU]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->scu), 0,
+ sc->memmap[ASPEED_DEV_SCU]);
/* RTC */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->rtc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_DEV_RTC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->rtc), 0,
+ sc->memmap[ASPEED_DEV_RTC]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_RTC));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->timerctrl), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->timerctrl), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->timerctrl), 0,
sc->memmap[ASPEED_DEV_TIMER1]);
for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
irq = aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->adc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->adc), 0,
+ sc->memmap[ASPEED_DEV_ADC]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_ADC));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->i2c), 0,
+ sc->memmap[ASPEED_DEV_I2C]);
for (i = 0; i < ASPEED_I2C_GET_CLASS(&s->i2c)->num_busses; i++) {
irq = qdev_get_gpio_in(DEVICE(&a->a7mpcore),
sc->irqmap[ASPEED_DEV_I2C] + i);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->peci), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->peci), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->peci), 0,
sc->memmap[ASPEED_DEV_PECI]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->peci), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_PECI));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->fmc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_DEV_FMC]);
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fmc), 1,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fmc), 0,
+ sc->memmap[ASPEED_DEV_FMC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fmc), 1,
ASPEED_SMC_GET_CLASS(&s->fmc)->flash_window_base);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_FMC));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->spi[i]), 0,
sc->memmap[ASPEED_DEV_SPI1 + i]);
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 1,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->spi[i]), 1,
ASPEED_SMC_GET_CLASS(&s->spi[i])->flash_window_base);
}
if (!sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->ehci[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->ehci[i]), 0,
sc->memmap[ASPEED_DEV_EHCI1 + i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_EHCI1 + i));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdmc), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->sdmc), 0,
sc->memmap[ASPEED_DEV_SDMC]);
/* Watch dog */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset);
}
/* RAM */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->ftgmac100[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
sc->memmap[ASPEED_DEV_ETH1 + i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_ETH1 + i));
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->mii[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->mii[i]), 0,
sc->memmap[ASPEED_DEV_MII1 + i]);
}
if (!sysbus_realize(SYS_BUS_DEVICE(&s->xdma), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->xdma), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->xdma), 0,
sc->memmap[ASPEED_DEV_XDMA]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->xdma), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_XDMA));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gpio), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->gpio), 0,
sc->memmap[ASPEED_DEV_GPIO]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_GPIO));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio_1_8v), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gpio_1_8v), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->gpio_1_8v), 0,
sc->memmap[ASPEED_DEV_GPIO_1_8V]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio_1_8v), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_GPIO_1_8V));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdhci), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->sdhci), 0,
sc->memmap[ASPEED_DEV_SDHCI]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->emmc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->emmc), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->emmc), 0,
sc->memmap[ASPEED_DEV_EMMC]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->emmc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_EMMC));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->lpc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->lpc), 0, sc->memmap[ASPEED_DEV_LPC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->lpc), 0,
+ sc->memmap[ASPEED_DEV_LPC]);
/* Connect the LPC IRQ to the GIC. It is otherwise unused. */
sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 0,
if (!sysbus_realize(SYS_BUS_DEVICE(&s->hace), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->hace), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->hace), 0,
sc->memmap[ASPEED_DEV_HACE]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->hace), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_HACE));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->i3c), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i3c), 0, sc->memmap[ASPEED_DEV_I3C]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->i3c), 0,
+ sc->memmap[ASPEED_DEV_I3C]);
for (i = 0; i < ASPEED_I3C_NR_DEVICES; i++) {
irq = qdev_get_gpio_in(DEVICE(&a->a7mpcore),
sc->irqmap[ASPEED_DEV_I3C] + i);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sbc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sbc), 0, sc->memmap[ASPEED_DEV_SBC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->sbc), 0,
+ sc->memmap[ASPEED_DEV_SBC]);
/* FSI */
for (i = 0; i < ASPEED_FSI_NUM; i++) {
if (!sysbus_realize(SYS_BUS_DEVICE(&s->fsi[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fsi[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fsi[i]), 0,
sc->memmap[ASPEED_DEV_FSI1 + i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->fsi[i]), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_FSI1 + i));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_SCU]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->scu), 0,
+ sc->memmap[ASPEED_DEV_SCU]);
/* INTC */
if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[0]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->intc[0]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&a->intc[0]), 0,
sc->memmap[ASPEED_DEV_INTC]);
/* INTCIO */
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->intc[1]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&a->intc[1]), 0,
sc->memmap[ASPEED_DEV_INTCIO]);
/* irq source orgates -> INTC0 */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_SCU]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->scu), 0,
+ sc->memmap[ASPEED_DEV_SCU]);
/* INTC */
if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[0]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->intc[0]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&a->intc[0]), 0,
sc->memmap[ASPEED_DEV_INTC]);
/* INTCIO */
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->intc[1]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&a->intc[1]), 0,
sc->memmap[ASPEED_DEV_INTCIO]);
/* irq source orgates -> INTC */
return false;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->gic), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&a->gic), 0,
sc->memmap[ASPEED_GIC_DIST]);
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->gic), 1,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&a->gic), 1,
sc->memmap[ASPEED_GIC_REDIST]);
for (i = 0; i < sc->num_cpus; i++) {
if (!sysbus_realize(SYS_BUS_DEVICE(&s->pcie_phy[i]), errp)) {
return false;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->pcie_phy[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->pcie_phy[i]), 0,
sc->memmap[ASPEED_DEV_PCIE_PHY0 + i]);
object_property_set_int(OBJECT(&s->pcie[i]), "dram-base",
if (!sysbus_realize(SYS_BUS_DEVICE(&s->pcie[i]), errp)) {
return false;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->pcie[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->pcie[i]), 0,
sc->memmap[ASPEED_DEV_PCIE0 + i]);
irq = aspeed_soc_get_irq(s, ASPEED_DEV_PCIE0 + i);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie[i].rc), 0, irq);
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->intc[0]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&a->intc[0]), 0,
sc->memmap[ASPEED_DEV_INTC]);
/* INTCIO */
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->intc[1]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&a->intc[1]), 0,
sc->memmap[ASPEED_DEV_INTCIO]);
/* irq sources -> orgates -> INTC */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_SCU]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->scu), 0,
+ sc->memmap[ASPEED_DEV_SCU]);
/* SCU1 */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->scuio), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->scuio), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->scuio), 0,
sc->memmap[ASPEED_DEV_SCUIO]);
/* UART */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->fmc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_DEV_FMC]);
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fmc), 1,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fmc), 0,
+ sc->memmap[ASPEED_DEV_FMC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fmc), 1,
ASPEED_SMC_GET_CLASS(&s->fmc)->flash_window_base);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_FMC));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->spi[i]), 0,
sc->memmap[ASPEED_DEV_SPI0 + i]);
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 1,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->spi[i]), 1,
ASPEED_SMC_GET_CLASS(&s->spi[i])->flash_window_base);
}
if (!sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->ehci[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->ehci[i]), 0,
sc->memmap[ASPEED_DEV_EHCI1 + i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_EHCI1 + i));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdmc), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->sdmc), 0,
sc->memmap[ASPEED_DEV_SDMC]);
/* RAM */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->ftgmac100[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
sc->memmap[ASPEED_DEV_ETH1 + i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_ETH1 + i));
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->mii[i]), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->mii[i]), 0,
sc->memmap[ASPEED_DEV_MII1 + i]);
}
if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset);
}
/* SLI */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sli), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sli), 0, sc->memmap[ASPEED_DEV_SLI]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->sli), 0,
+ sc->memmap[ASPEED_DEV_SLI]);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sliio), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sliio), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->sliio), 0,
sc->memmap[ASPEED_DEV_SLIIO]);
/* ADC */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->adc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->adc), 0,
+ sc->memmap[ASPEED_DEV_ADC]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_ADC));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->i2c), 0,
+ sc->memmap[ASPEED_DEV_I2C]);
for (i = 0; i < ASPEED_I2C_GET_CLASS(&s->i2c)->num_busses; i++) {
/*
* The AST2700 I2C controller has one source INTC per bus.
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gpio), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->gpio), 0,
sc->memmap[ASPEED_DEV_GPIO]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_GPIO));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->rtc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_DEV_RTC]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->rtc), 0,
+ sc->memmap[ASPEED_DEV_RTC]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_RTC));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdhci), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->sdhci), 0,
sc->memmap[ASPEED_DEV_SDHCI]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->emmc), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->emmc), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->emmc), 0,
sc->memmap[ASPEED_DEV_EMMC]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->emmc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_EMMC));
if (!sysbus_realize(SYS_BUS_DEVICE(&s->timerctrl), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->timerctrl), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->timerctrl), 0,
sc->memmap[ASPEED_DEV_TIMER1]);
for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
irq = aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->hace), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->hace), 0,
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->hace), 0,
sc->memmap[ASPEED_DEV_HACE]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->hace), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_HACE));
}
sysbus_connect_irq(SYS_BUS_DEVICE(smm), 0, aspeed_soc_get_irq(s, uart));
- aspeed_mmio_map(s, SYS_BUS_DEVICE(smm), 0, sc->memmap[uart]);
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(smm), 0, sc->memmap[uart]);
}
return true;
return true;
}
-void aspeed_mmio_map(AspeedSoCState *s, SysBusDevice *dev, int n, hwaddr addr)
+void aspeed_mmio_map(MemoryRegion *memory, SysBusDevice *dev, int n,
+ hwaddr addr)
{
- memory_region_add_subregion(s->memory, addr,
- sysbus_mmio_get_region(dev, n));
+ memory_region_add_subregion(memory, addr, sysbus_mmio_get_region(dev, n));
}
void aspeed_mmio_map_unimplemented(AspeedSoCState *s, SysBusDevice *dev,
void aspeed_soc_uart_set_chr(SerialMM *uart, int dev, int uarts_base,
int uarts_num, Chardev *chr);
bool aspeed_soc_dram_init(AspeedSoCState *s, Error **errp);
-void aspeed_mmio_map(AspeedSoCState *s, SysBusDevice *dev, int n, hwaddr addr);
+void aspeed_mmio_map(MemoryRegion *memory, SysBusDevice *dev, int n,
+ hwaddr addr);
void aspeed_mmio_map_unimplemented(AspeedSoCState *s, SysBusDevice *dev,
const char *name, hwaddr addr,
uint64_t size);