arm64: dts: exynos990: Enable PERIC0 and PERIC1 clock controllers

Add clock controller nodes for PERIC0 and PERIC1 blocks for USI nodes.

Signed-off-by: Denzeel Oliva <wachiturroxd150@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dts/exynos/exynos990.dtsi
index bd5e086ac46d3010ace413e2eeb2cd30d7f7672c..7179109c49d0b0984c8d8eb2d24c0be1c6e015c3 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos990.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi
@@ -249,12 +249,34 @@
                        #size-cells = <1>;
                };
 
+               cmu_peric0: clock-controller@10400000 {
+                       compatible = "samsung,exynos990-cmu-peric0";
+                       reg = <0x10400000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&oscclk>,
+                                <&cmu_top CLK_DOUT_CMU_PERIC0_BUS>,
+                                <&cmu_top CLK_DOUT_CMU_PERIC0_IP>;
+                       clock-names = "oscclk", "bus", "ip";
+               };
+
                pinctrl_peric0: pinctrl@10430000 {
                        compatible = "samsung,exynos990-pinctrl";
                        reg = <0x10430000 0x1000>;
                        interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
                };
 
+               cmu_peric1: clock-controller@10700000 {
+                       compatible = "samsung,exynos990-cmu-peric1";
+                       reg = <0x10700000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&oscclk>,
+                                <&cmu_top CLK_DOUT_CMU_PERIC1_BUS>,
+                                <&cmu_top CLK_DOUT_CMU_PERIC1_IP>;
+                       clock-names = "oscclk", "bus", "ip";
+               };
+
                pinctrl_peric1: pinctrl@10730000 {
                        compatible = "samsung,exynos990-pinctrl";
                        reg = <0x10730000 0x1000>;