riscv: testsuite: Fix misalignment check.

This fixes a thinko in the misalignment check.  If we want to check for
vector misalignment support we need to load 16-byte elements, not
8-byte elements that will never be misaligned.

gcc/testsuite/ChangeLog:

	* lib/target-supports.exp: Fix misalignment check.

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 018a6d3a764d81d355fef8153d7628116c762146..e375b1ec02b85d85dc8fd1112b885f17e0b3ebe0 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2440,7 +2440,7 @@ proc check_effective_target_riscv_v_misalign_ok { } {
                = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
              asm ("vsetivli zero,7,e8,m1,ta,ma");
              asm ("addi a7,%0,1" : : "r" (a) : "a7" );
-             asm ("vle8.v v8,0(a7)" : : : "v8");
+             asm ("vle16.v v8,0(a7)" : : : "v8");
              return 0; } } "-march=${gcc_march}"] } {
        return 1
     }