KVM_MISA_CFG(RVM, KVM_RISCV_ISA_EXT_M),
};
+static void kvm_cpu_get_misa_ext_cfg(Object *obj, Visitor *v,
+ const char *name,
+ void *opaque, Error **errp)
+{
+ KVMCPUConfig *misa_ext_cfg = opaque;
+ target_ulong misa_bit = misa_ext_cfg->offset;
+ RISCVCPU *cpu = RISCV_CPU(obj);
+ CPURISCVState *env = &cpu->env;
+ bool value = env->misa_ext_mask & misa_bit;
+
+ visit_type_bool(v, name, &value, errp);
+}
+
static void kvm_cpu_set_misa_ext_cfg(Object *obj, Visitor *v,
const char *name,
void *opaque, Error **errp)
return *ext_enabled;
}
+static void kvm_cpu_get_multi_ext_cfg(Object *obj, Visitor *v,
+ const char *name,
+ void *opaque, Error **errp)
+{
+ KVMCPUConfig *multi_ext_cfg = opaque;
+ RISCVCPU *cpu = RISCV_CPU(obj);
+ bool value = kvm_cpu_cfg_get(cpu, multi_ext_cfg);
+
+ visit_type_bool(v, name, &value, errp);
+}
+
static void kvm_cpu_set_multi_ext_cfg(Object *obj, Visitor *v,
const char *name,
void *opaque, Error **errp)
}
}
+static void cpu_get_cfg_unavailable(Object *obj, Visitor *v,
+ const char *name,
+ void *opaque, Error **errp)
+{
+ bool value = false;
+
+ visit_type_bool(v, name, &value, errp);
+}
+
static void cpu_set_cfg_unavailable(Object *obj, Visitor *v,
const char *name,
void *opaque, Error **errp)
* to enable any of them.
*/
object_property_add(obj, prop_name, "bool",
- NULL, cpu_set_cfg_unavailable,
+ cpu_get_cfg_unavailable,
+ cpu_set_cfg_unavailable,
NULL, (void *)prop_name);
}
misa_cfg->description = riscv_get_misa_ext_description(bit);
object_property_add(cpu_obj, misa_cfg->name, "bool",
- NULL,
+ kvm_cpu_get_misa_ext_cfg,
kvm_cpu_set_misa_ext_cfg,
NULL, misa_cfg);
object_property_set_description(cpu_obj, misa_cfg->name,
KVMCPUConfig *multi_cfg = &kvm_multi_ext_cfgs[i];
object_property_add(cpu_obj, multi_cfg->name, "bool",
- NULL,
+ kvm_cpu_get_multi_ext_cfg,
kvm_cpu_set_multi_ext_cfg,
NULL, multi_cfg);
}