]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
wifi: rtw89: 8922ae: add variant info to support RTL8922AE-VS
authorPing-Ke Shih <pkshih@realtek.com>
Wed, 8 Jan 2025 02:09:55 +0000 (10:09 +0800)
committerPing-Ke Shih <pkshih@realtek.com>
Sun, 12 Jan 2025 01:36:49 +0000 (09:36 +0800)
RTL8922AE-VS is a variant of RTL8922AE, which is supported by firmware
version after 0.35.54.0 and only can support up to MCS11. Add a variant
struct to describe these requirements accordingly.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20250108020955.14668-3-pkshih@realtek.com
16 files changed:
drivers/net/wireless/realtek/rtw89/Kconfig
drivers/net/wireless/realtek/rtw89/core.c
drivers/net/wireless/realtek/rtw89/core.h
drivers/net/wireless/realtek/rtw89/fw.c
drivers/net/wireless/realtek/rtw89/mac.c
drivers/net/wireless/realtek/rtw89/pci.c
drivers/net/wireless/realtek/rtw89/phy.c
drivers/net/wireless/realtek/rtw89/phy.h
drivers/net/wireless/realtek/rtw89/rtw8851be.c
drivers/net/wireless/realtek/rtw89/rtw8852ae.c
drivers/net/wireless/realtek/rtw89/rtw8852be.c
drivers/net/wireless/realtek/rtw89/rtw8852bte.c
drivers/net/wireless/realtek/rtw89/rtw8852ce.c
drivers/net/wireless/realtek/rtw89/rtw8922a.c
drivers/net/wireless/realtek/rtw89/rtw8922a.h
drivers/net/wireless/realtek/rtw89/rtw8922ae.c

index d2a3361669d7a64bae3e21629cad7a86dc4c1755..b1c86cdd9c0e89446ab23859b2c7a8e4e4d18ad9 100644 (file)
@@ -96,17 +96,19 @@ config RTW89_8852CE
          802.11ax PCIe wireless network (Wi-Fi 6E) adapter
 
 config RTW89_8922AE
-       tristate "Realtek 8922AE PCI wireless network (Wi-Fi 7) adapter"
+       tristate "Realtek 8922AE/8922AE-VS PCI wireless network (Wi-Fi 7) adapter"
        depends on PCI
        select RTW89_CORE
        select RTW89_PCI
        select RTW89_8922A
        help
-         Select this option will enable support for 8922AE chipset
+         Select this option will enable support for 8922AE/8922AE-VS chipset
 
          802.11be PCIe wireless network (Wi-Fi 7) adapter
          supporting 2x2 2GHz/5GHz/6GHz 4096-QAM 160MHz channels.
 
+         The variant 8922AE-VS has the same features except 1024-QAM.
+
 config RTW89_DEBUG
        bool
 
index 74bf590ad88c70705fdd5de977a1c854c3f597de..85f739f1173d8d1607362800b58291404cbfd7fc 100644 (file)
@@ -4235,13 +4235,17 @@ static void rtw89_init_eht_cap(struct rtw89_dev *rtwdev,
        struct ieee80211_eht_mcs_nss_supp *eht_nss;
        struct ieee80211_sta_eht_cap *eht_cap;
        struct rtw89_hal *hal = &rtwdev->hal;
+       bool support_mcs_12_13 = true;
        bool support_320mhz = false;
+       u8 val, val_mcs13;
        int sts = 8;
-       u8 val;
 
        if (chip->chip_gen == RTW89_CHIP_AX)
                return;
 
+       if (hal->no_mcs_12_13)
+               support_mcs_12_13 = false;
+
        if (band == NL80211_BAND_6GHZ &&
            chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_320))
                support_320mhz = true;
@@ -4299,16 +4303,18 @@ static void rtw89_init_eht_cap(struct rtw89_dev *rtwdev,
 
        val = u8_encode_bits(hal->rx_nss, IEEE80211_EHT_MCS_NSS_RX) |
              u8_encode_bits(hal->tx_nss, IEEE80211_EHT_MCS_NSS_TX);
+       val_mcs13 = support_mcs_12_13 ? val : 0;
+
        eht_nss->bw._80.rx_tx_mcs9_max_nss = val;
        eht_nss->bw._80.rx_tx_mcs11_max_nss = val;
-       eht_nss->bw._80.rx_tx_mcs13_max_nss = val;
+       eht_nss->bw._80.rx_tx_mcs13_max_nss = val_mcs13;
        eht_nss->bw._160.rx_tx_mcs9_max_nss = val;
        eht_nss->bw._160.rx_tx_mcs11_max_nss = val;
-       eht_nss->bw._160.rx_tx_mcs13_max_nss = val;
+       eht_nss->bw._160.rx_tx_mcs13_max_nss = val_mcs13;
        if (support_320mhz) {
                eht_nss->bw._320.rx_tx_mcs9_max_nss = val;
                eht_nss->bw._320.rx_tx_mcs11_max_nss = val;
-               eht_nss->bw._320.rx_tx_mcs13_max_nss = val;
+               eht_nss->bw._320.rx_tx_mcs13_max_nss = val_mcs13;
        }
 }
 
@@ -5343,7 +5349,8 @@ EXPORT_SYMBOL(rtw89_core_unregister);
 
 struct rtw89_dev *rtw89_alloc_ieee80211_hw(struct device *device,
                                           u32 bus_data_size,
-                                          const struct rtw89_chip_info *chip)
+                                          const struct rtw89_chip_info *chip,
+                                          const struct rtw89_chip_variant *variant)
 {
        struct rtw89_fw_info early_fw = {};
        const struct firmware *firmware;
@@ -5401,6 +5408,7 @@ struct rtw89_dev *rtw89_alloc_ieee80211_hw(struct device *device,
        rtwdev->dev = device;
        rtwdev->ops = ops;
        rtwdev->chip = chip;
+       rtwdev->variant = variant;
        rtwdev->fw.req.firmware = firmware;
        rtwdev->fw.fw_format = fw_format;
        rtwdev->support_mlo = support_mlo;
index 62b9d124f3feba9731f19a31502913dcd187d928..ff4894c7fa8a5c26daf43f9291a7de59b5170853 100644 (file)
@@ -4367,12 +4367,18 @@ struct rtw89_chip_info {
        const struct rtw89_xtal_info *xtal_info;
 };
 
+struct rtw89_chip_variant {
+       bool no_mcs_12_13: 1;
+       u32 fw_min_ver_code;
+};
+
 union rtw89_bus_info {
        const struct rtw89_pci_info *pci;
 };
 
 struct rtw89_driver_info {
        const struct rtw89_chip_info *chip;
+       const struct rtw89_chip_variant *variant;
        const struct dmi_system_id *quirks;
        union rtw89_bus_info bus;
 };
@@ -4747,6 +4753,8 @@ struct rtw89_hal {
        bool ant_diversity_fixed;
        bool support_cckpd;
        bool support_igi;
+       bool no_mcs_12_13;
+
        atomic_t roc_chanctx_idx;
 
        DECLARE_BITMAP(changes, NUM_OF_RTW89_CHANCTX_CHANGES);
@@ -5605,6 +5613,7 @@ struct rtw89_dev {
        enum rtw89_mlo_dbcc_mode mlo_dbcc_mode;
        struct rtw89_hw_scan_info scan_info;
        const struct rtw89_chip_info *chip;
+       const struct rtw89_chip_variant *variant;
        const struct rtw89_pci_info *pci_info;
        const struct rtw89_rfe_parms *rfe_parms;
        struct rtw89_hal hal;
@@ -7040,7 +7049,8 @@ int rtw89_core_register(struct rtw89_dev *rtwdev);
 void rtw89_core_unregister(struct rtw89_dev *rtwdev);
 struct rtw89_dev *rtw89_alloc_ieee80211_hw(struct device *device,
                                           u32 bus_data_size,
-                                          const struct rtw89_chip_info *chip);
+                                          const struct rtw89_chip_info *chip,
+                                          const struct rtw89_chip_variant *variant);
 void rtw89_free_ieee80211_hw(struct rtw89_dev *rtwdev);
 u8 rtw89_acquire_mac_id(struct rtw89_dev *rtwdev);
 void rtw89_release_mac_id(struct rtw89_dev *rtwdev, u8 mac_id);
index 7c683ce74e59edb62d4eea72237fc34711866f7e..5d4ad23cc3bd4dd2809d95432bb48a53fc83c027 100644 (file)
@@ -806,6 +806,27 @@ out:
        return firmware;
 }
 
+static int rtw89_fw_validate_ver_required(struct rtw89_dev *rtwdev)
+{
+       const struct rtw89_chip_variant *variant = rtwdev->variant;
+       const struct rtw89_fw_suit *fw_suit;
+       u32 suit_ver_code;
+
+       if (!variant)
+               return 0;
+
+       fw_suit = rtw89_fw_suit_get(rtwdev, RTW89_FW_NORMAL);
+       suit_ver_code = RTW89_FW_SUIT_VER_CODE(fw_suit);
+
+       if (variant->fw_min_ver_code > suit_ver_code) {
+               rtw89_err(rtwdev, "minimum required firmware version is 0x%x\n",
+                         variant->fw_min_ver_code);
+               return -ENOENT;
+       }
+
+       return 0;
+}
+
 int rtw89_fw_recognize(struct rtw89_dev *rtwdev)
 {
        const struct rtw89_chip_info *chip = rtwdev->chip;
@@ -822,6 +843,10 @@ int rtw89_fw_recognize(struct rtw89_dev *rtwdev)
                return ret;
 
 normal_done:
+       ret = rtw89_fw_validate_ver_required(rtwdev);
+       if (ret)
+               return ret;
+
        /* It still works if wowlan firmware isn't existing. */
        __rtw89_fw_recognize(rtwdev, RTW89_FW_WOWLAN, false);
 
index e362214669dbdfc4dd97c5bd9c11d3c3b8a2f239..a37c6d525d6f0a895a0ad5095648f18075de6cf5 100644 (file)
@@ -3001,8 +3001,10 @@ static int rtw89_mac_setup_phycap_part0(struct rtw89_dev *rtwdev)
 
 static int rtw89_mac_setup_phycap_part1(struct rtw89_dev *rtwdev)
 {
+       const struct rtw89_chip_variant *variant = rtwdev->variant;
        const struct rtw89_c2hreg_phycap *phycap;
        struct rtw89_mac_c2h_info c2h_info = {};
+       struct rtw89_hal *hal = &rtwdev->hal;
        u8 qam_raw, qam;
        int ret;
 
@@ -3025,7 +3027,12 @@ static int rtw89_mac_setup_phycap_part1(struct rtw89_dev *rtwdev)
                break;
        }
 
-       rtw89_debug(rtwdev, RTW89_DBG_FW, "phycap qam=%d/%d\n", qam_raw, qam);
+       if ((variant && variant->no_mcs_12_13) ||
+           qam <= RTW89_C2HREG_PHYCAP_P1_W2_QAM_1024)
+               hal->no_mcs_12_13 = true;
+
+       rtw89_debug(rtwdev, RTW89_DBG_FW, "phycap qam=%d/%d no_mcs_12_13=%d\n",
+                   qam_raw, qam, hal->no_mcs_12_13);
 
        return 0;
 }
index 3b3b12fe4136de4c79acfa766e4b315e93de31f8..c2fe5a898dc717822d3083d669e7436d80808f23 100644 (file)
@@ -4426,7 +4426,7 @@ int rtw89_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 
        rtwdev = rtw89_alloc_ieee80211_hw(&pdev->dev,
                                          sizeof(struct rtw89_pci),
-                                         info->chip);
+                                         info->chip, info->variant);
        if (!rtwdev) {
                dev_err(&pdev->dev, "failed to allocate hw\n");
                return -ENOMEM;
index 4e3754fd18fd4c697e240dc580bc31fb09df201d..c7c05f7fda1d5ba8295a9b713c534f1b6ddf4364 100644 (file)
@@ -261,6 +261,9 @@ rtw89_ra_mask_he_rates[4] = {RA_MASK_HE_1SS_RATES, RA_MASK_HE_2SS_RATES,
 static const u64
 rtw89_ra_mask_eht_rates[4] = {RA_MASK_EHT_1SS_RATES, RA_MASK_EHT_2SS_RATES,
                              RA_MASK_EHT_3SS_RATES, RA_MASK_EHT_4SS_RATES};
+static const u64
+rtw89_ra_mask_eht_mcs0_11[4] = {RA_MASK_EHT_1SS_MCS0_11, RA_MASK_EHT_2SS_MCS0_11,
+                               RA_MASK_EHT_3SS_MCS0_11, RA_MASK_EHT_4SS_MCS0_11};
 
 static void rtw89_phy_ra_gi_ltf(struct rtw89_dev *rtwdev,
                                struct rtw89_sta_link *rtwsta_link,
@@ -330,7 +333,12 @@ static void rtw89_phy_ra_sta_update(struct rtw89_dev *rtwdev,
        if (link_sta->eht_cap.has_eht) {
                mode |= RTW89_RA_MODE_EHT;
                ra_mask |= get_eht_ra_mask(link_sta);
-               high_rate_masks = rtw89_ra_mask_eht_rates;
+
+               if (rtwdev->hal.no_mcs_12_13)
+                       high_rate_masks = rtw89_ra_mask_eht_mcs0_11;
+               else
+                       high_rate_masks = rtw89_ra_mask_eht_rates;
+
                rtw89_phy_ra_gi_ltf(rtwdev, rtwsta_link, link_sta,
                                    chan, &fix_giltf_en, &fix_giltf);
        } else if (link_sta->he_cap.has_he) {
index 697ee47fe325cc2d0cb1ba6202c280f8ac6caaea..08b635c93ac3ec0957702eab51f8666fc4063d81 100644 (file)
 #define RA_MASK_EHT_2SS_RATES  GENMASK_ULL(43, 28)
 #define RA_MASK_EHT_3SS_RATES  GENMASK_ULL(59, 44)
 #define RA_MASK_EHT_4SS_RATES  GENMASK_ULL(62, 60)
+#define RA_MASK_EHT_1SS_MCS0_11        GENMASK_ULL(23, 12)
+#define RA_MASK_EHT_2SS_MCS0_11        GENMASK_ULL(39, 28)
+#define RA_MASK_EHT_3SS_MCS0_11        GENMASK_ULL(55, 44)
+#define RA_MASK_EHT_4SS_MCS0_11        GENMASK_ULL(62, 60)
 #define RA_MASK_EHT_RATES      GENMASK_ULL(62, 12)
 
 #define CFO_TRK_ENABLE_TH (2 << 2)
index cfe744cc7f30eea0fc713cc9d1071737a7efc869..5810af8252425c289ff8f676a0d87fbdedc8c0ec 100644 (file)
@@ -67,6 +67,7 @@ static const struct rtw89_pci_info rtw8851b_pci_info = {
 
 static const struct rtw89_driver_info rtw89_8851be_info = {
        .chip = &rtw8851b_chip_info,
+       .variant = NULL,
        .quirks = NULL,
        .bus = {
                .pci = &rtw8851b_pci_info,
index 08e39f0572bc37a4012ce71b2eab1deb63c032f2..2037713e3952e94794214581d4c3986a9c358448 100644 (file)
@@ -65,6 +65,7 @@ static const struct rtw89_pci_info rtw8852a_pci_info = {
 
 static const struct rtw89_driver_info rtw89_8852ae_info = {
        .chip = &rtw8852a_chip_info,
+       .variant = NULL,
        .quirks = NULL,
        .bus = {
                .pci = &rtw8852a_pci_info,
index 42004ac52aee83410a8d7081df1c3cf0b371785c..abdeafc14b0b9e95636439e8a187669148b9e54e 100644 (file)
@@ -67,6 +67,7 @@ static const struct rtw89_pci_info rtw8852b_pci_info = {
 
 static const struct rtw89_driver_info rtw89_8852be_info = {
        .chip = &rtw8852b_chip_info,
+       .variant = NULL,
        .quirks = NULL,
        .bus = {
                .pci = &rtw8852b_pci_info,
index e482c9893e11e4e8b54092ad0d2a585a9f30a511..b69fa17beb33dbd9a05b3fe8c15d327a4c2b4900 100644 (file)
@@ -73,6 +73,7 @@ static const struct rtw89_pci_info rtw8852bt_pci_info = {
 
 static const struct rtw89_driver_info rtw89_8852bte_info = {
        .chip = &rtw8852bt_chip_info,
+       .variant = NULL,
        .quirks = NULL,
        .bus = {
                .pci = &rtw8852bt_pci_info,
index 6b565acc4cdf9ccf1b83ce795822239cd28e65f1..5d864fd5974e15163090a0da0369f1a131af8ed1 100644 (file)
@@ -96,6 +96,7 @@ static const struct dmi_system_id rtw8852c_pci_quirks[] = {
 
 static const struct rtw89_driver_info rtw89_8852ce_info = {
        .chip = &rtw8852c_chip_info,
+       .variant = NULL,
        .quirks = rtw8852c_pci_quirks,
        .bus = {
                .pci = &rtw8852c_pci_info,
index f04cb3b1137228292adfa15ceff8dc0d2eced1a1..11d66bfceb15f135a5b2c63b670cf60e0a5af841 100644 (file)
@@ -2838,6 +2838,12 @@ const struct rtw89_chip_info rtw8922a_chip_info = {
 };
 EXPORT_SYMBOL(rtw8922a_chip_info);
 
+const struct rtw89_chip_variant rtw8922ae_vs_variant = {
+       .no_mcs_12_13 = true,
+       .fw_min_ver_code = RTW89_FW_VER_CODE(0, 35, 54, 0),
+};
+EXPORT_SYMBOL(rtw8922ae_vs_variant);
+
 MODULE_FIRMWARE(RTW8922A_MODULE_FIRMWARE);
 MODULE_AUTHOR("Realtek Corporation");
 MODULE_DESCRIPTION("Realtek 802.11be wireless 8922A driver");
index 597317ab6af7653f877646810dfb34d0b8e934ed..a29cfa5b429157ebca4674438fff25c31b48ebeb 100644 (file)
@@ -69,5 +69,6 @@ struct rtw8922a_efuse {
 } __packed;
 
 extern const struct rtw89_chip_info rtw8922a_chip_info;
+extern const struct rtw89_chip_variant rtw8922ae_vs_variant;
 
 #endif
index 568d5bd134f9f9d616bb76ac2c3885e39eeeea28..0ea8d5281c10728337b30f2b207d5bc476c41c64 100644 (file)
@@ -71,6 +71,16 @@ static const struct rtw89_pci_info rtw8922a_pci_info = {
 
 static const struct rtw89_driver_info rtw89_8922ae_info = {
        .chip = &rtw8922a_chip_info,
+       .variant = NULL,
+       .quirks = NULL,
+       .bus = {
+               .pci = &rtw8922a_pci_info,
+       },
+};
+
+static const struct rtw89_driver_info rtw89_8922ae_vs_info = {
+       .chip = &rtw8922a_chip_info,
+       .variant = &rtw8922ae_vs_variant,
        .quirks = NULL,
        .bus = {
                .pci = &rtw8922a_pci_info,
@@ -82,6 +92,10 @@ static const struct pci_device_id rtw89_8922ae_id_table[] = {
                PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8922),
                .driver_data = (kernel_ulong_t)&rtw89_8922ae_info,
        },
+       {
+               PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x892B),
+               .driver_data = (kernel_ulong_t)&rtw89_8922ae_vs_info,
+       },
        {},
 };
 MODULE_DEVICE_TABLE(pci, rtw89_8922ae_id_table);
@@ -96,5 +110,5 @@ static struct pci_driver rtw89_8922ae_driver = {
 module_pci_driver(rtw89_8922ae_driver);
 
 MODULE_AUTHOR("Realtek Corporation");
-MODULE_DESCRIPTION("Realtek 802.11be wireless 8922AE driver");
+MODULE_DESCRIPTION("Realtek 802.11be wireless 8922AE/8922AE-VS driver");
 MODULE_LICENSE("Dual BSD/GPL");