drm/amdgpu: Update the impelmentation of AMDGPU_PTE_MTYPE_VG10

This patch changes the implementation of AMDGPU_PTE_MTYPE_VG10,
clear the bits before setting the new one.

Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: longlyao <Longlong.Yao@amd.com>
Signed-off-by: Shane Xiao <shane.xiao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 0364a7bb58937af61b44d389fa264a7969872982..f09f33d1beec350d4cdac5ab9c6ade1c03be4205 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -844,8 +844,7 @@ static void amdgpu_ttm_gart_bind_gfx9_mqd(struct amdgpu_device *adev,
        int num_xcc = max(1U, adev->gfx.num_xcc_per_xcp);
        uint64_t page_idx, pages_per_xcc;
        int i;
-       uint64_t ctrl_flags = (flags & ~AMDGPU_PTE_MTYPE_VG10_MASK) |
-                       AMDGPU_PTE_MTYPE_VG10(AMDGPU_MTYPE_NC);
+       uint64_t ctrl_flags = AMDGPU_PTE_MTYPE_VG10(flags, AMDGPU_MTYPE_NC);
 
        pages_per_xcc = total_pages;
        do_div(pages_per_xcc, num_xcc);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 8019f0d14a8dc1f5ab0e663c61f4e5c1718d0080..8e3501e3765b41585eba445b545c406fc43e93d3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -94,8 +94,11 @@ struct amdgpu_mem_stats;
 #define AMDGPU_VM_NORETRY_FLAGS_TF (AMDGPU_PTE_VALID | AMDGPU_PTE_SYSTEM | \
                                   AMDGPU_PTE_PRT)
 /* For GFX9 */
-#define AMDGPU_PTE_MTYPE_VG10(a)       ((uint64_t)(a) << 57)
-#define AMDGPU_PTE_MTYPE_VG10_MASK     AMDGPU_PTE_MTYPE_VG10(3ULL)
+#define AMDGPU_PTE_MTYPE_VG10_SHIFT(mtype)     ((uint64_t)(mtype) << 57)
+#define AMDGPU_PTE_MTYPE_VG10_MASK     AMDGPU_PTE_MTYPE_VG10_SHIFT(3ULL)
+#define AMDGPU_PTE_MTYPE_VG10(flags, mtype)                    \
+       (((uint64_t)(flags) & (~AMDGPU_PTE_MTYPE_VG10_MASK)) |  \
+         AMDGPU_PTE_MTYPE_VG10_SHIFT(mtype))
 
 #define AMDGPU_MTYPE_NC 0
 #define AMDGPU_MTYPE_CC 2

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 350f6b6676f1459cd1350c4aa38ee84322ab92a4..88b4644f8e9601c80d21b6a29ffcfa5d8600a232 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1075,19 +1075,19 @@ static uint64_t gmc_v9_0_map_mtype(struct amdgpu_device *adev, uint32_t flags)
 {
        switch (flags) {
        case AMDGPU_VM_MTYPE_DEFAULT:
-               return AMDGPU_PTE_MTYPE_VG10(MTYPE_NC);
+               return AMDGPU_PTE_MTYPE_VG10(0ULL, MTYPE_NC);
        case AMDGPU_VM_MTYPE_NC:
-               return AMDGPU_PTE_MTYPE_VG10(MTYPE_NC);
+               return AMDGPU_PTE_MTYPE_VG10(0ULL, MTYPE_NC);
        case AMDGPU_VM_MTYPE_WC:
-               return AMDGPU_PTE_MTYPE_VG10(MTYPE_WC);
+               return AMDGPU_PTE_MTYPE_VG10(0ULL, MTYPE_WC);
        case AMDGPU_VM_MTYPE_RW:
-               return AMDGPU_PTE_MTYPE_VG10(MTYPE_RW);
+               return AMDGPU_PTE_MTYPE_VG10(0ULL, MTYPE_RW);
        case AMDGPU_VM_MTYPE_CC:
-               return AMDGPU_PTE_MTYPE_VG10(MTYPE_CC);
+               return AMDGPU_PTE_MTYPE_VG10(0ULL, MTYPE_CC);
        case AMDGPU_VM_MTYPE_UC:
-               return AMDGPU_PTE_MTYPE_VG10(MTYPE_UC);
+               return AMDGPU_PTE_MTYPE_VG10(0ULL, MTYPE_UC);
        default:
-               return AMDGPU_PTE_MTYPE_VG10(MTYPE_NC);
+               return AMDGPU_PTE_MTYPE_VG10(0ULL, MTYPE_NC);
        }
 }
 
@@ -1228,8 +1228,8 @@ static void gmc_v9_0_get_coherence_flags(struct amdgpu_device *adev,
        }
 
        if (mtype != MTYPE_NC)
-               *flags = (*flags & ~AMDGPU_PTE_MTYPE_VG10_MASK) |
-                        AMDGPU_PTE_MTYPE_VG10(mtype);
+               *flags = AMDGPU_PTE_MTYPE_VG10(*flags, mtype);
+
        *flags |= snoop ? AMDGPU_PTE_SNOOPED : 0;
 }
 
@@ -1281,9 +1281,9 @@ static void gmc_v9_0_override_vm_pte_flags(struct amdgpu_device *adev,
         * and can also be overridden.
         */
        if ((*flags & AMDGPU_PTE_MTYPE_VG10_MASK) !=
-           AMDGPU_PTE_MTYPE_VG10(MTYPE_NC) &&
+           AMDGPU_PTE_MTYPE_VG10(0ULL, MTYPE_NC) &&
            (*flags & AMDGPU_PTE_MTYPE_VG10_MASK) !=
-           AMDGPU_PTE_MTYPE_VG10(MTYPE_UC)) {
+           AMDGPU_PTE_MTYPE_VG10(0ULL, MTYPE_UC)) {
                dev_dbg_ratelimited(adev->dev, "MTYPE is not NC or UC\n");
                return;
        }
@@ -1312,7 +1312,7 @@ static void gmc_v9_0_override_vm_pte_flags(struct amdgpu_device *adev,
        if (nid == local_node) {
                uint64_t old_flags = *flags;
                if ((*flags & AMDGPU_PTE_MTYPE_VG10_MASK) ==
-                       AMDGPU_PTE_MTYPE_VG10(MTYPE_NC)) {
+                       AMDGPU_PTE_MTYPE_VG10(0ULL, MTYPE_NC)) {
                        unsigned int mtype_local = MTYPE_RW;
 
                        if (amdgpu_mtype_local == 1)
@@ -1320,12 +1320,10 @@ static void gmc_v9_0_override_vm_pte_flags(struct amdgpu_device *adev,
                        else if (amdgpu_mtype_local == 2)
                                mtype_local = MTYPE_CC;
 
-                       *flags = (*flags & ~AMDGPU_PTE_MTYPE_VG10_MASK) |
-                                AMDGPU_PTE_MTYPE_VG10(mtype_local);
+                       *flags = AMDGPU_PTE_MTYPE_VG10(*flags, mtype_local);
                } else if (adev->rev_id) {
                        /* MTYPE_UC case */
-                       *flags = (*flags & ~AMDGPU_PTE_MTYPE_VG10_MASK) |
-                                AMDGPU_PTE_MTYPE_VG10(MTYPE_CC);
+                       *flags = AMDGPU_PTE_MTYPE_VG10(*flags, MTYPE_CC);
                }
 
                dev_dbg_ratelimited(adev->dev, "flags updated from %llx to %llx\n",
@@ -1772,7 +1770,7 @@ static int gmc_v9_0_gart_init(struct amdgpu_device *adev)
        if (r)
                return r;
        adev->gart.table_size = adev->gart.num_gpu_pages * 8;
-       adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_VG10(MTYPE_UC) |
+       adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_VG10(0ULL, MTYPE_UC) |
                                 AMDGPU_PTE_EXECUTABLE;
 
        if (!adev->gmc.real_vram_size) {