--- /dev/null
+From 31f3010e60522ede237fb145a63b4af5a41718c2 Mon Sep 17 00:00:00 2001
+From: Olof Johansson <olof@lixom.net>
+Date: Wed, 18 Dec 2019 01:18:49 +0100
+Subject: ARM: 8949/1: mm: mark free_memmap as __init
+
+From: Olof Johansson <olof@lixom.net>
+
+commit 31f3010e60522ede237fb145a63b4af5a41718c2 upstream.
+
+As of commit ac7c3e4ff401 ("compiler: enable CONFIG_OPTIMIZE_INLINING
+forcibly"), free_memmap() might not always be inlined, and thus is
+triggering a section warning:
+
+WARNING: vmlinux.o(.text.unlikely+0x904): Section mismatch in reference from the function free_memmap() to the function .meminit.text:memblock_free()
+
+Mark it as __init, since the faller (free_unused_memmap) already is.
+
+Fixes: ac7c3e4ff401 ("compiler: enable CONFIG_OPTIMIZE_INLINING forcibly")
+Signed-off-by: Olof Johansson <olof@lixom.net>
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/mm/init.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/mm/init.c
++++ b/arch/arm/mm/init.c
+@@ -357,7 +357,7 @@ static inline void poison_init_mem(void
+ *p++ = 0xe7fddef0;
+ }
+
+-static inline void
++static inline void __init
+ free_memmap(unsigned long start_pfn, unsigned long end_pfn)
+ {
+ struct page *start_pg, *end_pg;
--- /dev/null
+From 449443c03d8cfdacf7313e17779a2594ebf87e6d Mon Sep 17 00:00:00 2001
+From: Suzuki K Poulose <suzuki.poulose@arm.com>
+Date: Mon, 13 Jan 2020 23:30:19 +0000
+Subject: arm64: cpufeature: Fix the type of no FP/SIMD capability
+
+From: Suzuki K Poulose <suzuki.poulose@arm.com>
+
+commit 449443c03d8cfdacf7313e17779a2594ebf87e6d upstream.
+
+The NO_FPSIMD capability is defined with scope SYSTEM, which implies
+that the "absence" of FP/SIMD on at least one CPU is detected only
+after all the SMP CPUs are brought up. However, we use the status
+of this capability for every context switch. So, let us change
+the scope to LOCAL_CPU to allow the detection of this capability
+as and when the first CPU without FP is brought up.
+
+Also, the current type allows hotplugged CPU to be brought up without
+FP/SIMD when all the current CPUs have FP/SIMD and we have the userspace
+up. Fix both of these issues by changing the capability to
+BOOT_RESTRICTED_LOCAL_CPU_FEATURE.
+
+Fixes: 82e0191a1aa11abf ("arm64: Support systems without FP/ASIMD")
+Cc: Will Deacon <will@kernel.org>
+Cc: Mark Rutland <mark.rutland@arm.com>
+Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
+Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
+Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
+Signed-off-by: Will Deacon <will@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/kernel/cpufeature.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/kernel/cpufeature.c
++++ b/arch/arm64/kernel/cpufeature.c
+@@ -1241,7 +1241,7 @@ static const struct arm64_cpu_capabiliti
+ {
+ /* FP/SIMD is not implemented */
+ .capability = ARM64_HAS_NO_FPSIMD,
+- .type = ARM64_CPUCAP_SYSTEM_FEATURE,
++ .type = ARM64_CPUCAP_BOOT_RESTRICTED_CPU_LOCAL_FEATURE,
+ .min_field_value = 0,
+ .matches = has_no_fpsimd,
+ },
--- /dev/null
+From c9d66999f064947e6b577ceacc1eb2fbca6a8d3c Mon Sep 17 00:00:00 2001
+From: Suzuki K Poulose <suzuki.poulose@arm.com>
+Date: Mon, 13 Jan 2020 23:30:21 +0000
+Subject: arm64: ptrace: nofpsimd: Fail FP/SIMD regset operations
+
+From: Suzuki K Poulose <suzuki.poulose@arm.com>
+
+commit c9d66999f064947e6b577ceacc1eb2fbca6a8d3c upstream.
+
+When fp/simd is not supported on the system, fail the operations
+of FP/SIMD regsets.
+
+Fixes: 82e0191a1aa11abf ("arm64: Support systems without FP/ASIMD")
+Cc: Will Deacon <will@kernel.org>
+Cc: Mark Rutland <mark.rutland@arm.com>
+Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
+Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
+Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
+Signed-off-by: Will Deacon <will@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/kernel/ptrace.c | 21 +++++++++++++++++++++
+ 1 file changed, 21 insertions(+)
+
+--- a/arch/arm64/kernel/ptrace.c
++++ b/arch/arm64/kernel/ptrace.c
+@@ -627,6 +627,13 @@ static int gpr_set(struct task_struct *t
+ return 0;
+ }
+
++static int fpr_active(struct task_struct *target, const struct user_regset *regset)
++{
++ if (!system_supports_fpsimd())
++ return -ENODEV;
++ return regset->n;
++}
++
+ /*
+ * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
+ */
+@@ -649,6 +656,9 @@ static int fpr_get(struct task_struct *t
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+ {
++ if (!system_supports_fpsimd())
++ return -EINVAL;
++
+ if (target == current)
+ fpsimd_preserve_current_state();
+
+@@ -688,6 +698,9 @@ static int fpr_set(struct task_struct *t
+ {
+ int ret;
+
++ if (!system_supports_fpsimd())
++ return -EINVAL;
++
+ ret = __fpr_set(target, regset, pos, count, kbuf, ubuf, 0);
+ if (ret)
+ return ret;
+@@ -990,6 +1003,7 @@ static const struct user_regset aarch64_
+ */
+ .size = sizeof(u32),
+ .align = sizeof(u32),
++ .active = fpr_active,
+ .get = fpr_get,
+ .set = fpr_set
+ },
+@@ -1176,6 +1190,9 @@ static int compat_vfp_get(struct task_st
+ compat_ulong_t fpscr;
+ int ret, vregs_end_pos;
+
++ if (!system_supports_fpsimd())
++ return -EINVAL;
++
+ uregs = &target->thread.uw.fpsimd_state;
+
+ if (target == current)
+@@ -1209,6 +1226,9 @@ static int compat_vfp_set(struct task_st
+ compat_ulong_t fpscr;
+ int ret, vregs_end_pos;
+
++ if (!system_supports_fpsimd())
++ return -EINVAL;
++
+ uregs = &target->thread.uw.fpsimd_state;
+
+ vregs_end_pos = VFP_STATE_SIZE - sizeof(compat_ulong_t);
+@@ -1266,6 +1286,7 @@ static const struct user_regset aarch32_
+ .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
+ .size = sizeof(compat_ulong_t),
+ .align = sizeof(compat_ulong_t),
++ .active = fpr_active,
+ .get = compat_vfp_get,
+ .set = compat_vfp_set
+ },
--- /dev/null
+From b828f905904cd76424230c69741a4cabb0174168 Mon Sep 17 00:00:00 2001
+From: Eric Biggers <ebiggers@google.com>
+Date: Mon, 30 Dec 2019 21:19:32 -0600
+Subject: crypto: artpec6 - return correct error code for failed setkey()
+
+From: Eric Biggers <ebiggers@google.com>
+
+commit b828f905904cd76424230c69741a4cabb0174168 upstream.
+
+->setkey() is supposed to retun -EINVAL for invalid key lengths, not -1.
+
+Fixes: a21eb94fc4d3 ("crypto: axis - add ARTPEC-6/7 crypto accelerator driver")
+Cc: Jesper Nilsson <jesper.nilsson@axis.com>
+Cc: Lars Persson <lars.persson@axis.com>
+Signed-off-by: Eric Biggers <ebiggers@google.com>
+Acked-by: Lars Persson <lars.persson@axis.com>
+Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/crypto/axis/artpec6_crypto.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/crypto/axis/artpec6_crypto.c
++++ b/drivers/crypto/axis/artpec6_crypto.c
+@@ -1256,7 +1256,7 @@ static int artpec6_crypto_aead_set_key(s
+
+ if (len != 16 && len != 24 && len != 32) {
+ crypto_aead_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
+- return -1;
++ return -EINVAL;
+ }
+
+ ctx->key_length = len;
--- /dev/null
+From b529f1983b2dcc46354f311feda92e07b6e9e2da Mon Sep 17 00:00:00 2001
+From: Eric Biggers <ebiggers@google.com>
+Date: Mon, 30 Dec 2019 21:19:33 -0600
+Subject: crypto: atmel-sha - fix error handling when setting hmac key
+
+From: Eric Biggers <ebiggers@google.com>
+
+commit b529f1983b2dcc46354f311feda92e07b6e9e2da upstream.
+
+HMAC keys can be of any length, and atmel_sha_hmac_key_set() can only
+fail due to -ENOMEM. But atmel_sha_hmac_setkey() incorrectly treated
+any error as a "bad key length" error. Fix it to correctly propagate
+the -ENOMEM error code and not set any tfm result flags.
+
+Fixes: 81d8750b2b59 ("crypto: atmel-sha - add support to hmac(shaX)")
+Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
+Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
+Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
+Signed-off-by: Eric Biggers <ebiggers@google.com>
+Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
+Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/crypto/atmel-sha.c | 7 +------
+ 1 file changed, 1 insertion(+), 6 deletions(-)
+
+--- a/drivers/crypto/atmel-sha.c
++++ b/drivers/crypto/atmel-sha.c
+@@ -1921,12 +1921,7 @@ static int atmel_sha_hmac_setkey(struct
+ {
+ struct atmel_sha_hmac_ctx *hmac = crypto_ahash_ctx(tfm);
+
+- if (atmel_sha_hmac_key_set(&hmac->hkey, key, keylen)) {
+- crypto_ahash_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
+- return -EINVAL;
+- }
+-
+- return 0;
++ return atmel_sha_hmac_key_set(&hmac->hkey, key, keylen);
+ }
+
+ static int atmel_sha_hmac_init(struct ahash_request *req)
--- /dev/null
+From 935d43ba272e0001f8ef446a3eff15d8175cb11b Mon Sep 17 00:00:00 2001
+From: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
+Date: Wed, 13 Nov 2019 16:11:38 +0000
+Subject: iommu/arm-smmu-v3: Populate VMID field for CMDQ_OP_TLBI_NH_VA
+
+From: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
+
+commit 935d43ba272e0001f8ef446a3eff15d8175cb11b upstream.
+
+CMDQ_OP_TLBI_NH_VA requires VMID and this was missing since
+commit 1c27df1c0a82 ("iommu/arm-smmu: Use correct address mask
+for CMD_TLBI_S2_IPA"). Add it back.
+
+Fixes: 1c27df1c0a82 ("iommu/arm-smmu: Use correct address mask for CMD_TLBI_S2_IPA")
+Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
+Signed-off-by: Will Deacon <will@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/iommu/arm-smmu-v3.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/iommu/arm-smmu-v3.c
++++ b/drivers/iommu/arm-smmu-v3.c
+@@ -810,6 +810,7 @@ static int arm_smmu_cmdq_build_cmd(u64 *
+ cmd[1] |= FIELD_PREP(CMDQ_CFGI_1_RANGE, 31);
+ break;
+ case CMDQ_OP_TLBI_NH_VA:
++ cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_VMID, ent->tlbi.vmid);
+ cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_ASID, ent->tlbi.asid);
+ cmd[1] |= FIELD_PREP(CMDQ_TLBI_1_LEAF, ent->tlbi.leaf);
+ cmd[1] |= ent->tlbi.addr & CMDQ_TLBI_1_VA_MASK;
--- /dev/null
+From cf2d23e0bac9f6b5cd1cba8898f5f05ead40e530 Mon Sep 17 00:00:00 2001
+From: Gavin Shan <gshan@redhat.com>
+Date: Tue, 21 Jan 2020 16:56:59 +1100
+Subject: KVM: arm/arm64: Fix young bit from mmu notifier
+
+From: Gavin Shan <gshan@redhat.com>
+
+commit cf2d23e0bac9f6b5cd1cba8898f5f05ead40e530 upstream.
+
+kvm_test_age_hva() is called upon mmu_notifier_test_young(), but wrong
+address range has been passed to handle_hva_to_gpa(). With the wrong
+address range, no young bits will be checked in handle_hva_to_gpa().
+It means zero is always returned from mmu_notifier_test_young().
+
+This fixes the issue by passing correct address range to the underly
+function handle_hva_to_gpa(), so that the hardware young (access) bit
+will be visited.
+
+Fixes: 35307b9a5f7e ("arm/arm64: KVM: Implement Stage-2 page aging")
+Signed-off-by: Gavin Shan <gshan@redhat.com>
+Signed-off-by: Marc Zyngier <maz@kernel.org>
+Link: https://lore.kernel.org/r/20200121055659.19560-1-gshan@redhat.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ virt/kvm/arm/mmu.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/virt/kvm/arm/mmu.c
++++ b/virt/kvm/arm/mmu.c
+@@ -1925,7 +1925,8 @@ int kvm_test_age_hva(struct kvm *kvm, un
+ if (!kvm->arch.pgd)
+ return 0;
+ trace_kvm_test_age_hva(hva);
+- return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
++ return handle_hva_to_gpa(kvm, hva, hva + PAGE_SIZE,
++ kvm_test_age_hva_handler, NULL);
+ }
+
+ void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
--- /dev/null
+From 8c58be34494b7f1b2adb446e2d8beeb90e5de65b Mon Sep 17 00:00:00 2001
+From: Eric Auger <eric.auger@redhat.com>
+Date: Fri, 13 Dec 2019 10:42:37 +0100
+Subject: KVM: arm/arm64: vgic-its: Fix restoration of unmapped collections
+
+From: Eric Auger <eric.auger@redhat.com>
+
+commit 8c58be34494b7f1b2adb446e2d8beeb90e5de65b upstream.
+
+Saving/restoring an unmapped collection is a valid scenario. For
+example this happens if a MAPTI command was sent, featuring an
+unmapped collection. At the moment the CTE fails to be restored.
+Only compare against the number of online vcpus if the rdist
+base is set.
+
+Fixes: ea1ad53e1e31a ("KVM: arm64: vgic-its: Collection table save/restore")
+Signed-off-by: Eric Auger <eric.auger@redhat.com>
+Signed-off-by: Marc Zyngier <maz@kernel.org>
+Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
+Link: https://lore.kernel.org/r/20191213094237.19627-1-eric.auger@redhat.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ virt/kvm/arm/vgic/vgic-its.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/virt/kvm/arm/vgic/vgic-its.c
++++ b/virt/kvm/arm/vgic/vgic-its.c
+@@ -2292,7 +2292,8 @@ static int vgic_its_restore_cte(struct v
+ target_addr = (u32)(val >> KVM_ITS_CTE_RDBASE_SHIFT);
+ coll_id = val & KVM_ITS_CTE_ICID_MASK;
+
+- if (target_addr >= atomic_read(&kvm->online_vcpus))
++ if (target_addr != COLLECTION_NOT_MAPPED &&
++ target_addr >= atomic_read(&kvm->online_vcpus))
+ return -EINVAL;
+
+ collection = find_collection(its, coll_id);
--- /dev/null
+From 018f22f95e8a6c3e27188b7317ef2c70a34cb2cd Mon Sep 17 00:00:00 2001
+From: James Morse <james.morse@arm.com>
+Date: Tue, 21 Jan 2020 12:33:55 +0000
+Subject: KVM: arm: Fix DFSR setting for non-LPAE aarch32 guests
+
+From: James Morse <james.morse@arm.com>
+
+commit 018f22f95e8a6c3e27188b7317ef2c70a34cb2cd upstream.
+
+Beata reports that KVM_SET_VCPU_EVENTS doesn't inject the expected
+exception to a non-LPAE aarch32 guest.
+
+The host intends to inject DFSR.FS=0x14 "IMPLEMENTATION DEFINED fault
+(Lockdown fault)", but the guest receives DFSR.FS=0x04 "Fault on
+instruction cache maintenance". This fault is hooked by
+do_translation_fault() since ARMv6, which goes on to silently 'handle'
+the exception, and restart the faulting instruction.
+
+It turns out, when TTBCR.EAE is clear DFSR is split, and FS[4] has
+to shuffle up to DFSR[10].
+
+As KVM only does this in one place, fix up the static values. We
+now get the expected:
+| Unhandled fault: lock abort (0x404) at 0x9c800f00
+
+Fixes: 74a64a981662a ("KVM: arm/arm64: Unify 32bit fault injection")
+Reported-by: Beata Michalska <beata.michalska@linaro.org>
+Signed-off-by: James Morse <james.morse@arm.com>
+Signed-off-by: Marc Zyngier <maz@kernel.org>
+Link: https://lore.kernel.org/r/20200121123356.203000-2-james.morse@arm.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ virt/kvm/arm/aarch32.c | 8 +++++---
+ 1 file changed, 5 insertions(+), 3 deletions(-)
+
+--- a/virt/kvm/arm/aarch32.c
++++ b/virt/kvm/arm/aarch32.c
+@@ -192,10 +192,12 @@ static void inject_abt32(struct kvm_vcpu
+
+ /* Give the guest an IMPLEMENTATION DEFINED exception */
+ is_lpae = (vcpu_cp15(vcpu, c2_TTBCR) >> 31);
+- if (is_lpae)
++ if (is_lpae) {
+ *fsr = 1 << 9 | 0x34;
+- else
+- *fsr = 0x14;
++ } else {
++ /* Surprise! DFSR's FS[4] lives in bit 10 */
++ *fsr = BIT(10) | 0x4; /* 0x14 */
++ }
+ }
+
+ void kvm_inject_dabt32(struct kvm_vcpu *vcpu, unsigned long addr)
--- /dev/null
+From 21aecdbd7f3ab02c9b82597dc733ee759fb8b274 Mon Sep 17 00:00:00 2001
+From: James Morse <james.morse@arm.com>
+Date: Tue, 21 Jan 2020 12:33:56 +0000
+Subject: KVM: arm: Make inject_abt32() inject an external abort instead
+
+From: James Morse <james.morse@arm.com>
+
+commit 21aecdbd7f3ab02c9b82597dc733ee759fb8b274 upstream.
+
+KVM's inject_abt64() injects an external-abort into an aarch64 guest.
+The KVM_CAP_ARM_INJECT_EXT_DABT is intended to do exactly this, but
+for an aarch32 guest inject_abt32() injects an implementation-defined
+exception, 'Lockdown fault'.
+
+Change this to external abort. For non-LPAE we now get the documented:
+| Unhandled fault: external abort on non-linefetch (0x008) at 0x9c800f00
+and for LPAE:
+| Unhandled fault: synchronous external abort (0x210) at 0x9c800f00
+
+Fixes: 74a64a981662a ("KVM: arm/arm64: Unify 32bit fault injection")
+Reported-by: Beata Michalska <beata.michalska@linaro.org>
+Signed-off-by: James Morse <james.morse@arm.com>
+Signed-off-by: Marc Zyngier <maz@kernel.org>
+Link: https://lore.kernel.org/r/20200121123356.203000-3-james.morse@arm.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ virt/kvm/arm/aarch32.c | 10 +++++++---
+ 1 file changed, 7 insertions(+), 3 deletions(-)
+
+--- a/virt/kvm/arm/aarch32.c
++++ b/virt/kvm/arm/aarch32.c
+@@ -26,6 +26,10 @@
+ #include <asm/kvm_emulate.h>
+ #include <asm/kvm_hyp.h>
+
++#define DFSR_FSC_EXTABT_LPAE 0x10
++#define DFSR_FSC_EXTABT_nLPAE 0x08
++#define DFSR_LPAE BIT(9)
++
+ /*
+ * Table taken from ARMv8 ARM DDI0487B-B, table G1-10.
+ */
+@@ -193,10 +197,10 @@ static void inject_abt32(struct kvm_vcpu
+ /* Give the guest an IMPLEMENTATION DEFINED exception */
+ is_lpae = (vcpu_cp15(vcpu, c2_TTBCR) >> 31);
+ if (is_lpae) {
+- *fsr = 1 << 9 | 0x34;
++ *fsr = DFSR_LPAE | DFSR_FSC_EXTABT_LPAE;
+ } else {
+- /* Surprise! DFSR's FS[4] lives in bit 10 */
+- *fsr = BIT(10) | 0x4; /* 0x14 */
++ /* no need to shuffle FS[4] into DFSR[10] as its 0 */
++ *fsr = DFSR_FSC_EXTABT_nLPAE;
+ }
+ }
+
--- /dev/null
+From 3837407c1aa1101ed5e214c7d6041e7a23335c6e Mon Sep 17 00:00:00 2001
+From: Eric Auger <eric.auger@redhat.com>
+Date: Fri, 24 Jan 2020 15:25:32 +0100
+Subject: KVM: arm64: pmu: Don't increment SW_INCR if PMCR.E is unset
+
+From: Eric Auger <eric.auger@redhat.com>
+
+commit 3837407c1aa1101ed5e214c7d6041e7a23335c6e upstream.
+
+The specification says PMSWINC increments PMEVCNTR<n>_EL1 by 1
+if PMEVCNTR<n>_EL0 is enabled and configured to count SW_INCR.
+
+For PMEVCNTR<n>_EL0 to be enabled, we need both PMCNTENSET to
+be set for the corresponding event counter but we also need
+the PMCR.E bit to be set.
+
+Fixes: 7a0adc7064b8 ("arm64: KVM: Add access handler for PMSWINC register")
+Signed-off-by: Eric Auger <eric.auger@redhat.com>
+Signed-off-by: Marc Zyngier <maz@kernel.org>
+Reviewed-by: Andrew Murray <andrew.murray@arm.com>
+Acked-by: Marc Zyngier <maz@kernel.org>
+Link: https://lore.kernel.org/r/20200124142535.29386-2-eric.auger@redhat.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ virt/kvm/arm/pmu.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/virt/kvm/arm/pmu.c
++++ b/virt/kvm/arm/pmu.c
+@@ -316,6 +316,9 @@ void kvm_pmu_software_increment(struct k
+ if (val == 0)
+ return;
+
++ if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E))
++ return;
++
+ enable = __vcpu_sys_reg(vcpu, PMCNTENSET_EL0);
+ for (i = 0; i < ARMV8_PMU_CYCLE_IDX; i++) {
+ if (!(val & BIT(i)))
--- /dev/null
+From 0d962e061abcf1b9105f88fb850158b5887fbca3 Mon Sep 17 00:00:00 2001
+From: "Gustavo A. R. Silva" <gustavo@embeddedor.com>
+Date: Tue, 22 Oct 2019 15:25:22 +0200
+Subject: media: i2c: adv748x: Fix unsafe macros
+
+From: Gustavo A. R. Silva <gustavo@embeddedor.com>
+
+commit 0d962e061abcf1b9105f88fb850158b5887fbca3 upstream.
+
+Enclose multiple macro parameters in parentheses in order to
+make such macros safer and fix the Clang warning below:
+
+drivers/media/i2c/adv748x/adv748x-afe.c:452:12: warning: operator '?:'
+has lower precedence than '|'; '|' will be evaluated first
+[-Wbitwise-conditional-parentheses]
+
+ret = sdp_clrset(state, ADV748X_SDP_FRP, ADV748X_SDP_FRP_MASK, enable
+? ctrl->val - 1 : 0);
+
+Fixes: 3e89586a64df ("media: i2c: adv748x: add adv748x driver")
+Reported-by: Dmitry Vyukov <dvyukov@google.com>
+Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
+Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
+Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
+Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/media/i2c/adv748x/adv748x.h | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/drivers/media/i2c/adv748x/adv748x.h
++++ b/drivers/media/i2c/adv748x/adv748x.h
+@@ -361,10 +361,10 @@ int adv748x_write_block(struct adv748x_s
+
+ #define io_read(s, r) adv748x_read(s, ADV748X_PAGE_IO, r)
+ #define io_write(s, r, v) adv748x_write(s, ADV748X_PAGE_IO, r, v)
+-#define io_clrset(s, r, m, v) io_write(s, r, (io_read(s, r) & ~m) | v)
++#define io_clrset(s, r, m, v) io_write(s, r, (io_read(s, r) & ~(m)) | (v))
+
+ #define hdmi_read(s, r) adv748x_read(s, ADV748X_PAGE_HDMI, r)
+-#define hdmi_read16(s, r, m) (((hdmi_read(s, r) << 8) | hdmi_read(s, r+1)) & m)
++#define hdmi_read16(s, r, m) (((hdmi_read(s, r) << 8) | hdmi_read(s, (r)+1)) & (m))
+ #define hdmi_write(s, r, v) adv748x_write(s, ADV748X_PAGE_HDMI, r, v)
+
+ #define repeater_read(s, r) adv748x_read(s, ADV748X_PAGE_REPEATER, r)
+@@ -372,11 +372,11 @@ int adv748x_write_block(struct adv748x_s
+
+ #define sdp_read(s, r) adv748x_read(s, ADV748X_PAGE_SDP, r)
+ #define sdp_write(s, r, v) adv748x_write(s, ADV748X_PAGE_SDP, r, v)
+-#define sdp_clrset(s, r, m, v) sdp_write(s, r, (sdp_read(s, r) & ~m) | v)
++#define sdp_clrset(s, r, m, v) sdp_write(s, r, (sdp_read(s, r) & ~(m)) | (v))
+
+ #define cp_read(s, r) adv748x_read(s, ADV748X_PAGE_CP, r)
+ #define cp_write(s, r, v) adv748x_write(s, ADV748X_PAGE_CP, r, v)
+-#define cp_clrset(s, r, m, v) cp_write(s, r, (cp_read(s, r) & ~m) | v)
++#define cp_clrset(s, r, m, v) cp_write(s, r, (cp_read(s, r) & ~(m)) | (v))
+
+ #define txa_read(s, r) adv748x_read(s, ADV748X_PAGE_TXA, r)
+ #define txb_read(s, r) adv748x_read(s, ADV748X_PAGE_TXB, r)
--- /dev/null
+From 0e7ca83e82d021c928dadf4c13c137d57337540d Mon Sep 17 00:00:00 2001
+From: Nathan Chancellor <natechancellor@gmail.com>
+Date: Mon, 9 Dec 2019 14:44:23 -0700
+Subject: mtd: onenand_base: Adjust indentation in onenand_read_ops_nolock
+
+From: Nathan Chancellor <natechancellor@gmail.com>
+
+commit 0e7ca83e82d021c928dadf4c13c137d57337540d upstream.
+
+Clang warns:
+
+../drivers/mtd/nand/onenand/onenand_base.c:1269:3: warning: misleading
+indentation; statement is not part of the previous 'if'
+[-Wmisleading-indentation]
+ while (!ret) {
+ ^
+../drivers/mtd/nand/onenand/onenand_base.c:1266:2: note: previous
+statement is here
+ if (column + thislen > writesize)
+ ^
+1 warning generated.
+
+This warning occurs because there is a space before the tab of the while
+loop. There are spaces at the beginning of a lot of the lines in this
+block, remove them so that the indentation is consistent with the Linux
+kernel coding style and clang no longer warns.
+
+Fixes: a8de85d55700 ("[MTD] OneNAND: Implement read-while-load")
+Link: https://github.com/ClangBuiltLinux/linux/issues/794
+Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mtd/nand/onenand/onenand_base.c | 82 ++++++++++++++++----------------
+ 1 file changed, 41 insertions(+), 41 deletions(-)
+
+--- a/drivers/mtd/nand/onenand/onenand_base.c
++++ b/drivers/mtd/nand/onenand/onenand_base.c
+@@ -1251,44 +1251,44 @@ static int onenand_read_ops_nolock(struc
+
+ stats = mtd->ecc_stats;
+
+- /* Read-while-load method */
++ /* Read-while-load method */
+
+- /* Do first load to bufferRAM */
+- if (read < len) {
+- if (!onenand_check_bufferram(mtd, from)) {
++ /* Do first load to bufferRAM */
++ if (read < len) {
++ if (!onenand_check_bufferram(mtd, from)) {
+ this->command(mtd, ONENAND_CMD_READ, from, writesize);
+- ret = this->wait(mtd, FL_READING);
+- onenand_update_bufferram(mtd, from, !ret);
++ ret = this->wait(mtd, FL_READING);
++ onenand_update_bufferram(mtd, from, !ret);
+ if (mtd_is_eccerr(ret))
+ ret = 0;
+- }
+- }
++ }
++ }
+
+ thislen = min_t(int, writesize, len - read);
+ column = from & (writesize - 1);
+ if (column + thislen > writesize)
+ thislen = writesize - column;
+
+- while (!ret) {
+- /* If there is more to load then start next load */
+- from += thislen;
+- if (read + thislen < len) {
++ while (!ret) {
++ /* If there is more to load then start next load */
++ from += thislen;
++ if (read + thislen < len) {
+ this->command(mtd, ONENAND_CMD_READ, from, writesize);
+- /*
+- * Chip boundary handling in DDP
+- * Now we issued chip 1 read and pointed chip 1
++ /*
++ * Chip boundary handling in DDP
++ * Now we issued chip 1 read and pointed chip 1
+ * bufferram so we have to point chip 0 bufferram.
+- */
+- if (ONENAND_IS_DDP(this) &&
+- unlikely(from == (this->chipsize >> 1))) {
+- this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
+- boundary = 1;
+- } else
+- boundary = 0;
+- ONENAND_SET_PREV_BUFFERRAM(this);
+- }
+- /* While load is going, read from last bufferRAM */
+- this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
++ */
++ if (ONENAND_IS_DDP(this) &&
++ unlikely(from == (this->chipsize >> 1))) {
++ this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
++ boundary = 1;
++ } else
++ boundary = 0;
++ ONENAND_SET_PREV_BUFFERRAM(this);
++ }
++ /* While load is going, read from last bufferRAM */
++ this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
+
+ /* Read oob area if needed */
+ if (oobbuf) {
+@@ -1304,24 +1304,24 @@ static int onenand_read_ops_nolock(struc
+ oobcolumn = 0;
+ }
+
+- /* See if we are done */
+- read += thislen;
+- if (read == len)
+- break;
+- /* Set up for next read from bufferRAM */
+- if (unlikely(boundary))
+- this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
+- ONENAND_SET_NEXT_BUFFERRAM(this);
+- buf += thislen;
++ /* See if we are done */
++ read += thislen;
++ if (read == len)
++ break;
++ /* Set up for next read from bufferRAM */
++ if (unlikely(boundary))
++ this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
++ ONENAND_SET_NEXT_BUFFERRAM(this);
++ buf += thislen;
+ thislen = min_t(int, writesize, len - read);
+- column = 0;
+- cond_resched();
+- /* Now wait for load */
+- ret = this->wait(mtd, FL_READING);
+- onenand_update_bufferram(mtd, from, !ret);
++ column = 0;
++ cond_resched();
++ /* Now wait for load */
++ ret = this->wait(mtd, FL_READING);
++ onenand_update_bufferram(mtd, from, !ret);
+ if (mtd_is_eccerr(ret))
+ ret = 0;
+- }
++ }
+
+ /*
+ * Return success, if no ECC failures, else -EBADMSG
--- /dev/null
+From f33113b542219448fa02d77ca1c6f4265bd7f130 Mon Sep 17 00:00:00 2001
+From: YueHaibing <yuehaibing@huawei.com>
+Date: Mon, 30 Dec 2019 11:29:45 +0800
+Subject: mtd: sharpslpart: Fix unsigned comparison to zero
+
+From: YueHaibing <yuehaibing@huawei.com>
+
+commit f33113b542219448fa02d77ca1c6f4265bd7f130 upstream.
+
+The unsigned variable log_num is being assigned a return value
+from the call to sharpsl_nand_get_logical_num that can return
+-EINVAL.
+
+Detected using Coccinelle:
+./drivers/mtd/parsers/sharpslpart.c:207:6-13: WARNING: Unsigned expression compared with zero: log_num > 0
+
+Fixes: 8a4580e4d298 ("mtd: sharpslpart: Add sharpslpart partition parser")
+Signed-off-by: YueHaibing <yuehaibing@huawei.com>
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mtd/parsers/sharpslpart.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/mtd/parsers/sharpslpart.c
++++ b/drivers/mtd/parsers/sharpslpart.c
+@@ -165,10 +165,10 @@ static int sharpsl_nand_get_logical_num(
+
+ static int sharpsl_nand_init_ftl(struct mtd_info *mtd, struct sharpsl_ftl *ftl)
+ {
+- unsigned int block_num, log_num, phymax;
++ unsigned int block_num, phymax;
++ int i, ret, log_num;
+ loff_t block_adr;
+ u8 *oob;
+- int i, ret;
+
+ oob = kzalloc(mtd->oobsize, GFP_KERNEL);
+ if (!oob)
--- /dev/null
+From 805f635703b2562b5ddd822c62fc9124087e5dd5 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 18 Dec 2019 20:48:07 +0100
+Subject: pinctrl: sh-pfc: r8a7778: Fix duplicate SDSELF_B and SD1_CLK_B
+
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+
+commit 805f635703b2562b5ddd822c62fc9124087e5dd5 upstream.
+
+The FN_SDSELF_B and FN_SD1_CLK_B enum IDs are used twice, which means
+one set of users must be wrong. Replace them by the correct enum IDs.
+
+Fixes: 87f8c988636db0d4 ("sh-pfc: Add r8a7778 pinmux support")
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Link: https://lore.kernel.org/r/20191218194812.12741-2-geert+renesas@glider.be
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
+@@ -2325,7 +2325,7 @@ static const struct pinmux_cfg_reg pinmu
+ FN_ATAG0_A, 0, FN_REMOCON_B, 0,
+ /* IP0_11_8 [4] */
+ FN_SD1_DAT2_A, FN_MMC_D2, 0, FN_BS,
+- FN_ATADIR0_A, 0, FN_SDSELF_B, 0,
++ FN_ATADIR0_A, 0, FN_SDSELF_A, 0,
+ FN_PWM4_B, 0, 0, 0,
+ 0, 0, 0, 0,
+ /* IP0_7_5 [3] */
+@@ -2367,7 +2367,7 @@ static const struct pinmux_cfg_reg pinmu
+ FN_TS_SDAT0_A, 0, 0, 0,
+ 0, 0, 0, 0,
+ /* IP1_10_8 [3] */
+- FN_SD1_CLK_B, FN_MMC_D6, 0, FN_A24,
++ FN_SD1_CD_A, FN_MMC_D6, 0, FN_A24,
+ FN_DREQ1_A, 0, FN_HRX0_B, FN_TS_SPSYNC0_A,
+ /* IP1_7_5 [3] */
+ FN_A23, FN_HTX0_B, FN_TX2_B, FN_DACK2_A,
tools-power-acpi-fix-compilation-error.patch
powerpc-pseries-vio-fix-iommu_table-use-after-free-refcount-warning.patch
powerpc-pseries-allow-not-having-ibm-hypertas-functions-hcall-multi-tce-for-ddw.patch
+iommu-arm-smmu-v3-populate-vmid-field-for-cmdq_op_tlbi_nh_va.patch
+kvm-arm-arm64-vgic-its-fix-restoration-of-unmapped-collections.patch
+arm-8949-1-mm-mark-free_memmap-as-__init.patch
+arm64-cpufeature-fix-the-type-of-no-fp-simd-capability.patch
+arm64-ptrace-nofpsimd-fail-fp-simd-regset-operations.patch
+kvm-arm-arm64-fix-young-bit-from-mmu-notifier.patch
+kvm-arm-fix-dfsr-setting-for-non-lpae-aarch32-guests.patch
+kvm-arm-make-inject_abt32-inject-an-external-abort-instead.patch
+kvm-arm64-pmu-don-t-increment-sw_incr-if-pmcr.e-is-unset.patch
+mtd-onenand_base-adjust-indentation-in-onenand_read_ops_nolock.patch
+mtd-sharpslpart-fix-unsigned-comparison-to-zero.patch
+crypto-artpec6-return-correct-error-code-for-failed-setkey.patch
+crypto-atmel-sha-fix-error-handling-when-setting-hmac-key.patch
+media-i2c-adv748x-fix-unsafe-macros.patch
+pinctrl-sh-pfc-r8a7778-fix-duplicate-sdself_b-and-sd1_clk_b.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
