]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
6.12-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 19 Sep 2025 16:58:55 +0000 (18:58 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 19 Sep 2025 16:58:55 +0000 (18:58 +0200)
added patches:
perf-x86-intel-fix-crash-in-icl_update_topdown_event.patch

queue-6.12/perf-x86-intel-fix-crash-in-icl_update_topdown_event.patch [new file with mode: 0644]
queue-6.12/series

diff --git a/queue-6.12/perf-x86-intel-fix-crash-in-icl_update_topdown_event.patch b/queue-6.12/perf-x86-intel-fix-crash-in-icl_update_topdown_event.patch
new file mode 100644 (file)
index 0000000..6b41910
--- /dev/null
@@ -0,0 +1,67 @@
+From b0823d5fbacb1c551d793cbfe7af24e0d1fa45ed Mon Sep 17 00:00:00 2001
+From: Kan Liang <kan.liang@linux.intel.com>
+Date: Thu, 12 Jun 2025 07:38:18 -0700
+Subject: perf/x86/intel: Fix crash in icl_update_topdown_event()
+
+From: Kan Liang <kan.liang@linux.intel.com>
+
+commit b0823d5fbacb1c551d793cbfe7af24e0d1fa45ed upstream.
+
+The perf_fuzzer found a hard-lockup crash on a RaptorLake machine:
+
+  Oops: general protection fault, maybe for address 0xffff89aeceab400: 0000
+  CPU: 23 UID: 0 PID: 0 Comm: swapper/23
+  Tainted: [W]=WARN
+  Hardware name: Dell Inc. Precision 9660/0VJ762
+  RIP: 0010:native_read_pmc+0x7/0x40
+  Code: cc e8 8d a9 01 00 48 89 03 5b cd cc cc cc cc 0f 1f ...
+  RSP: 000:fffb03100273de8 EFLAGS: 00010046
+  ....
+  Call Trace:
+    <TASK>
+    icl_update_topdown_event+0x165/0x190
+    ? ktime_get+0x38/0xd0
+    intel_pmu_read_event+0xf9/0x210
+    __perf_event_read+0xf9/0x210
+
+CPUs 16-23 are E-core CPUs that don't support the perf metrics feature.
+The icl_update_topdown_event() should not be invoked on these CPUs.
+
+It's a regression of commit:
+
+  f9bdf1f95339 ("perf/x86/intel: Avoid disable PMU if !cpuc->enabled in sample read")
+
+The bug introduced by that commit is that the is_topdown_event() function
+is mistakenly used to replace the is_topdown_count() call to check if the
+topdown functions for the perf metrics feature should be invoked.
+
+Fix it.
+
+Fixes: f9bdf1f95339 ("perf/x86/intel: Avoid disable PMU if !cpuc->enabled in sample read")
+Closes: https://lore.kernel.org/lkml/352f0709-f026-cd45-e60c-60dfd97f73f3@maine.edu/
+Reported-by: Vince Weaver <vincent.weaver@maine.edu>
+Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
+Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
+Signed-off-by: Ingo Molnar <mingo@kernel.org>
+Tested-by: Vince Weaver <vincent.weaver@maine.edu>
+Cc: stable@vger.kernel.org # v6.15+
+Link: https://lore.kernel.org/r/20250612143818.2889040-1-kan.liang@linux.intel.com
+[ omitted PEBS check ]
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+Signed-off-by: Angel Adetula <angeladetula@google.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/events/intel/core.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/x86/events/intel/core.c
++++ b/arch/x86/events/intel/core.c
+@@ -2793,7 +2793,7 @@ static void intel_pmu_read_event(struct
+               if (pmu_enabled)
+                       intel_pmu_disable_all();
+-              if (is_topdown_event(event))
++              if (is_topdown_count(event))
+                       static_call(intel_pmu_update_topdown_event)(event);
+               else
+                       intel_pmu_drain_pebs_buffer();
index 1756723818761a9d301cad892ba5111d7e928fef..996d2b672dd758029eca0543036d2a3e5e14ce25 100644 (file)
@@ -30,3 +30,4 @@ revert-net-mlx5e-update-and-set-xon-xoff-upon-port-s.patch
 net-liquidio-fix-overflow-in-octeon_init_instr_queue.patch
 cnic-fix-use-after-free-bugs-in-cnic_delete_task.patch
 octeontx2-pf-fix-use-after-free-bugs-in-otx2_sync_ts.patch
+perf-x86-intel-fix-crash-in-icl_update_topdown_event.patch