ASoC: ti: j721e-evm: Fix clock configuration for ti,j7200-cpb-audio compatible

For 'ti,j7200-cpb-audio' compatible, there is support for only one PLL for
48k. For 11025, 22050, 44100 and 88200 sampling rates, due to absence of
J721E_CLK_PARENT_44100, we get EINVAL while running any audio application.
Add support for these rates by using the 48k parent clock and adjusting
the clock for these rates later in j721e_configure_refclk.

Fixes: 6748d0559059 ("ASoC: ti: Add custom machine driver for j721e EVM (CPB and IVI)")
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Link: https://patch.msgid.link/20250318113524.57100-1-j-choudhary@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/ti/j721e-evm.c b/sound/soc/ti/j721e-evm.c
index d9d1e021f5b2eef5e95afca7c8ac5c7f44201226..0f96cc45578d8cda2709ac2d39ac62d9f8d78ab6 100644 (file)
--- a/sound/soc/ti/j721e-evm.c
+++ b/sound/soc/ti/j721e-evm.c
@@ -182,6 +182,8 @@ static int j721e_configure_refclk(struct j721e_priv *priv,
                clk_id = J721E_CLK_PARENT_48000;
        else if (!(rate % 11025) && priv->pll_rates[J721E_CLK_PARENT_44100])
                clk_id = J721E_CLK_PARENT_44100;
+       else if (!(rate % 11025) && priv->pll_rates[J721E_CLK_PARENT_48000])
+               clk_id = J721E_CLK_PARENT_48000;
        else
                return ret;