M: Aurelien Jarno <aurelien@aurel32.net>
M: Aleksandar Markovic <amarkovic@wavecomp.com>
R: Aleksandar Rikalo <arikalo@wavecomp.com>
-R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: target/mips/
F: default-configs/*mips*
MIPS
M: James Hogan <jhogan@kernel.org>
R: Aleksandar Rikalo <arikalo@wavecomp.com>
-R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: target/mips/kvm.c
M: Peter Maydell <peter.maydell@linaro.org>
L: qemu-arm@nongnu.org
S: Maintained
-F: hw/arm/nrf51_soc.c
-F: hw/arm/microbit.c
-F: include/hw/arm/nrf51_soc.h
+F: hw/*/nrf51*.c
+F: hw/*/microbit*.c
+F: include/hw/*/nrf51*.h
+F: include/hw/*/microbit*.h
+F: tests/microbit-test.c
CRIS Machines
-------------
Jazz
M: Hervé Poussineau <hpoussin@reactos.org>
R: Aleksandar Rikalo <arikalo@wavecomp.com>
-R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: hw/mips/mips_jazz.c
F: hw/display/jazz_led.c
Malta
M: Aurelien Jarno <aurelien@aurel32.net>
R: Aleksandar Rikalo <arikalo@wavecomp.com>
-R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: hw/mips/mips_malta.c
Mipssim
M: Aleksandar Markovic <amarkovic@wavecomp.com>
R: Aleksandar Rikalo <arikalo@wavecomp.com>
-R: Stefan Markovic <smarkovic@wavecomp.com>
S: Odd Fixes
F: hw/mips/mips_mipssim.c
F: hw/net/mipsnet.c
R4000
M: Aurelien Jarno <aurelien@aurel32.net>
R: Aleksandar Rikalo <arikalo@wavecomp.com>
-R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: hw/mips/mips_r4k.c
Fulong 2E
M: Aleksandar Markovic <amarkovic@wavecomp.com>
R: Aleksandar Rikalo <arikalo@wavecomp.com>
-R: Stefan Markovic <smarkovic@wavecomp.com>
S: Odd Fixes
F: hw/mips/mips_fulong2e.c
F: hw/isa/vt82c686.c
Boston
M: Paul Burton <pburton@wavecomp.com>
R: Aleksandar Rikalo <arikalo@wavecomp.com>
-R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: hw/core/loader-fit.c
F: hw/mips/boston.c
F: qemu-edid.c
Firmware configuration (fw_cfg)
-M: Philippe Mathieu-DaudÃ
\83© <philmd@redhat.com>
+M: Philippe Mathieu-Daudé <philmd@redhat.com>
R: Laszlo Ersek <lersek@redhat.com>
R: Gerd Hoffmann <kraxel@redhat.com>
S: Supported
MIPS target
M: Aurelien Jarno <aurelien@aurel32.net>
R: Aleksandar Rikalo <arikalo@wavecomp.com>
-R: Stefan Markovic <smarkovic@wavecomp.com>
S: Maintained
F: tcg/mips/
F: disas/mips.c
struct tb_desc desc;
uint32_t h;
+ cf_mask &= ~CF_CLUSTER_MASK;
+ cf_mask |= cpu->cluster_index << CF_CLUSTER_SHIFT;
+
desc.env = (CPUArchState *)cpu->env_ptr;
desc.cs_base = cs_base;
desc.flags = flags;
QEMU_BUILD_BUG_ON(NB_MMU_MODES > 16);
#define ALL_MMUIDX_BITS ((1 << NB_MMU_MODES) - 1)
+static inline size_t sizeof_tlb(CPUArchState *env, uintptr_t mmu_idx)
+{
+ return env->tlb_mask[mmu_idx] + (1 << CPU_TLB_ENTRY_BITS);
+}
+
+static void tlb_window_reset(CPUTLBWindow *window, int64_t ns,
+ size_t max_entries)
+{
+ window->begin_ns = ns;
+ window->max_entries = max_entries;
+}
+
+static void tlb_dyn_init(CPUArchState *env)
+{
+ int i;
+
+ for (i = 0; i < NB_MMU_MODES; i++) {
+ CPUTLBDesc *desc = &env->tlb_d[i];
+ size_t n_entries = 1 << CPU_TLB_DYN_DEFAULT_BITS;
+
+ tlb_window_reset(&desc->window, get_clock_realtime(), 0);
+ desc->n_used_entries = 0;
+ env->tlb_mask[i] = (n_entries - 1) << CPU_TLB_ENTRY_BITS;
+ env->tlb_table[i] = g_new(CPUTLBEntry, n_entries);
+ env->iotlb[i] = g_new(CPUIOTLBEntry, n_entries);
+ }
+}
+
+/**
+ * tlb_mmu_resize_locked() - perform TLB resize bookkeeping; resize if necessary
+ * @env: CPU that owns the TLB
+ * @mmu_idx: MMU index of the TLB
+ *
+ * Called with tlb_lock_held.
+ *
+ * We have two main constraints when resizing a TLB: (1) we only resize it
+ * on a TLB flush (otherwise we'd have to take a perf hit by either rehashing
+ * the array or unnecessarily flushing it), which means we do not control how
+ * frequently the resizing can occur; (2) we don't have access to the guest's
+ * future scheduling decisions, and therefore have to decide the magnitude of
+ * the resize based on past observations.
+ *
+ * In general, a memory-hungry process can benefit greatly from an appropriately
+ * sized TLB, since a guest TLB miss is very expensive. This doesn't mean that
+ * we just have to make the TLB as large as possible; while an oversized TLB
+ * results in minimal TLB miss rates, it also takes longer to be flushed
+ * (flushes can be _very_ frequent), and the reduced locality can also hurt
+ * performance.
+ *
+ * To achieve near-optimal performance for all kinds of workloads, we:
+ *
+ * 1. Aggressively increase the size of the TLB when the use rate of the
+ * TLB being flushed is high, since it is likely that in the near future this
+ * memory-hungry process will execute again, and its memory hungriness will
+ * probably be similar.
+ *
+ * 2. Slowly reduce the size of the TLB as the use rate declines over a
+ * reasonably large time window. The rationale is that if in such a time window
+ * we have not observed a high TLB use rate, it is likely that we won't observe
+ * it in the near future. In that case, once a time window expires we downsize
+ * the TLB to match the maximum use rate observed in the window.
+ *
+ * 3. Try to keep the maximum use rate in a time window in the 30-70% range,
+ * since in that range performance is likely near-optimal. Recall that the TLB
+ * is direct mapped, so we want the use rate to be low (or at least not too
+ * high), since otherwise we are likely to have a significant amount of
+ * conflict misses.
+ */
+static void tlb_mmu_resize_locked(CPUArchState *env, int mmu_idx)
+{
+ CPUTLBDesc *desc = &env->tlb_d[mmu_idx];
+ size_t old_size = tlb_n_entries(env, mmu_idx);
+ size_t rate;
+ size_t new_size = old_size;
+ int64_t now = get_clock_realtime();
+ int64_t window_len_ms = 100;
+ int64_t window_len_ns = window_len_ms * 1000 * 1000;
+ bool window_expired = now > desc->window.begin_ns + window_len_ns;
+
+ if (desc->n_used_entries > desc->window.max_entries) {
+ desc->window.max_entries = desc->n_used_entries;
+ }
+ rate = desc->window.max_entries * 100 / old_size;
+
+ if (rate > 70) {
+ new_size = MIN(old_size << 1, 1 << CPU_TLB_DYN_MAX_BITS);
+ } else if (rate < 30 && window_expired) {
+ size_t ceil = pow2ceil(desc->window.max_entries);
+ size_t expected_rate = desc->window.max_entries * 100 / ceil;
+
+ /*
+ * Avoid undersizing when the max number of entries seen is just below
+ * a pow2. For instance, if max_entries == 1025, the expected use rate
+ * would be 1025/2048==50%. However, if max_entries == 1023, we'd get
+ * 1023/1024==99.9% use rate, so we'd likely end up doubling the size
+ * later. Thus, make sure that the expected use rate remains below 70%.
+ * (and since we double the size, that means the lowest rate we'd
+ * expect to get is 35%, which is still in the 30-70% range where
+ * we consider that the size is appropriate.)
+ */
+ if (expected_rate > 70) {
+ ceil *= 2;
+ }
+ new_size = MAX(ceil, 1 << CPU_TLB_DYN_MIN_BITS);
+ }
+
+ if (new_size == old_size) {
+ if (window_expired) {
+ tlb_window_reset(&desc->window, now, desc->n_used_entries);
+ }
+ return;
+ }
+
+ g_free(env->tlb_table[mmu_idx]);
+ g_free(env->iotlb[mmu_idx]);
+
+ tlb_window_reset(&desc->window, now, 0);
+ /* desc->n_used_entries is cleared by the caller */
+ env->tlb_mask[mmu_idx] = (new_size - 1) << CPU_TLB_ENTRY_BITS;
+ env->tlb_table[mmu_idx] = g_try_new(CPUTLBEntry, new_size);
+ env->iotlb[mmu_idx] = g_try_new(CPUIOTLBEntry, new_size);
+ /*
+ * If the allocations fail, try smaller sizes. We just freed some
+ * memory, so going back to half of new_size has a good chance of working.
+ * Increased memory pressure elsewhere in the system might cause the
+ * allocations to fail though, so we progressively reduce the allocation
+ * size, aborting if we cannot even allocate the smallest TLB we support.
+ */
+ while (env->tlb_table[mmu_idx] == NULL || env->iotlb[mmu_idx] == NULL) {
+ if (new_size == (1 << CPU_TLB_DYN_MIN_BITS)) {
+ error_report("%s: %s", __func__, strerror(errno));
+ abort();
+ }
+ new_size = MAX(new_size >> 1, 1 << CPU_TLB_DYN_MIN_BITS);
+ env->tlb_mask[mmu_idx] = (new_size - 1) << CPU_TLB_ENTRY_BITS;
+
+ g_free(env->tlb_table[mmu_idx]);
+ g_free(env->iotlb[mmu_idx]);
+ env->tlb_table[mmu_idx] = g_try_new(CPUTLBEntry, new_size);
+ env->iotlb[mmu_idx] = g_try_new(CPUIOTLBEntry, new_size);
+ }
+}
+
+static inline void tlb_table_flush_by_mmuidx(CPUArchState *env, int mmu_idx)
+{
+ tlb_mmu_resize_locked(env, mmu_idx);
+ memset(env->tlb_table[mmu_idx], -1, sizeof_tlb(env, mmu_idx));
+ env->tlb_d[mmu_idx].n_used_entries = 0;
+}
+
+static inline void tlb_n_used_entries_inc(CPUArchState *env, uintptr_t mmu_idx)
+{
+ env->tlb_d[mmu_idx].n_used_entries++;
+}
+
+static inline void tlb_n_used_entries_dec(CPUArchState *env, uintptr_t mmu_idx)
+{
+ env->tlb_d[mmu_idx].n_used_entries--;
+}
+
void tlb_init(CPUState *cpu)
{
CPUArchState *env = cpu->env_ptr;
/* Ensure that cpu_reset performs a full flush. */
env->tlb_c.dirty = ALL_MMUIDX_BITS;
+
+ tlb_dyn_init(env);
}
/* flush_all_helper: run fn across all cpus
static void tlb_flush_one_mmuidx_locked(CPUArchState *env, int mmu_idx)
{
- memset(env->tlb_table[mmu_idx], -1, sizeof(env->tlb_table[0]));
+ tlb_table_flush_by_mmuidx(env, mmu_idx);
memset(env->tlb_v_table[mmu_idx], -1, sizeof(env->tlb_v_table[0]));
env->tlb_d[mmu_idx].large_page_addr = -1;
env->tlb_d[mmu_idx].large_page_mask = -1;
tlb_hit_page(tlb_entry->addr_code, page);
}
+/**
+ * tlb_entry_is_empty - return true if the entry is not in use
+ * @te: pointer to CPUTLBEntry
+ */
+static inline bool tlb_entry_is_empty(const CPUTLBEntry *te)
+{
+ return te->addr_read == -1 && te->addr_write == -1 && te->addr_code == -1;
+}
+
/* Called with tlb_c.lock held */
-static inline void tlb_flush_entry_locked(CPUTLBEntry *tlb_entry,
+static inline bool tlb_flush_entry_locked(CPUTLBEntry *tlb_entry,
target_ulong page)
{
if (tlb_hit_page_anyprot(tlb_entry, page)) {
memset(tlb_entry, -1, sizeof(*tlb_entry));
+ return true;
}
+ return false;
}
/* Called with tlb_c.lock held */
assert_cpu_is_self(ENV_GET_CPU(env));
for (k = 0; k < CPU_VTLB_SIZE; k++) {
- tlb_flush_entry_locked(&env->tlb_v_table[mmu_idx][k], page);
+ if (tlb_flush_entry_locked(&env->tlb_v_table[mmu_idx][k], page)) {
+ tlb_n_used_entries_dec(env, mmu_idx);
+ }
}
}
midx, lp_addr, lp_mask);
tlb_flush_one_mmuidx_locked(env, midx);
} else {
- tlb_flush_entry_locked(tlb_entry(env, midx, page), page);
+ if (tlb_flush_entry_locked(tlb_entry(env, midx, page), page)) {
+ tlb_n_used_entries_dec(env, midx);
+ }
tlb_flush_vtlb_page_locked(env, midx, page);
}
}
qemu_spin_lock(&env->tlb_c.lock);
for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
unsigned int i;
+ unsigned int n = tlb_n_entries(env, mmu_idx);
- for (i = 0; i < CPU_TLB_SIZE; i++) {
+ for (i = 0; i < n; i++) {
tlb_reset_dirty_range_locked(&env->tlb_table[mmu_idx][i], start1,
length);
}
* Only evict the old entry to the victim tlb if it's for a
* different page; otherwise just overwrite the stale data.
*/
- if (!tlb_hit_page_anyprot(te, vaddr_page)) {
+ if (!tlb_hit_page_anyprot(te, vaddr_page) && !tlb_entry_is_empty(te)) {
unsigned vidx = env->tlb_d[mmu_idx].vindex++ % CPU_VTLB_SIZE;
CPUTLBEntry *tv = &env->tlb_v_table[mmu_idx][vidx];
/* Evict the old entry into the victim tlb. */
copy_tlb_helper_locked(tv, te);
env->iotlb_v[mmu_idx][vidx] = env->iotlb[mmu_idx][index];
+ tlb_n_used_entries_dec(env, mmu_idx);
}
/* refill the tlb */
}
copy_tlb_helper_locked(te, &tn);
+ tlb_n_used_entries_inc(env, mmu_idx);
qemu_spin_unlock(&env->tlb_c.lock);
}
clear_high(d, oprsz, desc);
}
+void HELPER(gvec_nand)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(vec64)) {
+ *(vec64 *)(d + i) = ~(*(vec64 *)(a + i) & *(vec64 *)(b + i));
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_nor)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(vec64)) {
+ *(vec64 *)(d + i) = ~(*(vec64 *)(a + i) | *(vec64 *)(b + i));
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_eqv)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(vec64)) {
+ *(vec64 *)(d + i) = ~(*(vec64 *)(a + i) ^ *(vec64 *)(b + i));
+ }
+ clear_high(d, oprsz, desc);
+}
+
void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc)
{
intptr_t oprsz = simd_oprsz(desc);
}
clear_high(d, oprsz, desc);
}
+
+void HELPER(gvec_smin8)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(int8_t)) {
+ int8_t aa = *(int8_t *)(a + i);
+ int8_t bb = *(int8_t *)(b + i);
+ int8_t dd = aa < bb ? aa : bb;
+ *(int8_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_smin16)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(int16_t)) {
+ int16_t aa = *(int16_t *)(a + i);
+ int16_t bb = *(int16_t *)(b + i);
+ int16_t dd = aa < bb ? aa : bb;
+ *(int16_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_smin32)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(int32_t)) {
+ int32_t aa = *(int32_t *)(a + i);
+ int32_t bb = *(int32_t *)(b + i);
+ int32_t dd = aa < bb ? aa : bb;
+ *(int32_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_smin64)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(int64_t)) {
+ int64_t aa = *(int64_t *)(a + i);
+ int64_t bb = *(int64_t *)(b + i);
+ int64_t dd = aa < bb ? aa : bb;
+ *(int64_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_smax8)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(int8_t)) {
+ int8_t aa = *(int8_t *)(a + i);
+ int8_t bb = *(int8_t *)(b + i);
+ int8_t dd = aa > bb ? aa : bb;
+ *(int8_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_smax16)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(int16_t)) {
+ int16_t aa = *(int16_t *)(a + i);
+ int16_t bb = *(int16_t *)(b + i);
+ int16_t dd = aa > bb ? aa : bb;
+ *(int16_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_smax32)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(int32_t)) {
+ int32_t aa = *(int32_t *)(a + i);
+ int32_t bb = *(int32_t *)(b + i);
+ int32_t dd = aa > bb ? aa : bb;
+ *(int32_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_smax64)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(int64_t)) {
+ int64_t aa = *(int64_t *)(a + i);
+ int64_t bb = *(int64_t *)(b + i);
+ int64_t dd = aa > bb ? aa : bb;
+ *(int64_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_umin8)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
+ uint8_t aa = *(uint8_t *)(a + i);
+ uint8_t bb = *(uint8_t *)(b + i);
+ uint8_t dd = aa < bb ? aa : bb;
+ *(uint8_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_umin16)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
+ uint16_t aa = *(uint16_t *)(a + i);
+ uint16_t bb = *(uint16_t *)(b + i);
+ uint16_t dd = aa < bb ? aa : bb;
+ *(uint16_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_umin32)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
+ uint32_t aa = *(uint32_t *)(a + i);
+ uint32_t bb = *(uint32_t *)(b + i);
+ uint32_t dd = aa < bb ? aa : bb;
+ *(uint32_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_umin64)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+ uint64_t aa = *(uint64_t *)(a + i);
+ uint64_t bb = *(uint64_t *)(b + i);
+ uint64_t dd = aa < bb ? aa : bb;
+ *(uint64_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_umax8)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
+ uint8_t aa = *(uint8_t *)(a + i);
+ uint8_t bb = *(uint8_t *)(b + i);
+ uint8_t dd = aa > bb ? aa : bb;
+ *(uint8_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_umax16)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
+ uint16_t aa = *(uint16_t *)(a + i);
+ uint16_t bb = *(uint16_t *)(b + i);
+ uint16_t dd = aa > bb ? aa : bb;
+ *(uint16_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_umax32)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
+ uint32_t aa = *(uint32_t *)(a + i);
+ uint32_t bb = *(uint32_t *)(b + i);
+ uint32_t dd = aa > bb ? aa : bb;
+ *(uint32_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_umax64)(void *d, void *a, void *b, uint32_t desc)
+{
+ intptr_t oprsz = simd_oprsz(desc);
+ intptr_t i;
+
+ for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
+ uint64_t aa = *(uint64_t *)(a + i);
+ uint64_t bb = *(uint64_t *)(b + i);
+ uint64_t dd = aa > bb ? aa : bb;
+ *(uint64_t *)(d + i) = dd;
+ }
+ clear_high(d, oprsz, desc);
+}
DEF_HELPER_FLAGS_4(gvec_ussub32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(gvec_ussub64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_smin8, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_smin16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_smin32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_smin64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+
+DEF_HELPER_FLAGS_4(gvec_smax8, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_smax16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_smax32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_smax64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+
+DEF_HELPER_FLAGS_4(gvec_umin8, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_umin16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_umin32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_umin64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+
+DEF_HELPER_FLAGS_4(gvec_umax8, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_umax16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_umax32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_umax64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+
DEF_HELPER_FLAGS_3(gvec_neg8, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
DEF_HELPER_FLAGS_3(gvec_neg16, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
DEF_HELPER_FLAGS_3(gvec_neg32, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(gvec_xor, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(gvec_andc, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(gvec_orc, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_nand, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_nor, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_eqv, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(gvec_ands, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32)
DEF_HELPER_FLAGS_4(gvec_xors, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32)
cflags |= CF_NOCACHE | 1;
}
+ cflags &= ~CF_CLUSTER_MASK;
+ cflags |= cpu->cluster_index << CF_CLUSTER_SHIFT;
+
buffer_overflow:
tb = tb_alloc(pc);
if (unlikely(!tb)) {
#elif defined(__aarch64__)
+#ifndef ESR_MAGIC
+/* Pre-3.16 kernel headers don't have these, so provide fallback definitions */
+#define ESR_MAGIC 0x45535201
+struct esr_context {
+ struct _aarch64_ctx head;
+ uint64_t esr;
+};
+#endif
+
+static inline struct _aarch64_ctx *first_ctx(ucontext_t *uc)
+{
+ return (struct _aarch64_ctx *)&uc->uc_mcontext.__reserved;
+}
+
+static inline struct _aarch64_ctx *next_ctx(struct _aarch64_ctx *hdr)
+{
+ return (struct _aarch64_ctx *)((char *)hdr + hdr->size);
+}
+
int cpu_signal_handler(int host_signum, void *pinfo, void *puc)
{
siginfo_t *info = pinfo;
ucontext_t *uc = puc;
uintptr_t pc = uc->uc_mcontext.pc;
- uint32_t insn = *(uint32_t *)pc;
bool is_write;
+ struct _aarch64_ctx *hdr;
+ struct esr_context const *esrctx = NULL;
- /* XXX: need kernel patch to get write flag faster. */
- is_write = ( (insn & 0xbfff0000) == 0x0c000000 /* C3.3.1 */
- || (insn & 0xbfe00000) == 0x0c800000 /* C3.3.2 */
- || (insn & 0xbfdf0000) == 0x0d000000 /* C3.3.3 */
- || (insn & 0xbfc00000) == 0x0d800000 /* C3.3.4 */
- || (insn & 0x3f400000) == 0x08000000 /* C3.3.6 */
- || (insn & 0x3bc00000) == 0x39000000 /* C3.3.13 */
- || (insn & 0x3fc00000) == 0x3d800000 /* ... 128bit */
- /* Ingore bits 10, 11 & 21, controlling indexing. */
- || (insn & 0x3bc00000) == 0x38000000 /* C3.3.8-12 */
- || (insn & 0x3fe00000) == 0x3c800000 /* ... 128bit */
- /* Ignore bits 23 & 24, controlling indexing. */
- || (insn & 0x3a400000) == 0x28000000); /* C3.3.7,14-16 */
+ /* Find the esr_context, which has the WnR bit in it */
+ for (hdr = first_ctx(uc); hdr->magic; hdr = next_ctx(hdr)) {
+ if (hdr->magic == ESR_MAGIC) {
+ esrctx = (struct esr_context const *)hdr;
+ break;
+ }
+ }
+ if (esrctx) {
+ /* For data aborts ESR.EC is 0b10010x: then bit 6 is the WnR bit */
+ uint64_t esr = esrctx->esr;
+ is_write = extract32(esr, 27, 5) == 0x12 && extract32(esr, 6, 1) == 1;
+ } else {
+ /*
+ * Fall back to parsing instructions; will only be needed
+ * for really ancient (pre-3.16) kernels.
+ */
+ uint32_t insn = *(uint32_t *)pc;
+
+ is_write = ((insn & 0xbfff0000) == 0x0c000000 /* C3.3.1 */
+ || (insn & 0xbfe00000) == 0x0c800000 /* C3.3.2 */
+ || (insn & 0xbfdf0000) == 0x0d000000 /* C3.3.3 */
+ || (insn & 0xbfc00000) == 0x0d800000 /* C3.3.4 */
+ || (insn & 0x3f400000) == 0x08000000 /* C3.3.6 */
+ || (insn & 0x3bc00000) == 0x39000000 /* C3.3.13 */
+ || (insn & 0x3fc00000) == 0x3d800000 /* ... 128bit */
+ /* Ignore bits 10, 11 & 21, controlling indexing. */
+ || (insn & 0x3bc00000) == 0x38000000 /* C3.3.8-12 */
+ || (insn & 0x3fe00000) == 0x3c800000 /* ... 128bit */
+ /* Ignore bits 23 & 24, controlling indexing. */
+ || (insn & 0x3a400000) == 0x28000000); /* C3.3.7,14-16 */
+ }
return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask);
}
);
}
-static int audio_driver_init (AudioState *s, struct audio_driver *drv)
+static int audio_driver_init(AudioState *s, struct audio_driver *drv, bool msg)
{
if (drv->options) {
audio_process_options (drv->name, drv->options);
return 0;
}
else {
- dolog ("Could not init `%s' audio driver\n", drv->name);
+ if (msg) {
+ dolog("Could not init `%s' audio driver\n", drv->name);
+ }
return -1;
}
}
if (drvname) {
driver = audio_driver_lookup(drvname);
if (driver) {
- done = !audio_driver_init(s, driver);
+ done = !audio_driver_init(s, driver, true);
} else {
dolog ("Unknown audio driver `%s'\n", drvname);
dolog ("Run with -audio-help to list available drivers\n");
for (i = 0; !done && i < ARRAY_SIZE(audio_prio_list); i++) {
driver = audio_driver_lookup(audio_prio_list[i]);
if (driver && driver->can_be_default) {
- done = !audio_driver_init(s, driver);
+ done = !audio_driver_init(s, driver, false);
}
}
}
if (!done) {
driver = audio_driver_lookup("none");
- done = !audio_driver_init(s, driver);
+ done = !audio_driver_init(s, driver, false);
assert(done);
dolog("warning: Using timer based audio emulation\n");
}
static void *qpa_audio_init (void)
{
+ if (glob_conf.server == NULL) {
+ char pidfile[64];
+ char *runtime;
+ struct stat st;
+
+ runtime = getenv("XDG_RUNTIME_DIR");
+ if (!runtime) {
+ return NULL;
+ }
+ snprintf(pidfile, sizeof(pidfile), "%s/pulse/pid", runtime);
+ if (stat(pidfile, &st) != 0) {
+ return NULL;
+ }
+ }
+
paaudio *g = g_malloc(sizeof(paaudio));
g->conf = glob_conf;
g->mainloop = NULL;
HostMemoryBackendFile *fb = MEMORY_BACKEND_FILE(o);
if (host_memory_backend_mr_inited(backend)) {
- error_setg(errp, "cannot change property value");
+ error_setg(errp, "cannot change property 'mem-path' of %s",
+ object_get_typename(o));
return;
}
g_free(fb->mem_path);
uint64_t val;
if (host_memory_backend_mr_inited(backend)) {
- error_setg(&local_err, "cannot change property value");
+ error_setg(&local_err, "cannot change property '%s' of %s",
+ name, object_get_typename(o));
goto out;
}
uint64_t value;
if (host_memory_backend_mr_inited(backend)) {
- error_setg(&local_err, "cannot change property value");
+ error_setg(&local_err, "cannot change property %s of %s ",
+ name, object_get_typename(obj));
goto out;
}
goto out;
}
if (!value) {
- error_setg(&local_err, "Property '%s.%s' doesn't take value '%"
- PRIu64 "'", object_get_typename(obj), name, value);
+ error_setg(&local_err,
+ "property '%s' of %s doesn't take value '%" PRIu64 "'",
+ name, object_get_typename(obj), value);
goto out;
}
backend->size = value;
}
g_free(data);
+
+ atomic_dec(&tgm->restart_pending);
+ aio_wait_kick();
}
static void throttle_group_restart_queue(ThrottleGroupMember *tgm, bool is_write)
* be no timer pending on this tgm at this point */
assert(!timer_pending(tgm->throttle_timers.timers[is_write]));
+ atomic_inc(&tgm->restart_pending);
+
co = qemu_coroutine_create(throttle_group_restart_queue_entry, rd);
aio_co_enter(tgm->aio_context, co);
}
tgm->throttle_state = ts;
tgm->aio_context = ctx;
+ atomic_set(&tgm->restart_pending, 0);
qemu_mutex_lock(&tg->lock);
/* If the ThrottleGroup is new set this ThrottleGroupMember as the token */
return;
}
+ /* Wait for throttle_group_restart_queue_entry() coroutines to finish */
+ AIO_WAIT_WHILE(tgm->aio_context, atomic_read(&tgm->restart_pending) > 0);
+
qemu_mutex_lock(&tg->lock);
for (i = 0; i < 2; i++) {
assert(tgm->pending_reqs[i] == 0);
;;
GNU/kFreeBSD)
bsd="yes"
- audio_drv_list="oss"
+ audio_drv_list="oss try-sdl"
audio_possible_drivers="oss sdl pa"
;;
FreeBSD)
bsd="yes"
make="${MAKE-gmake}"
- audio_drv_list="oss"
+ audio_drv_list="oss try-sdl"
audio_possible_drivers="oss sdl pa"
# needed for kinfo_getvmmap(3) in libutil.h
LIBS="-lutil $LIBS"
DragonFly)
bsd="yes"
make="${MAKE-gmake}"
- audio_drv_list="oss"
+ audio_drv_list="oss try-sdl"
audio_possible_drivers="oss sdl pa"
HOST_VARIANT_DIR="dragonfly"
;;
NetBSD)
bsd="yes"
make="${MAKE-gmake}"
- audio_drv_list="oss"
+ audio_drv_list="oss try-sdl"
audio_possible_drivers="oss sdl"
oss_lib="-lossaudio"
HOST_VARIANT_DIR="netbsd"
OpenBSD)
bsd="yes"
make="${MAKE-gmake}"
- audio_drv_list="sdl"
+ audio_drv_list="try-sdl"
audio_possible_drivers="sdl"
HOST_VARIANT_DIR="openbsd"
supported_os="yes"
LDFLAGS="-arch x86_64 $LDFLAGS"
fi
cocoa="yes"
- audio_drv_list="coreaudio"
+ audio_drv_list="coreaudio try-sdl"
audio_possible_drivers="coreaudio sdl"
LDFLAGS="-framework CoreFoundation -framework IOKit $LDFLAGS"
libs_softmmu="-F/System/Library/Frameworks -framework Cocoa -framework IOKit $libs_softmmu"
install="${INSTALL-ginstall}"
smbd="${SMBD-/usr/sfw/sbin/smbd}"
if test -f /usr/include/sys/soundcard.h ; then
- audio_drv_list="oss"
+ audio_drv_list="oss try-sdl"
fi
audio_possible_drivers="oss sdl"
# needed for CMSG_ macros in sys/socket.h
LIBS="-lposix_error_mapper -lnetwork $LIBS"
;;
Linux)
- audio_drv_list="oss"
+ audio_drv_list="try-pa try-alsa try-sdl oss"
audio_possible_drivers="oss alsa sdl pa"
linux="yes"
linux_user="yes"
##########################################
# Sound support libraries probe
-audio_drv_probe()
-{
- drv=$1
- hdr=$2
- lib=$3
- exp=$4
- cfl=$5
- cat > $TMPC << EOF
-#include <$hdr>
-int main(void) { $exp }
-EOF
- if compile_prog "$cfl" "$lib" ; then
- :
- else
- error_exit "$drv check failed" \
- "Make sure to have the $drv libs and headers installed."
- fi
-}
-
audio_drv_list=$(echo "$audio_drv_list" | sed -e 's/,/ /g')
for drv in $audio_drv_list; do
case $drv in
- alsa)
- audio_drv_probe $drv alsa/asoundlib.h -lasound \
- "return snd_pcm_close((snd_pcm_t *)0);"
- alsa_libs="-lasound"
+ alsa | try-alsa)
+ if $pkg_config alsa --exists; then
+ alsa_libs=$($pkg_config alsa --libs)
+ if test "$drv" = "try-alsa"; then
+ audio_drv_list=$(echo "$audio_drv_list" | sed -e 's/try-alsa/alsa/')
+ fi
+ else
+ if test "$drv" = "try-alsa"; then
+ audio_drv_list=$(echo "$audio_drv_list" | sed -e 's/try-alsa//')
+ else
+ error_exit "$drv check failed" \
+ "Make sure to have the $drv libs and headers installed."
+ fi
+ fi
;;
- pa)
- audio_drv_probe $drv pulse/pulseaudio.h "-lpulse" \
- "pa_context_set_source_output_volume(NULL, 0, NULL, NULL, NULL); return 0;"
- pulse_libs="-lpulse"
- audio_pt_int="yes"
+ pa | try-pa)
+ if $pkg_config libpulse --exists; then
+ pulse_libs=$($pkg_config libpulse --libs)
+ audio_pt_int="yes"
+ if test "$drv" = "try-pa"; then
+ audio_drv_list=$(echo "$audio_drv_list" | sed -e 's/try-pa/pa/')
+ fi
+ else
+ if test "$drv" = "try-pa"; then
+ audio_drv_list=$(echo "$audio_drv_list" | sed -e 's/try-pa//')
+ else
+ error_exit "$drv check failed" \
+ "Make sure to have the $drv libs and headers installed."
+ fi
+ fi
;;
sdl)
fi
;;
+ try-sdl)
+ if test "$sdl" = "no"; then
+ audio_drv_list=$(echo "$audio_drv_list" | sed -e 's/try-sdl//')
+ else
+ audio_drv_list=$(echo "$audio_drv_list" | sed -e 's/try-sdl/sdl/')
+ fi
+ ;;
+
coreaudio)
coreaudio_libs="-framework CoreAudio"
;;
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
-# (at your option any later version.
+# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
/*
- * ABSQ_S.PH rt, rs - Find Absolute Value of Two Fractional Halfwords
+ * [DSP] ABSQ_S.PH rt, rs - Find absolute value of two fractional halfwords
+ * with 16-bit saturation
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ABSQ_S.QB rt, rs - Find Absolute Value of Four Fractional Byte Values
+ * [DSP] ABSQ_S.QB rt, rs - Find absolute value of four fractional byte values
+ * with 8-bit saturation
*
* 3 2 1
* 10987654321098765432109876543210
/*
- *
+ * [DSP] ABSQ_S.W rt, rs - Find absolute value of fractional word with 32-bit
+ * saturation
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQ.PH rd, rt, rs - Add Fractional Halfword Vectors
+ * [DSP] ADDQ.PH rd, rt, rs - Add fractional halfword vectors
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQ_S.PH rd, rt, rs - Add Fractional Halfword Vectors
+ * [DSP] ADDQ_S.PH rd, rt, rs - Add fractional halfword vectors with 16-bit
+ * saturation
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQ_S.W rd, rt, rs - Add Fractional Words
+ * [DSP] ADDQ_S.W rd, rt, rs - Add fractional words with 32-bit saturation
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH.PH rd, rt, rs - Add Fractional Halfword Vectors And Shift Right
- * to Halve Results
+ * [DSP] ADDQH.PH rd, rt, rs - Add fractional halfword vectors and shift
+ * right to halve results
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.PH rd, rt, rs - Add Fractional Halfword Vectors And Shift Right
- * to Halve Results
+ * [DSP] ADDQH_R.PH rd, rt, rs - Add fractional halfword vectors and shift
+ * right to halve results with rounding
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] ADDQH_R.W rd, rt, rs - Add fractional words and shift right to halve
+ * results with rounding
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] ADDQH.W rd, rt, rs - Add fractional words and shift right to halve
+ * results
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDSC rd, rt, rs - Add Signed Word and Set Carry Bit
+ * [DSP] ADDSC rd, rt, rs - Add two signed words and set carry bit
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDU.PH rd, rt, rs - Unsigned Add Integer Halfwords
+ * [DSP] ADDU.PH rd, rt, rs - Add two pairs of unsigned halfwords
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDU_S.PH rd, rt, rs - Unsigned Add Integer Halfwords
+ * [DSP] ADDU_S.PH rd, rt, rs - Add two pairs of unsigned halfwords with 16-bit
+ * saturation
*
* 3 2 1
* 10987654321098765432109876543210
/*
- *
+ * [DSP] INSV - Insert bit field variable
*
* 3 2 1
* 10987654321098765432109876543210
/*
- *
+ * [DSP] MADD ac, rs, rt - Multiply two words and add to the specified
+ * accumulator
*
* 3 2 1
* 10987654321098765432109876543210
/*
- *
+ * [DSP] MADDU ac, rs, rt - Multiply two unsigned words and add to the
+ * specified accumulator
*
* 3 2 1
* 10987654321098765432109876543210
/*
- *
+ * [DSP] MAQ_S.W.PHL ac, rs, rt - Multiply the left-most single vector
+ * fractional halfword elements with accumulation
*
* 3 2 1
* 10987654321098765432109876543210
/*
- *
+ * [DSP] MAQ_S.W.PHR ac, rs, rt - Multiply the right-most single vector
+ * fractional halfword elements with accumulation
*
* 3 2 1
* 10987654321098765432109876543210
/*
- *
+ * [DSP] MAQ_SA.W.PHL ac, rs, rt - Multiply the left-most single vector
+ * fractional halfword elements with saturating accumulation
*
* 3 2 1
* 10987654321098765432109876543210
/*
- *
+ * [DSP] MAQ_SA.W.PHR ac, rs, rt - Multiply the right-most single vector
+ * fractional halfword elements with saturating accumulation
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] PACKRL.PH rd, rs, rt - Pack a word using the right halfword from one
+ * source register and left halfword from another source register
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] PICK.PH rd, rs, rt - Pick a vector of halfwords based on condition
+ * code bits
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] PICK.QB rd, rs, rt - Pick a vector of byte values based on condition
+ * code bits
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] PRECEQ.W.PHL rt, rs - Expand the precision of the left-most element
+ * of a paired halfword
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] PRECEQ.W.PHR rt, rs - Expand the precision of the right-most element
+ * of a paired halfword
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] PRECEQU.PH.QBLA rt, rs - Expand the precision of the two
+ * left-alternate elements of a quad byte vector
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] PRECEQU.PH.QBL rt, rs - Expand the precision of the two left-most
+ * elements of a quad byte vector
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] PRECEQU.PH.QBRA rt, rs - Expand the precision of the two
+ * right-alternate elements of a quad byte vector
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] PRECEQU.PH.QBR rt, rs - Expand the precision of the two right-most
+ * elements of a quad byte vector
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] PRECEU.PH.QBLA rt, rs - Expand the precision of the two
+ * left-alternate elements of a quad byte vector to four unsigned
+ * halfwords
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] PRECEU.PH.QBL rt, rs - Expand the precision of the two left-most
+ * elements of a quad byte vector to form unsigned halfwords
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] PRECEU.PH.QBRA rt, rs - Expand the precision of the two
+ * right-alternate elements of a quad byte vector to form four
+ * unsigned halfwords
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
+ * [DSP] PRECEU.PH.QBR rt, rs - Expand the precision of the two right-most
+ * elements of a quad byte vector to form unsigned halfwords
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * SUBU.PH rd, rs, rt - Subtract Unsigned Integer Halfwords
+ * [DSP] SUBU.PH rd, rs, rt - Subtract unsigned unsigned halfwords
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * SUBU.QB rd, rs, rt - Subtract Unsigned Quad Byte Vector
+ * [DSP] SUBU.QB rd, rs, rt - Subtract unsigned quad byte vectors
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * SUBU_S.PH rd, rs, rt - Subtract Unsigned Integer Halfwords (saturating)
+ * [DSP] SUBU_S.PH rd, rs, rt - Subtract unsigned unsigned halfwords with
+ * 8-bit saturation
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * SUBU_S.QB rd, rs, rt - Subtract Unsigned Quad Byte Vector (saturating)
+ * [DSP] SUBU_S.QB rd, rs, rt - Subtract unsigned quad byte vectors with
+ * 8-bit saturation
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * SUBUH.QB rd, rs, rt - Subtract Unsigned Bytes And Right Shift to Halve
- * Results
+ * [DSP] SUBUH.QB rd, rs, rt - Subtract unsigned bytes and right shift
+ * to halve results
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * SUBUH_R.QB rd, rs, rt - Subtract Unsigned Bytes And Right Shift to Halve
- * Results (rounding)
+ * [DSP] SUBUH_R.QB rd, rs, rt - Subtract unsigned bytes and right shift
+ * to halve results with rounding
*
* 3 2 1
* 10987654321098765432109876543210
/*
- * WRDSP rt, mask - Write Fields to DSPControl Register from a GPR
+ * [DSP] WRDSP rt, mask - Write selected fields from a GPR to the DSPControl
+ * register
*
* 3 2 1
* 10987654321098765432109876543210
void qapi_event_send_my_event(void);
typedef enum example_QAPIEvent {
- EXAMPLE_QAPI_EVENT_MY_EVENT = 0,
- EXAMPLE_QAPI_EVENT__MAX = 1,
+ EXAMPLE_QAPI_EVENT_MY_EVENT,
+ EXAMPLE_QAPI_EVENT__MAX,
} example_QAPIEvent;
#define example_QAPIEvent_str(val) \
void qapi_event_send_my_event(void)
{
QDict *qmp;
- QMPEventFuncEmit emit;
-
- emit = qmp_event_get_func_emit();
- if (!emit) {
- return;
- }
qmp = qmp_event_build_dict("MY_EVENT");
- emit(EXAMPLE_QAPI_EVENT_MY_EVENT, qmp);
+ example_qapi_event_emit(EXAMPLE_QAPI_EVENT_MY_EVENT, qmp);
qobject_unref(qmp);
}
@c man begin DESCRIPTION
@menu
-* recommendations_cpu_models_x86:: Recommendations for KVM CPU model configuration on x86 hosts
-* cpu_model_syntax_apps:: Syntax for configuring CPU models
+* recommendations_cpu_models_x86:: Recommendations for KVM CPU model configuration on x86 hosts
+* recommendations_cpu_models_MIPS:: Supported CPU model configurations on MIPS hosts
+* cpu_model_syntax_apps:: Syntax for configuring CPU models
@end menu
QEMU / KVM virtualization supports two ways to configure CPU models
running virtual machines.
@end table
+@node recommendations_cpu_models_MIPS
+@subsection Supported CPU model configurations on MIPS hosts
+
+QEMU supports variety of MIPS CPU models:
+
+@menu
+* cpu_models_MIPS32:: Supported CPU models for MIPS32 hosts
+* cpu_models_MIPS64:: Supported CPU models for MIPS64 hosts
+* cpu_models_nanoMIPS:: Supported CPU models for nanoMIPS hosts
+* preferred_cpu_models_MIPS:: Preferred CPU models for MIPS hosts
+@end menu
+
+@node cpu_models_MIPS32
+@subsubsection Supported CPU models for MIPS32 hosts
+
+The following CPU models are supported for use on MIPS32 hosts. Administrators /
+applications are recommended to use the CPU model that matches the generation
+of the host CPUs in use. In a deployment with a mixture of host CPU models
+between machines, if live migration compatibility is required, use the newest
+CPU model that is compatible across all desired hosts.
+
+@table @option
+@item @code{mips32r6-generic}
+
+MIPS32 Processor (Release 6, 2015)
+
+
+@item @code{P5600}
+
+MIPS32 Processor (P5600, 2014)
+
+
+@item @code{M14K}
+@item @code{M14Kc}
+
+MIPS32 Processor (M14K, 2009)
+
+
+@item @code{74Kf}
+
+MIPS32 Processor (74K, 2007)
+
+
+@item @code{34Kf}
+
+MIPS32 Processor (34K, 2006)
+
+
+@item @code{24Kc}
+@item @code{24KEc}
+@item @code{24Kf}
+
+MIPS32 Processor (24K, 2003)
+
+
+@item @code{4Kc}
+@item @code{4Km}
+@item @code{4KEcR1}
+@item @code{4KEmR1}
+@item @code{4KEc}
+@item @code{4KEm}
+
+MIPS32 Processor (4K, 1999)
+@end table
+
+@node cpu_models_MIPS64
+@subsubsection Supported CPU models for MIPS64 hosts
+
+The following CPU models are supported for use on MIPS64 hosts. Administrators /
+applications are recommended to use the CPU model that matches the generation
+of the host CPUs in use. In a deployment with a mixture of host CPU models
+between machines, if live migration compatibility is required, use the newest
+CPU model that is compatible across all desired hosts.
+
+@table @option
+@item @code{I6400}
+
+MIPS64 Processor (Release 6, 2014)
+
+
+@item @code{Loongson-2F}
+
+MIPS64 Processor (Longsoon 2, 2008)
+
+
+@item @code{Loongson-2E}
+
+MIPS64 Processor (Loongson 2, 2006)
+
+
+@item @code{mips64dspr2}
+
+MIPS64 Processor (Release 2, 2006)
+
+
+@item @code{MIPS64R2-generic}
+@item @code{5KEc}
+@item @code{5KEf}
+
+MIPS64 Processor (Release 2, 2002)
+
+
+@item @code{20Kc}
+
+MIPS64 Processor (20K, 2000)
+
+
+@item @code{5Kc}
+@item @code{5Kf}
+
+MIPS64 Processor (5K, 1999)
+
+
+@item @code{VR5432}
+
+MIPS64 Processor (VR, 1998)
+
+
+@item @code{R4000}
+
+MIPS64 Processor (MIPS III, 1991)
+@end table
+
+@node cpu_models_nanoMIPS
+@subsubsection Supported CPU models for nanoMIPS hosts
+
+The following CPU models are supported for use on nanoMIPS hosts. Administrators /
+applications are recommended to use the CPU model that matches the generation
+of the host CPUs in use. In a deployment with a mixture of host CPU models
+between machines, if live migration compatibility is required, use the newest
+CPU model that is compatible across all desired hosts.
+
+@table @option
+@item @code{I7200}
+
+MIPS I7200 (nanoMIPS, 2018)
+
+@end table
+
+@node preferred_cpu_models_MIPS
+@subsubsection Preferred CPU models for MIPS hosts
+
+The following CPU models are preferred for use on different MIPS hosts:
+
+@table @option
+@item @code{MIPS III}
+R4000
+
+@item @code{MIPS32R2}
+34Kf
+
+@item @code{MIPS64R6}
+I6400
+
+@item @code{nanoMIPS}
+I7200
+@end table
+
@node cpu_model_syntax_apps
@subsection Syntax for configuring CPU models
cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask);
}
+void memory_region_flush_rom_device(MemoryRegion *mr, hwaddr addr, hwaddr size)
+{
+ /*
+ * In principle this function would work on other memory region types too,
+ * but the ROM device use case is the only one where this operation is
+ * necessary. Other memory regions should use the
+ * address_space_read/write() APIs.
+ */
+ assert(memory_region_is_romd(mr));
+
+ invalidate_and_set_dirty(mr, addr, size);
+}
+
static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr)
{
unsigned access_size_max = mr->ops->valid.max_access_size;
phys_addr += (addr & ~TARGET_PAGE_MASK);
if (is_write) {
address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr,
- MEMTXATTRS_UNSPECIFIED,
- buf, l);
+ attrs, buf, l);
} else {
address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,
- MEMTXATTRS_UNSPECIFIED,
- buf, l, 0);
+ attrs, buf, l, 0);
}
len -= l;
buf += l;
return float64_round_pack_canonical(pr, status);
}
+static bool force_soft_fma;
+
float32 QEMU_FLATTEN
float32_muladd(float32 xa, float32 xb, float32 xc, int flags, float_status *s)
{
if (unlikely(!f32_is_zon3(ua, ub, uc))) {
goto soft;
}
+
+ if (unlikely(force_soft_fma)) {
+ goto soft;
+ }
+
/*
* When (a || b) == 0, there's no need to check for under/over flow,
* since we know the addend is (normal || 0) and the product is 0.
if (unlikely(!f64_is_zon3(ua, ub, uc))) {
goto soft;
}
+
+ if (unlikely(force_soft_fma)) {
+ goto soft;
+ }
+
/*
* When (a || b) == 0, there's no need to check for under/over flow,
* since we know the addend is (normal || 0) and the product is 0.
, status);
}
+
+static void __attribute__((constructor)) softfloat_init(void)
+{
+ union_float64 ua, ub, uc, ur;
+
+ if (QEMU_NO_HARDFLOAT) {
+ return;
+ }
+ /*
+ * Test that the host's FMA is not obviously broken. For example,
+ * glibc < 2.23 can perform an incorrect FMA on certain hosts; see
+ * https://sourceware.org/bugzilla/show_bug.cgi?id=13304
+ */
+ ua.s = 0x0020000000000001ULL;
+ ub.s = 0x3ca0000000000000ULL;
+ uc.s = 0x0020000000000000ULL;
+ ur.h = fma(ua.h, ub.h, uc.h);
+ if (ur.s != 0x0020000000000001ULL) {
+ force_soft_fma = true;
+ }
+}
static uint32_t gdb_get_cpu_pid(const GDBState *s, CPUState *cpu)
{
-#ifndef CONFIG_USER_ONLY
- gchar *path, *name = NULL;
- Object *obj;
- CPUClusterState *cluster;
- uint32_t ret;
-
- path = object_get_canonical_path(OBJECT(cpu));
-
- if (path == NULL) {
- /* Return the default process' PID */
- ret = s->processes[s->process_num - 1].pid;
- goto out;
- }
-
- name = object_get_canonical_path_component(OBJECT(cpu));
- assert(name != NULL);
-
- /*
- * Retrieve the CPU parent path by removing the last '/' and the CPU name
- * from the CPU canonical path.
- */
- path[strlen(path) - strlen(name) - 1] = '\0';
-
- obj = object_resolve_path_type(path, TYPE_CPU_CLUSTER, NULL);
-
- if (obj == NULL) {
+ /* TODO: In user mode, we should use the task state PID */
+ if (cpu->cluster_index == UNASSIGNED_CLUSTER_INDEX) {
/* Return the default process' PID */
- ret = s->processes[s->process_num - 1].pid;
- goto out;
+ return s->processes[s->process_num - 1].pid;
}
-
- cluster = CPU_CLUSTER(obj);
- ret = cluster->cluster_id + 1;
-
-out:
- g_free(name);
- g_free(path);
-
- return ret;
-
-#else
- /* TODO: In user mode, we should use the task state PID */
- return s->processes[s->process_num - 1].pid;
-#endif
+ return cpu->cluster_index + 1;
}
static GDBProcess *gdb_get_process(const GDBState *s, uint32_t pid)
return cpu;
}
-static CPUState *gdb_get_cpu(const GDBState *s, uint32_t pid, uint32_t tid)
-{
- GDBProcess *process;
- CPUState *cpu;
-
- if (!tid) {
- /* 0 means any thread, we take the first one */
- tid = 1;
- }
-
- cpu = find_cpu(tid);
-
- if (cpu == NULL) {
- return NULL;
- }
-
- process = gdb_get_cpu_process(s, cpu);
-
- if (process->pid != pid) {
- return NULL;
- }
-
- if (!process->attached) {
- return NULL;
- }
-
- return cpu;
-}
-
/* Return the cpu following @cpu, while ignoring unattached processes. */
static CPUState *gdb_next_attached_cpu(const GDBState *s, CPUState *cpu)
{
return cpu;
}
+static CPUState *gdb_get_cpu(const GDBState *s, uint32_t pid, uint32_t tid)
+{
+ GDBProcess *process;
+ CPUState *cpu;
+
+ if (!pid && !tid) {
+ /* 0 means any process/thread, we take the first attached one */
+ return gdb_first_attached_cpu(s);
+ } else if (pid && !tid) {
+ /* any thread in a specific process */
+ process = gdb_get_process(s, pid);
+
+ if (process == NULL) {
+ return NULL;
+ }
+
+ if (!process->attached) {
+ return NULL;
+ }
+
+ return get_first_cpu_in_process(s, process);
+ } else {
+ /* a specific thread */
+ cpu = find_cpu(tid);
+
+ if (cpu == NULL) {
+ return NULL;
+ }
+
+ process = gdb_get_cpu_process(s, cpu);
+
+ if (pid && process->pid != pid) {
+ return NULL;
+ }
+
+ if (!process->attached) {
+ return NULL;
+ }
+
+ return cpu;
+ }
+}
+
static const char *get_feature_xml(const GDBState *s, const char *p,
const char **newp, GDBProcess *process)
{
info->ram->page_size >> 10);
monitor_printf(mon, "multifd bytes: %" PRIu64 " kbytes\n",
info->ram->multifd_bytes >> 10);
+ monitor_printf(mon, "pages-per-second: %" PRIu64 "\n",
+ info->ram->pages_per_second);
if (info->ram->dirty_pages_rate) {
monitor_printf(mon, "dirty pages rate: %" PRIu64 " pages\n",
#include "exec/address-spaces.h"
#include "hw/arm/nrf51_soc.h"
+#include "hw/i2c/microbit_i2c.h"
typedef struct {
MachineState parent;
NRF51State nrf51;
+ MicrobitI2CState i2c;
} MicrobitMachineState;
#define TYPE_MICROBIT_MACHINE MACHINE_TYPE_NAME("microbit")
{
MicrobitMachineState *s = MICROBIT_MACHINE(machine);
MemoryRegion *system_memory = get_system_memory();
+ MemoryRegion *mr;
Object *soc = OBJECT(&s->nrf51);
+ Object *i2c = OBJECT(&s->i2c);
sysbus_init_child_obj(OBJECT(machine), "nrf51", soc, sizeof(s->nrf51),
TYPE_NRF51_SOC);
&error_fatal);
object_property_set_bool(soc, true, "realized", &error_fatal);
+ /*
+ * Overlap the TWI stub device into the SoC. This is a microbit-specific
+ * hack until we implement the nRF51 TWI controller properly and the
+ * magnetometer/accelerometer devices.
+ */
+ sysbus_init_child_obj(OBJECT(machine), "microbit.twi", i2c,
+ sizeof(s->i2c), TYPE_MICROBIT_I2C);
+ object_property_set_bool(i2c, true, "realized", &error_fatal);
+ mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(i2c), 0);
+ memory_region_add_subregion_overlap(&s->nrf51.container, NRF51_TWI_BASE,
+ mr, -1);
+
armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
NRF51_SOC(soc)->flash_size);
}
int i;
int num_rpus = MIN(smp_cpus - XLNX_ZYNQMP_NUM_APU_CPUS, XLNX_ZYNQMP_NUM_RPU_CPUS);
+ if (num_rpus <= 0) {
+ /* Don't create rpu-cluster object if there's nothing to put in it */
+ return;
+ }
+
object_initialize_child(OBJECT(s), "rpu-cluster", &s->rpu_cluster,
sizeof(s->rpu_cluster), TYPE_CPU_CLUSTER,
&error_abort, NULL);
qdev_prop_set_uint32(DEVICE(&s->rpu_cluster), "cluster-id", 1);
- qdev_init_nofail(DEVICE(&s->rpu_cluster));
-
for (i = 0; i < num_rpus; i++) {
char *name;
return;
}
}
+
+ qdev_init_nofail(DEVICE(&s->rpu_cluster));
}
static void xlnx_zynqmp_init(Object *obj)
} PCSpkState;
static const char *s_spk = "pcspk";
-static PCSpkState *pcspk_state;
static inline void generate_samples(PCSpkState *s)
{
}
}
-static int pcspk_audio_init(ISABus *bus)
-{
- PCSpkState *s = pcspk_state;
- struct audsettings as = {PCSPK_SAMPLE_RATE, 1, AUD_FMT_U8, 0};
-
- AUD_register_card(s_spk, &s->card);
-
- s->voice = AUD_open_out(&s->card, s->voice, s_spk, s, pcspk_callback, &as);
- if (!s->voice) {
- AUD_log(s_spk, "Could not open voice\n");
- return -1;
- }
-
- return 0;
-}
-
static uint64_t pcspk_io_read(void *opaque, hwaddr addr,
unsigned size)
{
static void pcspk_realizefn(DeviceState *dev, Error **errp)
{
+ struct audsettings as = {PCSPK_SAMPLE_RATE, 1, AUD_FMT_U8, 0};
ISADevice *isadev = ISA_DEVICE(dev);
PCSpkState *s = PC_SPEAKER(dev);
isa_register_ioport(isadev, &s->ioport, s->iobase);
- pcspk_state = s;
+ AUD_register_card(s_spk, &s->card);
+
+ s->voice = AUD_open_out(&s->card, s->voice, s_spk, s, pcspk_callback, &as);
+ if (!s->voice) {
+ error_setg(errp, "Initializing audio voice failed");
+ AUD_remove_card(&s->card);
+ return;
+ }
}
static bool migrate_needed(void *opaque)
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
dc->vmsd = &vmstate_spk;
dc->props = pcspk_properties;
- /* Reason: realize sets global pcspk_state */
- dc->user_creatable = false;
}
static const TypeInfo pcspk_info = {
.class_init = pcspk_class_initfn,
};
+static int pcspk_audio_init(ISABus *bus)
+{
+ isa_create_simple(bus, TYPE_PC_SPEAKER);
+ return 0;
+}
+
static void pcspk_register(void)
{
type_register_static(&pcspk_info);
#include "qemu/osdep.h"
#include "hw/cpu/cluster.h"
+#include "qom/cpu.h"
#include "qapi/error.h"
#include "qemu/module.h"
+#include "qemu/cutils.h"
static Property cpu_cluster_properties[] = {
DEFINE_PROP_UINT32("cluster-id", CPUClusterState, cluster_id, 0),
DEFINE_PROP_END_OF_LIST()
};
+typedef struct CallbackData {
+ CPUClusterState *cluster;
+ int cpu_count;
+} CallbackData;
+
+static int add_cpu_to_cluster(Object *obj, void *opaque)
+{
+ CallbackData *cbdata = opaque;
+ CPUState *cpu = (CPUState *)object_dynamic_cast(obj, TYPE_CPU);
+
+ if (cpu) {
+ cpu->cluster_index = cbdata->cluster->cluster_id;
+ cbdata->cpu_count++;
+ }
+ return 0;
+}
+
+static void cpu_cluster_realize(DeviceState *dev, Error **errp)
+{
+ /* Iterate through all our CPU children and set their cluster_index */
+ CPUClusterState *cluster = CPU_CLUSTER(dev);
+ Object *cluster_obj = OBJECT(dev);
+ CallbackData cbdata = {
+ .cluster = cluster,
+ .cpu_count = 0,
+ };
+
+ if (cluster->cluster_id >= MAX_CLUSTERS) {
+ error_setg(errp, "cluster-id must be less than %d", MAX_CLUSTERS);
+ return;
+ }
+
+ object_child_foreach_recursive(cluster_obj, add_cpu_to_cluster, &cbdata);
+
+ /*
+ * A cluster with no CPUs is a bug in the board/SoC code that created it;
+ * if you hit this during development of new code, check that you have
+ * created the CPUs and parented them into the cluster object before
+ * realizing the cluster object.
+ */
+ assert(cbdata.cpu_count > 0);
+}
+
static void cpu_cluster_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->props = cpu_cluster_properties;
+ dc->realize = cpu_cluster_realize;
}
static const TypeInfo cpu_cluster_type_info = {
common-obj-$(CONFIG_EXYNOS4) += exynos4210_i2c.o
common-obj-$(CONFIG_IMX_I2C) += imx_i2c.o
common-obj-$(CONFIG_ASPEED_SOC) += aspeed_i2c.o
+common-obj-$(CONFIG_NRF51_SOC) += microbit_i2c.o
obj-$(CONFIG_OMAP) += omap_i2c.o
obj-$(CONFIG_PPC4XX) += ppc4xx_i2c.o
--- /dev/null
+/*
+ * Microbit stub for Nordic Semiconductor nRF51 SoC Two-Wire Interface
+ * http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.1.pdf
+ *
+ * This is a microbit-specific stub for the TWI controller on the nRF51 SoC.
+ * We don't emulate I2C devices but the firmware probes the
+ * accelerometer/magnetometer on startup and panics if they are not found.
+ * Therefore we stub out the probing.
+ *
+ * In the future this file could evolve into a full nRF51 TWI controller
+ * device.
+ *
+ * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
+ * Copyright 2019 Red Hat, Inc.
+ *
+ * This code is licensed under the GPL version 2 or later. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/log.h"
+#include "hw/i2c/microbit_i2c.h"
+
+static const uint32_t twi_read_sequence[] = {0x5A, 0x5A, 0x40};
+
+static uint64_t microbit_i2c_read(void *opaque, hwaddr addr, unsigned int size)
+{
+ MicrobitI2CState *s = opaque;
+ uint64_t data = 0x00;
+
+ switch (addr) {
+ case NRF51_TWI_EVENT_STOPPED:
+ data = 0x01;
+ break;
+ case NRF51_TWI_EVENT_RXDREADY:
+ data = 0x01;
+ break;
+ case NRF51_TWI_EVENT_TXDSENT:
+ data = 0x01;
+ break;
+ case NRF51_TWI_REG_RXD:
+ data = twi_read_sequence[s->read_idx];
+ if (s->read_idx < G_N_ELEMENTS(twi_read_sequence)) {
+ s->read_idx++;
+ }
+ break;
+ default:
+ data = s->regs[addr / sizeof(s->regs[0])];
+ break;
+ }
+
+ qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " [%u] = %" PRIx32 "\n",
+ __func__, addr, size, (uint32_t)data);
+
+
+ return data;
+}
+
+static void microbit_i2c_write(void *opaque, hwaddr addr, uint64_t data,
+ unsigned int size)
+{
+ MicrobitI2CState *s = opaque;
+
+ qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " <- 0x%" PRIx64 " [%u]\n",
+ __func__, addr, data, size);
+ s->regs[addr / sizeof(s->regs[0])] = data;
+}
+
+static const MemoryRegionOps microbit_i2c_ops = {
+ .read = microbit_i2c_read,
+ .write = microbit_i2c_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .impl.min_access_size = 4,
+ .impl.max_access_size = 4,
+};
+
+static const VMStateDescription microbit_i2c_vmstate = {
+ .name = TYPE_MICROBIT_I2C,
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT32_ARRAY(regs, MicrobitI2CState, MICROBIT_I2C_NREGS),
+ VMSTATE_UINT32(read_idx, MicrobitI2CState),
+ },
+};
+
+static void microbit_i2c_reset(DeviceState *dev)
+{
+ MicrobitI2CState *s = MICROBIT_I2C(dev);
+
+ memset(s->regs, 0, sizeof(s->regs));
+ s->read_idx = 0;
+}
+
+static void microbit_i2c_realize(DeviceState *dev, Error **errp)
+{
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+ MicrobitI2CState *s = MICROBIT_I2C(dev);
+
+ memory_region_init_io(&s->iomem, OBJECT(s), µbit_i2c_ops, s,
+ "microbit.twi", NRF51_TWI_SIZE);
+ sysbus_init_mmio(sbd, &s->iomem);
+}
+
+static void microbit_i2c_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->vmsd = µbit_i2c_vmstate;
+ dc->reset = microbit_i2c_reset;
+ dc->realize = microbit_i2c_realize;
+ dc->desc = "Microbit I2C controller";
+}
+
+static const TypeInfo microbit_i2c_info = {
+ .name = TYPE_MICROBIT_I2C,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(MicrobitI2CState),
+ .class_init = microbit_i2c_class_init,
+};
+
+static void microbit_i2c_register_types(void)
+{
+ type_register_static(µbit_i2c_info);
+}
+
+type_init(microbit_i2c_register_types)
{ "intel-iommu", "dma-drain", "off" },
{ "Opteron_G3" "-" TYPE_X86_CPU, "rdtscp", "off" },
{ "Opteron_G4" "-" TYPE_X86_CPU, "rdtscp", "off" },
+ { "Opteron_G4" "-" TYPE_X86_CPU, "npt", "off" },
+ { "Opteron_G4" "-" TYPE_X86_CPU, "nrip-save", "off" },
{ "Opteron_G5" "-" TYPE_X86_CPU, "rdtscp", "off" },
+ { "Opteron_G5" "-" TYPE_X86_CPU, "npt", "off" },
+ { "Opteron_G5" "-" TYPE_X86_CPU, "nrip-save", "off" },
+ { "EPYC" "-" TYPE_X86_CPU, "npt", "off" },
+ { "EPYC" "-" TYPE_X86_CPU, "nrip-save", "off" },
+ { "EPYC-IBPB" "-" TYPE_X86_CPU, "npt", "off" },
+ { "EPYC-IBPB" "-" TYPE_X86_CPU, "nrip-save", "off" },
{ "Skylake-Client" "-" TYPE_X86_CPU, "mpx", "on" },
{ "Skylake-Client-IBRS" "-" TYPE_X86_CPU, "mpx", "on" },
{ "Skylake-Server" "-" TYPE_X86_CPU, "mpx", "on" },
{ "Cascadelake-Server" "-" TYPE_X86_CPU, "mpx", "on" },
{ "Icelake-Client" "-" TYPE_X86_CPU, "mpx", "on" },
{ "Icelake-Server" "-" TYPE_X86_CPU, "mpx", "on" },
+ { "Cascadelake-Server" "-" TYPE_X86_CPU, "stepping", "5" },
};
const size_t pc_compat_3_1_len = G_N_ELEMENTS(pc_compat_3_1);
}
}
-static HotplugHandler *pc_get_hotpug_handler(MachineState *machine,
+static HotplugHandler *pc_get_hotplug_handler(MachineState *machine,
DeviceState *dev)
{
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) ||
pcmc->save_tsc_khz = true;
pcmc->linuxboot_dma_enabled = true;
assert(!mc->get_hotplug_handler);
- mc->get_hotplug_handler = pc_get_hotpug_handler;
+ mc->get_hotplug_handler = pc_get_hotplug_handler;
mc->cpu_index_to_instance_props = pc_cpu_index_to_props;
mc->get_default_cpu_node_id = pc_get_default_cpu_node_id;
mc->possible_cpu_arch_ids = pc_possible_cpu_arch_ids;
static void cmd646_update_irq(PCIDevice *pd);
-static uint64_t cmd646_cmd_read(void *opaque, hwaddr addr,
- unsigned size)
-{
- CMD646BAR *cmd646bar = opaque;
-
- if (addr != 2 || size != 1) {
- return ((uint64_t)1 << (size * 8)) - 1;
- }
- return ide_status_read(cmd646bar->bus, addr + 2);
-}
-
-static void cmd646_cmd_write(void *opaque, hwaddr addr,
- uint64_t data, unsigned size)
-{
- CMD646BAR *cmd646bar = opaque;
-
- if (addr != 2 || size != 1) {
- return;
- }
- ide_cmd_write(cmd646bar->bus, addr + 2, data);
-}
-
-static const MemoryRegionOps cmd646_cmd_ops = {
- .read = cmd646_cmd_read,
- .write = cmd646_cmd_write,
- .endianness = DEVICE_LITTLE_ENDIAN,
-};
-
-static uint64_t cmd646_data_read(void *opaque, hwaddr addr,
- unsigned size)
-{
- CMD646BAR *cmd646bar = opaque;
-
- if (size == 1) {
- return ide_ioport_read(cmd646bar->bus, addr);
- } else if (addr == 0) {
- if (size == 2) {
- return ide_data_readw(cmd646bar->bus, addr);
- } else {
- return ide_data_readl(cmd646bar->bus, addr);
- }
- }
- return ((uint64_t)1 << (size * 8)) - 1;
-}
-
-static void cmd646_data_write(void *opaque, hwaddr addr,
- uint64_t data, unsigned size)
-{
- CMD646BAR *cmd646bar = opaque;
-
- if (size == 1) {
- ide_ioport_write(cmd646bar->bus, addr, data);
- } else if (addr == 0) {
- if (size == 2) {
- ide_data_writew(cmd646bar->bus, addr, data);
- } else {
- ide_data_writel(cmd646bar->bus, addr, data);
- }
- }
-}
-
-static const MemoryRegionOps cmd646_data_ops = {
- .read = cmd646_data_read,
- .write = cmd646_data_write,
- .endianness = DEVICE_LITTLE_ENDIAN,
-};
-
-static void setup_cmd646_bar(PCIIDEState *d, int bus_num)
-{
- IDEBus *bus = &d->bus[bus_num];
- CMD646BAR *bar = &d->cmd646_bar[bus_num];
-
- bar->bus = bus;
- bar->pci_dev = d;
- memory_region_init_io(&bar->cmd, OBJECT(d), &cmd646_cmd_ops, bar,
- "cmd646-cmd", 4);
- memory_region_init_io(&bar->data, OBJECT(d), &cmd646_data_ops, bar,
- "cmd646-data", 8);
-}
-
static void cmd646_update_dma_interrupts(PCIDevice *pd)
{
/* Sync DMA interrupt status from UDMA interrupt status */
dev->wmask[MRDMODE] = 0x0;
dev->w1cmask[MRDMODE] = MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1;
- setup_cmd646_bar(d, 0);
- setup_cmd646_bar(d, 1);
- pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd646_bar[0].data);
- pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd646_bar[0].cmd);
- pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd646_bar[1].data);
- pci_register_bar(dev, 3, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd646_bar[1].cmd);
+ memory_region_init_io(&d->data_bar[0], OBJECT(d), &pci_ide_data_le_ops,
+ &d->bus[0], "cmd646-data0", 8);
+ pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[0]);
+
+ memory_region_init_io(&d->cmd_bar[0], OBJECT(d), &pci_ide_cmd_le_ops,
+ &d->bus[0], "cmd646-cmd0", 4);
+ pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[0]);
+
+ memory_region_init_io(&d->data_bar[1], OBJECT(d), &pci_ide_data_le_ops,
+ &d->bus[1], "cmd646-data1", 8);
+ pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[1]);
+
+ memory_region_init_io(&d->cmd_bar[1], OBJECT(d), &pci_ide_cmd_le_ops,
+ &d->bus[1], "cmd646-cmd1", 4);
+ pci_register_bar(dev, 3, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[1]);
+
bmdma_setup_bar(d);
pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar);
(IDE_RETRY_DMA | IDE_RETRY_PIO | \
IDE_RETRY_READ | IDE_RETRY_FLUSH)
+static uint64_t pci_ide_cmd_read(void *opaque, hwaddr addr, unsigned size)
+{
+ IDEBus *bus = opaque;
+
+ if (addr != 2 || size != 1) {
+ return ((uint64_t)1 << (size * 8)) - 1;
+ }
+ return ide_status_read(bus, addr + 2);
+}
+
+static void pci_ide_cmd_write(void *opaque, hwaddr addr,
+ uint64_t data, unsigned size)
+{
+ IDEBus *bus = opaque;
+
+ if (addr != 2 || size != 1) {
+ return;
+ }
+ ide_cmd_write(bus, addr + 2, data);
+}
+
+const MemoryRegionOps pci_ide_cmd_le_ops = {
+ .read = pci_ide_cmd_read,
+ .write = pci_ide_cmd_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static uint64_t pci_ide_data_read(void *opaque, hwaddr addr, unsigned size)
+{
+ IDEBus *bus = opaque;
+
+ if (size == 1) {
+ return ide_ioport_read(bus, addr);
+ } else if (addr == 0) {
+ if (size == 2) {
+ return ide_data_readw(bus, addr);
+ } else {
+ return ide_data_readl(bus, addr);
+ }
+ }
+ return ((uint64_t)1 << (size * 8)) - 1;
+}
+
+static void pci_ide_data_write(void *opaque, hwaddr addr,
+ uint64_t data, unsigned size)
+{
+ IDEBus *bus = opaque;
+
+ if (size == 1) {
+ ide_ioport_write(bus, addr, data);
+ } else if (addr == 0) {
+ if (size == 2) {
+ ide_data_writew(bus, addr, data);
+ } else {
+ ide_data_writel(bus, addr, data);
+ }
+ }
+}
+
+const MemoryRegionOps pci_ide_data_le_ops = {
+ .read = pci_ide_data_read,
+ .write = pci_ide_data_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
static void bmdma_start_dma(IDEDMA *dma, IDEState *s,
BlockCompletionFunc *dma_cb)
{
val |= (uint32_t)d->i.bmdma[1].status << 16;
break;
case 0x80 ... 0x87:
- if (size == 1) {
- val = ide_ioport_read(&d->i.bus[0], addr - 0x80);
- } else if (addr == 0x80) {
- val = (size == 2) ? ide_data_readw(&d->i.bus[0], 0) :
- ide_data_readl(&d->i.bus[0], 0);
- } else {
- val = (1ULL << (size * 8)) - 1;
- }
+ val = pci_ide_data_le_ops.read(&d->i.bus[0], addr - 0x80, size);
break;
case 0x8a:
- val = (size == 1) ? ide_status_read(&d->i.bus[0], 4) :
- (1ULL << (size * 8)) - 1;
+ val = pci_ide_cmd_le_ops.read(&d->i.bus[0], 2, size);
break;
case 0xa0:
val = d->regs[0].confstat;
break;
case 0xc0 ... 0xc7:
- if (size == 1) {
- val = ide_ioport_read(&d->i.bus[1], addr - 0xc0);
- } else if (addr == 0xc0) {
- val = (size == 2) ? ide_data_readw(&d->i.bus[1], 0) :
- ide_data_readl(&d->i.bus[1], 0);
- } else {
- val = (1ULL << (size * 8)) - 1;
- }
+ val = pci_ide_data_le_ops.read(&d->i.bus[1], addr - 0xc0, size);
break;
case 0xca:
- val = (size == 1) ? ide_status_read(&d->i.bus[0], 4) :
- (1ULL << (size * 8)) - 1;
+ val = pci_ide_cmd_le_ops.read(&d->i.bus[1], 2, size);
break;
case 0xe0:
val = d->regs[1].confstat;
bmdma_addr_ioport_ops.write(&d->i.bmdma[1], addr - 12, val, size);
break;
case 0x80 ... 0x87:
- if (size == 1) {
- ide_ioport_write(&d->i.bus[0], addr - 0x80, val);
- } else if (addr == 0x80) {
- if (size == 2) {
- ide_data_writew(&d->i.bus[0], 0, val);
- } else {
- ide_data_writel(&d->i.bus[0], 0, val);
- }
- }
+ pci_ide_data_le_ops.write(&d->i.bus[0], addr - 0x80, val, size);
break;
case 0x8a:
- if (size == 1) {
- ide_cmd_write(&d->i.bus[0], 4, val);
- }
+ pci_ide_cmd_le_ops.write(&d->i.bus[0], 2, val, size);
break;
case 0xc0 ... 0xc7:
- if (size == 1) {
- ide_ioport_write(&d->i.bus[1], addr - 0xc0, val);
- } else if (addr == 0xc0) {
- if (size == 2) {
- ide_data_writew(&d->i.bus[1], 0, val);
- } else {
- ide_data_writel(&d->i.bus[1], 0, val);
- }
- }
+ pci_ide_data_le_ops.write(&d->i.bus[1], addr - 0xc0, val, size);
break;
case 0xca:
- if (size == 1) {
- ide_cmd_write(&d->i.bus[1], 4, val);
- }
+ pci_ide_cmd_le_ops.write(&d->i.bus[1], 2, val, size);
break;
case 0x100:
d->regs[0].scontrol = val & 0xfff;
}
}
-static void via_reset(void *opaque)
+static void via_ide_set_irq(void *opaque, int n, int level)
+{
+ PCIDevice *d = PCI_DEVICE(opaque);
+
+ if (level) {
+ d->config[0x70 + n * 8] |= 0x80;
+ } else {
+ d->config[0x70 + n * 8] &= ~0x80;
+ }
+
+ level = (d->config[0x70] & 0x80) || (d->config[0x78] & 0x80);
+ n = pci_get_byte(d->config + PCI_INTERRUPT_LINE);
+ if (n) {
+ qemu_set_irq(isa_get_irq(NULL, n), level);
+ }
+}
+
+static void via_ide_reset(void *opaque)
{
PCIIDEState *d = opaque;
PCIDevice *pd = PCI_DEVICE(d);
ide_bus_reset(&d->bus[i]);
}
- pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_WAIT);
+ pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_WAIT);
pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_FAST_BACK |
PCI_STATUS_DEVSEL_MEDIUM);
pci_set_long(pci_conf + 0xc0, 0x00020001);
}
-static void vt82c686b_init_ports(PCIIDEState *d) {
- static const struct {
- int iobase;
- int iobase2;
- int isairq;
- } port_info[] = {
- {0x1f0, 0x3f6, 14},
- {0x170, 0x376, 15},
- };
- int i;
-
- for (i = 0; i < 2; i++) {
- ide_bus_new(&d->bus[i], sizeof(d->bus[i]), DEVICE(d), i, 2);
- ide_init_ioport(&d->bus[i], NULL, port_info[i].iobase,
- port_info[i].iobase2);
- ide_init2(&d->bus[i], isa_get_irq(NULL, port_info[i].isairq));
-
- bmdma_init(&d->bus[i], &d->bmdma[i], d);
- d->bmdma[i].bus = &d->bus[i];
- ide_register_restart_cb(&d->bus[i]);
- }
-}
-
-/* via ide func */
-static void vt82c686b_ide_realize(PCIDevice *dev, Error **errp)
+static void via_ide_realize(PCIDevice *dev, Error **errp)
{
PCIIDEState *d = PCI_IDE(dev);
uint8_t *pci_conf = dev->config;
+ int i;
- pci_config_set_prog_interface(pci_conf, 0x8a); /* legacy ATA mode */
+ pci_config_set_prog_interface(pci_conf, 0x8f); /* native PCI ATA mode */
pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0);
+ dev->wmask[PCI_INTERRUPT_LINE] = 0xf;
+
+ qemu_register_reset(via_ide_reset, d);
+
+ memory_region_init_io(&d->data_bar[0], OBJECT(d), &pci_ide_data_le_ops,
+ &d->bus[0], "via-ide0-data", 8);
+ pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[0]);
+
+ memory_region_init_io(&d->cmd_bar[0], OBJECT(d), &pci_ide_cmd_le_ops,
+ &d->bus[0], "via-ide0-cmd", 4);
+ pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[0]);
+
+ memory_region_init_io(&d->data_bar[1], OBJECT(d), &pci_ide_data_le_ops,
+ &d->bus[1], "via-ide1-data", 8);
+ pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[1]);
+
+ memory_region_init_io(&d->cmd_bar[1], OBJECT(d), &pci_ide_cmd_le_ops,
+ &d->bus[1], "via-ide1-cmd", 4);
+ pci_register_bar(dev, 3, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[1]);
- qemu_register_reset(via_reset, d);
bmdma_setup_bar(d);
pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar);
vmstate_register(DEVICE(dev), 0, &vmstate_ide_pci, d);
- vt82c686b_init_ports(d);
+ for (i = 0; i < 2; i++) {
+ ide_bus_new(&d->bus[i], sizeof(d->bus[i]), DEVICE(d), i, 2);
+ ide_init2(&d->bus[i], qemu_allocate_irq(via_ide_set_irq, d, i));
+
+ bmdma_init(&d->bus[i], &d->bmdma[i], d);
+ d->bmdma[i].bus = &d->bus[i];
+ ide_register_restart_cb(&d->bus[i]);
+ }
}
-static void vt82c686b_ide_exitfn(PCIDevice *dev)
+static void via_ide_exitfn(PCIDevice *dev)
{
PCIIDEState *d = PCI_IDE(dev);
unsigned i;
}
}
-void vt82c686b_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn)
+void via_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn)
{
PCIDevice *dev;
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- k->realize = vt82c686b_ide_realize;
- k->exit = vt82c686b_ide_exitfn;
+ k->realize = via_ide_realize;
+ k->exit = via_ide_exitfn;
k->vendor_id = PCI_VENDOR_ID_VIA;
k->device_id = PCI_DEVICE_ID_VIA_IDE;
k->revision = 0x06;
isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
ide_drive_get(hd, ARRAY_SIZE(hd));
- vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1));
+ via_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1));
pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");
pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci");
/* Misc Control Register #1 */
#define R_MISC_CTRL1 (0x50 / 4)
-/* Misc Control Register #2 */
-#define R_MISC_CTRL2 (0x54 / 4)
+/* SPI dummy cycle data */
+#define R_DUMMY_DATA (0x54 / 4)
/* DMA Control/Status Register */
#define R_DMA_CTRL (0x80 / 4)
/* Flash opcodes. */
#define SPI_OP_READ 0x03 /* Read data bytes (low frequency) */
+#define SNOOP_OFF 0xFF
+#define SNOOP_START 0x0
+
/*
* Default segments mapping addresses and size for each slave per
* controller. These can be changed when board is initialized with the
*/
if (aspeed_smc_flash_mode(fl) == CTRL_FREADMODE) {
for (i = 0; i < aspeed_smc_flash_dummies(fl); i++) {
- ssi_transfer(fl->controller->spi, 0xFF);
+ ssi_transfer(fl->controller->spi, s->regs[R_DUMMY_DATA] & 0xff);
}
}
}
return ret;
}
+/*
+ * TODO (clg@kaod.org): stolen from xilinx_spips.c. Should move to a
+ * common include header.
+ */
+typedef enum {
+ READ = 0x3, READ_4 = 0x13,
+ FAST_READ = 0xb, FAST_READ_4 = 0x0c,
+ DOR = 0x3b, DOR_4 = 0x3c,
+ QOR = 0x6b, QOR_4 = 0x6c,
+ DIOR = 0xbb, DIOR_4 = 0xbc,
+ QIOR = 0xeb, QIOR_4 = 0xec,
+
+ PP = 0x2, PP_4 = 0x12,
+ DPP = 0xa2,
+ QPP = 0x32, QPP_4 = 0x34,
+} FlashCMD;
+
+static int aspeed_smc_num_dummies(uint8_t command)
+{
+ switch (command) { /* check for dummies */
+ case READ: /* no dummy bytes/cycles */
+ case PP:
+ case DPP:
+ case QPP:
+ case READ_4:
+ case PP_4:
+ case QPP_4:
+ return 0;
+ case FAST_READ:
+ case DOR:
+ case QOR:
+ case DOR_4:
+ case QOR_4:
+ return 1;
+ case DIOR:
+ case FAST_READ_4:
+ case DIOR_4:
+ return 2;
+ case QIOR:
+ case QIOR_4:
+ return 4;
+ default:
+ return -1;
+ }
+}
+
+static bool aspeed_smc_do_snoop(AspeedSMCFlash *fl, uint64_t data,
+ unsigned size)
+{
+ AspeedSMCState *s = fl->controller;
+ uint8_t addr_width = aspeed_smc_flash_is_4byte(fl) ? 4 : 3;
+
+ if (s->snoop_index == SNOOP_OFF) {
+ return false; /* Do nothing */
+
+ } else if (s->snoop_index == SNOOP_START) {
+ uint8_t cmd = data & 0xff;
+ int ndummies = aspeed_smc_num_dummies(cmd);
+
+ /*
+ * No dummy cycles are expected with the current command. Turn
+ * off snooping and let the transfer proceed normally.
+ */
+ if (ndummies <= 0) {
+ s->snoop_index = SNOOP_OFF;
+ return false;
+ }
+
+ s->snoop_dummies = ndummies * 8;
+
+ } else if (s->snoop_index >= addr_width + 1) {
+
+ /* The SPI transfer has reached the dummy cycles sequence */
+ for (; s->snoop_dummies; s->snoop_dummies--) {
+ ssi_transfer(s->spi, s->regs[R_DUMMY_DATA] & 0xff);
+ }
+
+ /* If no more dummy cycles are expected, turn off snooping */
+ if (!s->snoop_dummies) {
+ s->snoop_index = SNOOP_OFF;
+ } else {
+ s->snoop_index += size;
+ }
+
+ /*
+ * Dummy cycles have been faked already. Ignore the current
+ * SPI transfer
+ */
+ return true;
+ }
+
+ s->snoop_index += size;
+ return false;
+}
+
static void aspeed_smc_flash_write(void *opaque, hwaddr addr, uint64_t data,
unsigned size)
{
switch (aspeed_smc_flash_mode(fl)) {
case CTRL_USERMODE:
+ if (aspeed_smc_do_snoop(fl, data, size)) {
+ break;
+ }
+
for (i = 0; i < size; i++) {
ssi_transfer(s->spi, (data >> (8 * i)) & 0xff);
}
static void aspeed_smc_flash_update_cs(AspeedSMCFlash *fl)
{
- const AspeedSMCState *s = fl->controller;
+ AspeedSMCState *s = fl->controller;
+
+ s->snoop_index = aspeed_smc_is_ce_stop_active(fl) ? SNOOP_OFF : SNOOP_START;
qemu_set_irq(s->cs_lines[fl->id], aspeed_smc_is_ce_stop_active(fl));
}
if (s->ctrl->segments == aspeed_segments_fmc) {
s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0);
}
+
+ s->snoop_index = SNOOP_OFF;
+ s->snoop_dummies = 0;
}
static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned int size)
addr == s->r_timings ||
addr == s->r_ce_ctrl ||
addr == R_INTR_CTRL ||
+ addr == R_DUMMY_DATA ||
(addr >= R_SEG_ADDR0 && addr < R_SEG_ADDR0 + s->ctrl->max_slaves) ||
- (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->num_cs)) {
+ (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->ctrl->max_slaves)) {
return s->regs[addr];
} else {
qemu_log_mask(LOG_UNIMP, "%s: not implemented: 0x%" HWADDR_PRIx "\n",
__func__, addr);
- return 0;
+ return -1;
}
}
if (value != s->regs[R_SEG_ADDR0 + cs]) {
aspeed_smc_flash_set_segment(s, cs, value);
}
+ } else if (addr == R_DUMMY_DATA) {
+ s->regs[addr] = value & 0xff;
} else {
qemu_log_mask(LOG_UNIMP, "%s: not implemented: 0x%" HWADDR_PRIx "\n",
__func__, addr);
static const VMStateDescription vmstate_aspeed_smc = {
.name = "aspeed.smc",
- .version_id = 1,
- .minimum_version_id = 1,
+ .version_id = 2,
+ .minimum_version_id = 2,
.fields = (VMStateField[]) {
VMSTATE_UINT32_ARRAY(regs, AspeedSMCState, ASPEED_SMC_R_MAX),
+ VMSTATE_UINT8(snoop_index, AspeedSMCState),
+ VMSTATE_UINT8(snoop_dummies, AspeedSMCState),
VMSTATE_END_OF_LIST()
}
};
*/
unsigned int io_limits_disabled;
+ /* Number of pending throttle_group_restart_queue_entry() coroutines.
+ * Accessed with atomic operations.
+ */
+ unsigned int restart_pending;
+
/* The following fields are protected by the ThrottleGroup lock.
* See the ThrottleGroup documentation for details.
* throttle_state tells us if I/O limits are configured. */
#define CPU_TLB_ENTRY_BITS 5
#endif
-/* TCG_TARGET_TLB_DISPLACEMENT_BITS is used in CPU_TLB_BITS to ensure that
- * the TLB is not unnecessarily small, but still small enough for the
- * TLB lookup instruction sequence used by the TCG target.
- *
- * TCG will have to generate an operand as large as the distance between
- * env and the tlb_table[NB_MMU_MODES - 1][0].addend. For simplicity,
- * the TCG targets just round everything up to the next power of two, and
- * count bits. This works because: 1) the size of each TLB is a largish
- * power of two, 2) and because the limit of the displacement is really close
- * to a power of two, 3) the offset of tlb_table[0][0] inside env is smaller
- * than the size of a TLB.
- *
- * For example, the maximum displacement 0xFFF0 on PPC and MIPS, but TCG
- * just says "the displacement is 16 bits". TCG_TARGET_TLB_DISPLACEMENT_BITS
- * then ensures that tlb_table at least 0x8000 bytes large ("not unnecessarily
- * small": 2^15). The operand then will come up smaller than 0xFFF0 without
- * any particular care, because the TLB for a single MMU mode is larger than
- * 0x10000-0xFFF0=16 bytes. In the end, the maximum value of the operand
- * could be something like 0xC000 (the offset of the last TLB table) plus
- * 0x18 (the offset of the addend field in each TLB entry) plus the offset
- * of tlb_table inside env (which is non-trivial but not huge).
- */
-#define CPU_TLB_BITS \
- MIN(8, \
- TCG_TARGET_TLB_DISPLACEMENT_BITS - CPU_TLB_ENTRY_BITS - \
- (NB_MMU_MODES <= 1 ? 0 : \
- NB_MMU_MODES <= 2 ? 1 : \
- NB_MMU_MODES <= 4 ? 2 : \
- NB_MMU_MODES <= 8 ? 3 : 4))
+#define CPU_TLB_DYN_MIN_BITS 6
+#define CPU_TLB_DYN_DEFAULT_BITS 8
-#define CPU_TLB_SIZE (1 << CPU_TLB_BITS)
+# if HOST_LONG_BITS == 32
+/* Make sure we do not require a double-word shift for the TLB load */
+# define CPU_TLB_DYN_MAX_BITS (32 - TARGET_PAGE_BITS)
+# else /* HOST_LONG_BITS == 64 */
+/*
+ * Assuming TARGET_PAGE_BITS==12, with 2**22 entries we can cover 2**(22+12) ==
+ * 2**34 == 16G of address space. This is roughly what one would expect a
+ * TLB to cover in a modern (as of 2018) x86_64 CPU. For instance, Intel
+ * Skylake's Level-2 STLB has 16 1G entries.
+ * Also, make sure we do not size the TLB past the guest's address space.
+ */
+# define CPU_TLB_DYN_MAX_BITS \
+ MIN(22, TARGET_VIRT_ADDR_SPACE_BITS - TARGET_PAGE_BITS)
+# endif
typedef struct CPUTLBEntry {
/* bit TARGET_LONG_BITS to TARGET_PAGE_BITS : virtual address
MemTxAttrs attrs;
} CPUIOTLBEntry;
+/**
+ * struct CPUTLBWindow
+ * @begin_ns: host time (in ns) at the beginning of the time window
+ * @max_entries: maximum number of entries observed in the window
+ *
+ * See also: tlb_mmu_resize_locked()
+ */
+typedef struct CPUTLBWindow {
+ int64_t begin_ns;
+ size_t max_entries;
+} CPUTLBWindow;
+
typedef struct CPUTLBDesc {
/*
* Describe a region covering all of the large pages allocated
target_ulong large_page_mask;
/* The next index to use in the tlb victim table. */
size_t vindex;
+ CPUTLBWindow window;
+ size_t n_used_entries;
} CPUTLBDesc;
/*
size_t elide_flush_count;
} CPUTLBCommon;
+# define CPU_TLB \
+ /* tlb_mask[i] contains (n_entries - 1) << CPU_TLB_ENTRY_BITS */ \
+ uintptr_t tlb_mask[NB_MMU_MODES]; \
+ CPUTLBEntry *tlb_table[NB_MMU_MODES];
+# define CPU_IOTLB \
+ CPUIOTLBEntry *iotlb[NB_MMU_MODES];
+
/*
* The meaning of each of the MMU modes is defined in the target code.
* Note that NB_MMU_MODES is not yet defined; we can only reference it
#define CPU_COMMON_TLB \
CPUTLBCommon tlb_c; \
CPUTLBDesc tlb_d[NB_MMU_MODES]; \
- CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \
+ CPU_TLB \
CPUTLBEntry tlb_v_table[NB_MMU_MODES][CPU_VTLB_SIZE]; \
- CPUIOTLBEntry iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \
+ CPU_IOTLB \
CPUIOTLBEntry iotlb_v[NB_MMU_MODES][CPU_VTLB_SIZE];
#else
static inline uintptr_t tlb_index(CPUArchState *env, uintptr_t mmu_idx,
target_ulong addr)
{
- return (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
+ uintptr_t size_mask = env->tlb_mask[mmu_idx] >> CPU_TLB_ENTRY_BITS;
+
+ return (addr >> TARGET_PAGE_BITS) & size_mask;
+}
+
+static inline size_t tlb_n_entries(CPUArchState *env, uintptr_t mmu_idx)
+{
+ return (env->tlb_mask[mmu_idx] >> CPU_TLB_ENTRY_BITS) + 1;
}
/* Find the TLB entry corresponding to the mmu_idx + address pair. */
#define CF_USE_ICOUNT 0x00020000
#define CF_INVALID 0x00040000 /* TB is stale. Set with @jmp_lock held */
#define CF_PARALLEL 0x00080000 /* Generate code for a parallel context */
+#define CF_CLUSTER_MASK 0xff000000 /* Top 8 bits are cluster ID */
+#define CF_CLUSTER_SHIFT 24
/* cflags' mask for hashing/comparison */
#define CF_HASH_MASK \
- (CF_COUNT_MASK | CF_LAST_IO | CF_USE_ICOUNT | CF_PARALLEL)
+ (CF_COUNT_MASK | CF_LAST_IO | CF_USE_ICOUNT | CF_PARALLEL | CF_CLUSTER_MASK)
/* Per-vCPU dynamic tracing state used to generate this TB */
uint32_t trace_vcpu_dstate;
void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
hwaddr size, unsigned client);
+/**
+ * memory_region_flush_rom_device: Mark a range of pages dirty and invalidate
+ * TBs (for self-modifying code).
+ *
+ * The MemoryRegionOps->write() callback of a ROM device must use this function
+ * to mark byte ranges that have been modified internally, such as by directly
+ * accessing the memory returned by memory_region_get_ram_ptr().
+ *
+ * This function marks the range dirty and invalidates TBs so that TCG can
+ * detect self-modifying code.
+ *
+ * @mr: the region being flushed.
+ * @addr: the start, relative to the start of the region, of the range being
+ * flushed.
+ * @size: the size, in bytes, of the range being flushed.
+ */
+void memory_region_flush_rom_device(MemoryRegion *mr, hwaddr addr, hwaddr size);
+
/**
* memory_region_set_readonly: Turn a memory region read-only (or read-write)
*
uint64_t q;
asm("divq %4" : "=a"(q), "=d"(*r) : "0"(n0), "1"(n1), "rm"(d));
return q;
-#elif defined(__s390x__)
+#elif defined(__s390x__) && !defined(__clang__)
/* Need to use a TImode type to get an even register pair for DLGR. */
unsigned __int128 n = (unsigned __int128)n1 << 64 | n0;
asm("dlgr %0, %1" : "+r"(n) : "r"(d));
#define NRF51_IOMEM_SIZE 0x20000000
#define NRF51_UART_BASE 0x40002000
+#define NRF51_TWI_BASE 0x40003000
+#define NRF51_TWI_SIZE 0x00001000
#define NRF51_TIMER_BASE 0x40008000
#define NRF51_TIMER_SIZE 0x00001000
#define NRF51_RNG_BASE 0x4000D000
MemoryRegion sram;
MemoryRegion flash;
MemoryRegion clock;
+ MemoryRegion twi;
uint32_t sram_size;
uint32_t flash_size;
* Arm big.LITTLE system) they should be in different clusters. If the CPUs do
* not have the same view of memory (for example the main CPU and a management
* controller processor) they should be in different clusters.
+ *
+ * A cluster is created by creating an object of TYPE_CPU_CLUSTER, and then
+ * adding the CPUs to it as QOM child objects (e.g. using the
+ * object_initialize_child() or object_property_add_child() functions).
+ * The CPUs may be either direct children of the cluster object, or indirect
+ * children (e.g. children of children of the cluster object).
+ *
+ * All CPUs must be added as children before the cluster is realized.
+ * (Regrettably QOM provides no way to prevent adding children to a realized
+ * object and no way for the parent to be notified when a new child is added
+ * to it, so this restriction is not checked for, but the system will not
+ * behave correctly if it is not adhered to. The cluster will assert that
+ * it contains at least one CPU, which should catch most inadvertent
+ * violations of this constraint.)
+ *
+ * A CPU which is not put into any cluster will be considered implicitly
+ * to be in a cluster with all the other "loose" CPUs, so all CPUs that are
+ * not assigned to clusters must be identical.
*/
#define TYPE_CPU_CLUSTER "cpu-cluster"
#define CPU_CLUSTER(obj) \
OBJECT_CHECK(CPUClusterState, (obj), TYPE_CPU_CLUSTER)
+/*
+ * This limit is imposed by TCG, which puts the cluster ID into an
+ * 8 bit field (and uses all-1s for the default "not in any cluster").
+ */
+#define MAX_CLUSTERS 255
+
/**
* CPUClusterState:
* @cluster_id: The cluster ID. This value is for internal use only and should
--- /dev/null
+/*
+ * Microbit stub for Nordic Semiconductor nRF51 SoC Two-Wire Interface
+ * http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.1.pdf
+ *
+ * Copyright 2019 Red Hat, Inc.
+ *
+ * This code is licensed under the GPL version 2 or later. See
+ * the COPYING file in the top-level directory.
+ */
+
+#ifndef MICROBIT_I2C_H
+#define MICROBIT_I2C_H
+
+#include "hw/sysbus.h"
+#include "hw/arm/nrf51.h"
+
+#define NRF51_TWI_TASK_STARTRX 0x000
+#define NRF51_TWI_TASK_STARTTX 0x008
+#define NRF51_TWI_TASK_STOP 0x014
+#define NRF51_TWI_EVENT_STOPPED 0x104
+#define NRF51_TWI_EVENT_RXDREADY 0x108
+#define NRF51_TWI_EVENT_TXDSENT 0x11c
+#define NRF51_TWI_REG_ENABLE 0x500
+#define NRF51_TWI_REG_RXD 0x518
+#define NRF51_TWI_REG_TXD 0x51c
+#define NRF51_TWI_REG_ADDRESS 0x588
+
+#define TYPE_MICROBIT_I2C "microbit.i2c"
+#define MICROBIT_I2C(obj) \
+ OBJECT_CHECK(MicrobitI2CState, (obj), TYPE_MICROBIT_I2C)
+
+#define MICROBIT_I2C_NREGS (NRF51_TWI_SIZE / sizeof(uint32_t))
+
+typedef struct {
+ SysBusDevice parent_obj;
+
+ MemoryRegion iomem;
+ uint32_t regs[MICROBIT_I2C_NREGS];
+ uint32_t read_idx;
+} MicrobitI2CState;
+
+#endif /* MICROBIT_I2C_H */
PCIDevice *pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
PCIDevice *pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
int pci_piix3_xen_ide_unplug(DeviceState *dev, bool aux);
-void vt82c686b_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
+void via_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
/* ide-mmio.c */
void mmio_ide_init_drives(DeviceState *dev, DriveInfo *hd0, DriveInfo *hd1);
struct PCIIDEState *pci_dev;
} BMDMAState;
-typedef struct CMD646BAR {
- MemoryRegion cmd;
- MemoryRegion data;
- IDEBus *bus;
- struct PCIIDEState *pci_dev;
-} CMD646BAR;
-
#define TYPE_PCI_IDE "pci-ide"
#define PCI_IDE(obj) OBJECT_CHECK(PCIIDEState, (obj), TYPE_PCI_IDE)
BMDMAState bmdma[2];
uint32_t secondary; /* used only for cmd646 */
MemoryRegion bmdma_bar;
- CMD646BAR cmd646_bar[2]; /* used only for cmd646 */
+ MemoryRegion cmd_bar[2];
+ MemoryRegion data_bar[2];
} PCIIDEState;
-
static inline IDEState *bmdma_active_if(BMDMAState *bmdma)
{
assert(bmdma->bus->retry_unit != (uint8_t)-1);
return bmdma->bus->ifs + bmdma->bus->retry_unit;
}
-
void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d);
void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val);
extern MemoryRegionOps bmdma_addr_ioport_ops;
void pci_ide_create_devs(PCIDevice *dev, DriveInfo **hd_table);
extern const VMStateDescription vmstate_ide_pci;
+extern const MemoryRegionOps pci_ide_cmd_le_ops;
+extern const MemoryRegionOps pci_ide_data_le_ops;
#endif
uint8_t conf_enable_w0;
AspeedSMCFlash *flashes;
+
+ uint8_t snoop_index;
+ uint8_t snoop_dummies;
} AspeedSMCState;
#endif /* ASPEED_SMC_H */
uint16_t payload; /* pure payload without virtio/eth/ip/tcp */
} VirtioNetRscUnit;
-/* Coalesced segmant */
+/* Coalesced segment */
typedef struct VirtioNetRscSeg {
QTAILQ_ENTRY(VirtioNetRscSeg) next;
void *buf;
const char *idstr,
int instance_id,
int version_id,
- SaveVMHandlers *ops,
+ const SaveVMHandlers *ops,
void *opaque);
void unregister_savevm(DeviceState *dev, const char *idstr, void *opaque);
#ifndef QMP_EVENT_H
#define QMP_EVENT_H
-typedef void (*QMPEventFuncEmit)(unsigned event, QDict *dict);
-
-void qmp_event_set_func_emit(QMPEventFuncEmit emit);
-
-QMPEventFuncEmit qmp_event_get_func_emit(void);
-
QDict *qmp_event_build_dict(const char *event_name);
#endif
/**
* CPUState:
* @cpu_index: CPU index (informative).
+ * @cluster_index: Identifies which cluster this CPU is in.
+ * For boards which don't define clusters or for "loose" CPUs not assigned
+ * to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
+ * be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
+ * QOM parent.
* @nr_cores: Number of cores within this CPU package.
* @nr_threads: Number of threads within this CPU.
* @running: #true if CPU is currently running (lockless).
/* TODO Move common fields from CPUArchState here. */
int cpu_index;
+ int cluster_index;
uint32_t halted;
uint32_t can_do_io;
int32_t exception_index;
#endif /* NEED_CPU_H */
#define UNASSIGNED_CPU_INDEX -1
+#define UNASSIGNED_CLUSTER_INDEX -1
#endif
int rc = 0;
if (sioc->fd != -1) {
- SocketAddress *addr = socket_local_address(sioc->fd, errp);
#ifdef WIN32
WSAEventSelect(sioc->fd, NULL, 0);
#endif
+ if (qio_channel_has_feature(ioc, QIO_CHANNEL_FEATURE_LISTEN)) {
+ socket_listen_cleanup(sioc->fd, errp);
+ }
+
if (closesocket(sioc->fd) < 0) {
sioc->fd = -1;
error_setg_errno(errp, errno,
return -1;
}
sioc->fd = -1;
-
- if (addr && addr->type == SOCKET_ADDRESS_TYPE_UNIX
- && addr->u.q_unix.path) {
- if (unlink(addr->u.q_unix.path) < 0 && errno != ENOENT) {
- error_setg_errno(errp, errno,
- "Failed to unlink socket %s",
- addr->u.q_unix.path);
- rc = -1;
- }
- }
-
- if (addr) {
- qapi_free_SocketAddress(addr);
- }
}
return rc;
}
void migration_channel_process_incoming(QIOChannel *ioc)
{
MigrationState *s = migrate_get_current();
+ Error *local_err = NULL;
trace_migration_set_incoming_channel(
ioc, object_get_typename(OBJECT(ioc)));
*s->parameters.tls_creds &&
!object_dynamic_cast(OBJECT(ioc),
TYPE_QIO_CHANNEL_TLS)) {
- Error *local_err = NULL;
migration_tls_channel_process_incoming(s, ioc, &local_err);
- if (local_err) {
- error_report_err(local_err);
- }
} else {
- migration_ioc_process_incoming(ioc);
+ migration_ioc_process_incoming(ioc, &local_err);
+ }
+
+ if (local_err) {
+ error_report_err(local_err);
}
}
/* Make sure all file formats flush their mutable metadata */
bdrv_invalidate_cache_all(&local_err);
if (local_err) {
- migrate_set_state(&mis->state, MIGRATION_STATUS_ACTIVE,
- MIGRATION_STATUS_FAILED);
error_report_err(local_err);
- exit(EXIT_FAILURE);
+ goto fail;
}
if (colo_init_ram_cache() < 0) {
error_report("Init ram cache failed");
- exit(EXIT_FAILURE);
+ goto fail;
}
qemu_thread_create(&mis->colo_incoming_thread, "COLO incoming",
}
if (ret < 0) {
- Error *local_err = NULL;
-
- migrate_set_state(&mis->state, MIGRATION_STATUS_ACTIVE,
- MIGRATION_STATUS_FAILED);
error_report("load of migration failed: %s", strerror(-ret));
- qemu_fclose(mis->from_src_file);
- if (multifd_load_cleanup(&local_err) != 0) {
- error_report_err(local_err);
- }
- exit(EXIT_FAILURE);
+ goto fail;
}
mis->bh = qemu_bh_new(process_incoming_migration_bh, mis);
qemu_bh_schedule(mis->bh);
mis->migration_incoming_co = NULL;
+ return;
+fail:
+ local_err = NULL;
+ migrate_set_state(&mis->state, MIGRATION_STATUS_ACTIVE,
+ MIGRATION_STATUS_FAILED);
+ qemu_fclose(mis->from_src_file);
+ if (multifd_load_cleanup(&local_err) != 0) {
+ error_report_err(local_err);
+ }
+ exit(EXIT_FAILURE);
}
static void migration_incoming_setup(QEMUFile *f)
migration_incoming_process();
}
-void migration_ioc_process_incoming(QIOChannel *ioc)
+void migration_ioc_process_incoming(QIOChannel *ioc, Error **errp)
{
MigrationIncomingState *mis = migration_incoming_get_current();
bool start_migration;
*/
start_migration = !migrate_use_multifd();
} else {
+ Error *local_err = NULL;
/* Multiple connections */
assert(migrate_use_multifd());
- start_migration = multifd_recv_new_channel(ioc);
+ start_migration = multifd_recv_new_channel(ioc, &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
+ return;
+ }
}
if (start_migration) {
info->ram->postcopy_requests = ram_counters.postcopy_requests;
info->ram->page_size = qemu_target_page_size();
info->ram->multifd_bytes = ram_counters.multifd_bytes;
+ info->ram->pages_per_second = s->pages_per_second;
if (migrate_use_xbzrle()) {
info->has_xbzrle_cache = true;
qemu_savevm_state_cleanup();
if (s->to_dst_file) {
- Error *local_err = NULL;
QEMUFile *tmp;
trace_migrate_fd_cleanup();
}
qemu_mutex_lock_iothread();
- if (multifd_save_cleanup(&local_err) != 0) {
- error_report_err(local_err);
- }
+ multifd_save_cleanup();
qemu_mutex_lock(&s->qemu_file_lock);
tmp = s->to_dst_file;
s->to_dst_file = NULL;
s->rp_state.from_dst_file = NULL;
s->rp_state.error = false;
s->mbps = 0.0;
+ s->pages_per_second = 0.0;
s->downtime = 0;
s->expected_downtime = 0;
s->setup_time = 0;
static void migration_update_counters(MigrationState *s,
int64_t current_time)
{
- uint64_t transferred, time_spent;
+ uint64_t transferred, transferred_pages, time_spent;
uint64_t current_bytes; /* bytes transferred since the beginning */
double bandwidth;
s->mbps = (((double) transferred * 8.0) /
((double) time_spent / 1000.0)) / 1000.0 / 1000.0;
+ transferred_pages = ram_get_total_transferred_pages() -
+ s->iteration_initial_pages;
+ s->pages_per_second = (double) transferred_pages /
+ (((double) time_spent / 1000.0));
+
/*
* if we haven't sent anything, we don't want to
* recalculate. 10000 is a small enough number for our purposes
s->iteration_start_time = current_time;
s->iteration_initial_bytes = current_bytes;
+ s->iteration_initial_pages = ram_get_total_transferred_pages();
trace_migrate_transferred(transferred, time_spent,
bandwidth, s->threshold_size);
ms->state = MIGRATION_STATUS_NONE;
ms->mbps = -1;
+ ms->pages_per_second = -1;
qemu_sem_init(&ms->pause_sem, 0);
qemu_mutex_init(&ms->error_mutex);
*/
QemuSemaphore rate_limit_sem;
- /* bytes already send at the beggining of current interation */
+ /* pages already send at the beginning of current iteration */
+ uint64_t iteration_initial_pages;
+
+ /* pages transferred per second */
+ double pages_per_second;
+
+ /* bytes already send at the beginning of current iteration */
uint64_t iteration_initial_bytes;
/* time at the start of current iteration */
int64_t iteration_start_time;
void migrate_set_state(int *state, int old_state, int new_state);
void migration_fd_process_incoming(QEMUFile *f);
-void migration_ioc_process_incoming(QIOChannel *ioc);
+void migration_ioc_process_incoming(QIOChannel *ioc, Error **errp);
void migration_incoming_process(void);
bool migration_has_all_channels(void);
int migrate_max_cpu_throttle(void);
bool migrate_use_return_path(void);
+uint64_t ram_get_total_transferred_pages(void);
+
bool migrate_use_compression(void);
int migrate_compress_level(void);
int migrate_compress_threads(void);
/* Mark so that we get notified of accesses to unwritten areas */
if (qemu_ram_foreach_migratable_block(ram_block_enable_notify, mis)) {
+ error_report("ram_block_enable_notify failed");
return -1;
}
}
}
-int multifd_save_cleanup(Error **errp)
+void multifd_save_cleanup(void)
{
int i;
- int ret = 0;
if (!migrate_use_multifd()) {
- return 0;
+ return;
}
multifd_send_terminate_threads(NULL);
for (i = 0; i < migrate_multifd_channels(); i++) {
multifd_send_state->pages = NULL;
g_free(multifd_send_state);
multifd_send_state = NULL;
- return ret;
}
static void multifd_send_sync_main(void)
Error *local_err = NULL;
if (qio_task_propagate_error(task, &local_err)) {
- if (multifd_save_cleanup(&local_err) != 0) {
- migrate_set_error(migrate_get_current(), local_err);
- }
+ migrate_set_error(migrate_get_current(), local_err);
+ multifd_save_cleanup();
} else {
p->c = QIO_CHANNEL(sioc);
qio_channel_set_delay(p->c, false);
return thread_count == atomic_read(&multifd_recv_state->count);
}
-/* Return true if multifd is ready for the migration, otherwise false */
-bool multifd_recv_new_channel(QIOChannel *ioc)
+/*
+ * Try to receive all multifd channels to get ready for the migration.
+ * - Return true and do not set @errp when correctly receving all channels;
+ * - Return false and do not set @errp when correctly receiving the current one;
+ * - Return false and set @errp when failing to receive the current channel.
+ */
+bool multifd_recv_new_channel(QIOChannel *ioc, Error **errp)
{
MultiFDRecvParams *p;
Error *local_err = NULL;
id = multifd_recv_initial_packet(ioc, &local_err);
if (id < 0) {
multifd_recv_terminate_threads(local_err);
+ error_propagate_prepend(errp, local_err,
+ "failed to receive packet"
+ " via multifd channel %d: ",
+ atomic_read(&multifd_recv_state->count));
return false;
}
error_setg(&local_err, "multifd: received id '%d' already setup'",
id);
multifd_recv_terminate_threads(local_err);
+ error_propagate(errp, local_err);
return false;
}
p->c = ioc;
qemu_thread_create(&p->thread, p->name, multifd_recv_thread, p,
QEMU_THREAD_JOINABLE);
atomic_inc(&multifd_recv_state->count);
- return multifd_recv_state->count == migrate_multifd_channels();
+ return atomic_read(&multifd_recv_state->count) ==
+ migrate_multifd_channels();
}
/**
return summary;
}
+uint64_t ram_get_total_transferred_pages(void)
+{
+ return ram_counters.normal + ram_counters.duplicate +
+ compression_counters.pages + xbzrle_counters.pages;
+}
+
static void migration_update_rates(RAMState *rs, int64_t end_time)
{
uint64_t page_count = rs->target_page_count - rs->target_page_count_prev;
uint64_t ram_bytes_total(void);
int multifd_save_setup(void);
-int multifd_save_cleanup(Error **errp);
+void multifd_save_cleanup(void);
int multifd_load_setup(void);
int multifd_load_cleanup(Error **errp);
bool multifd_recv_all_channels_created(void);
-bool multifd_recv_new_channel(QIOChannel *ioc);
+bool multifd_recv_new_channel(QIOChannel *ioc, Error **errp);
uint64_t ram_pagesize_summary(void);
int ram_save_queue_pages(const char *rbname, ram_addr_t start, ram_addr_t len);
rdma->connected = false;
}
+ qemu_set_fd_handler(rdma->channel->fd, NULL, NULL, NULL);
g_free(rdma->dest_blocks);
rdma->dest_blocks = NULL;
int section_id;
/* section id read from the stream */
int load_section_id;
- SaveVMHandlers *ops;
+ const SaveVMHandlers *ops;
const VMStateDescription *vmsd;
void *opaque;
CompatEntry *compat;
const char *idstr,
int instance_id,
int version_id,
- SaveVMHandlers *ops,
+ const SaveVMHandlers *ops,
void *opaque)
{
SaveStateEntry *se;
*/
if (migrate_postcopy_ram()) {
if (postcopy_ram_enable_notify(mis)) {
+ postcopy_ram_incoming_cleanup(mis);
return -1;
}
}
qemu_mutex_unlock(&monitor_lock);
}
-static void
-monitor_qapi_event_queue(QAPIEvent event, QDict *qdict)
+void qapi_event_emit(QAPIEvent event, QDict *qdict)
{
/*
* monitor_qapi_event_queue_no_reenter() is not reentrant: it
{
monitor_qapi_event_state = g_hash_table_new(qapi_event_throttle_hash,
qapi_event_throttle_equal);
- qmp_event_set_func_emit(monitor_qapi_event_queue);
}
static void handle_hmp_command(Monitor *mon, const char *cmdline);
error_report("memory backend %s is used multiple times. Each "
"-numa option must use a different memdev value.",
path);
+ g_free(path);
exit(1);
}
#
# @multifd-bytes: The number of bytes sent through multifd (since 3.0)
#
+# @pages-per-second: the number of memory pages transferred per second
+# (Since 4.0)
+#
# Since: 0.14.0
##
{ 'struct': 'MigrationStats',
'normal-bytes': 'int', 'dirty-pages-rate' : 'int',
'mbps' : 'number', 'dirty-sync-count' : 'int',
'postcopy-requests' : 'int', 'page-size' : 'int',
- 'multifd-bytes' : 'uint64' } }
+ 'multifd-bytes' : 'uint64', 'pages-per-second' : 'uint64' } }
##
# @XBZRLECacheStats:
# object.
#
# Since: 1.2
+#
+# Example:
+#
+# -> { "execute": "qom-list",
+# "arguments": { "path": "/chardevs" } }
+# <- { "return": [ { "name": "type", "type": "string" },
+# { "name": "parallel0", "type": "child<chardev-vc>" },
+# { "name": "serial0", "type": "child<chardev-vc>" },
+# { "name": "mon0", "type": "child<chardev-stdio>" } ] }
+#
##
{ 'command': 'qom-list',
'data': { 'path': 'str' },
# returned as #int.
#
# Since: 1.2
+#
+# Example:
+#
+# 1. Use absolute path
+#
+# -> { "execute": "qom-get",
+# "arguments": { "path": "/machine/unattached/device[0]",
+# "property": "hotplugged" } }
+# <- { "return": false }
+#
+# 2. Use partial path
+#
+# -> { "execute": "qom-get",
+# "arguments": { "path": "unattached/sysbus",
+# "property": "type" } }
+# <- { "return": "System" }
+#
##
{ 'command': 'qom-get',
'data': { 'path': 'str', 'property': 'str' },
# for a description of type mapping.
#
# Since: 1.2
+#
+# Example:
+#
+# -> { "execute": "qom-set",
+# "arguments": { "path": "/machine",
+# "property": "graphics",
+# "value": false } }
+# <- { "return": {} }
+#
##
{ 'command': 'qom-set',
'data': { 'path': 'str', 'property': 'str', 'value': 'any' },
#include "qapi/qmp/qdict.h"
#include "qapi/qmp/qjson.h"
-static QMPEventFuncEmit qmp_emit;
-
-void qmp_event_set_func_emit(QMPEventFuncEmit emit)
-{
- qmp_emit = emit;
-}
-
-QMPEventFuncEmit qmp_event_get_func_emit(void)
-{
- return qmp_emit;
-}
-
static void timestamp_put(QDict *qdict)
{
int err;
'*head' : 'int',
'events' : [ 'InputEvent' ] } }
+##
+# @GrabToggleKeys:
+#
+# Keys to toggle input-linux between host and guest.
+#
+# Since: 4.0
+#
+##
+{ 'enum': 'GrabToggleKeys',
+ 'data': [ 'ctrl-ctrl', 'alt-alt', 'meta-meta', 'scrolllock', 'ctrl-scrolllock' ] }
##
# @DisplayGTK:
@section MIPS System emulator
@cindex system emulation (MIPS)
+@menu
+* nanoMIPS System emulator ::
+@end menu
+
Four executables cover simulation of 32 and 64-bit MIPS systems in
both endian options, @file{qemu-system-mips}, @file{qemu-system-mipsel}
@file{qemu-system-mips64} and @file{qemu-system-mips64el}.
G364 framebuffer
@end itemize
+@node nanoMIPS System emulator
+@subsection nanoMIPS System emulator
+@cindex system emulation (nanoMIPS)
+
+Executable @file{qemu-system-mipsel} also covers simulation of
+32-bit nanoMIPS system in little endian mode:
+
+@itemize @minus
+@item
+nanoMIPS I7200 CPU
+@end itemize
+
+Example of @file{qemu-system-mipsel} usage for nanoMIPS is shown below:
+
+Download @code{<disk_image_file>} from @url{https://mipsdistros.mips.com/LinuxDistro/nanomips/buildroot/index.html}.
+
+Download @code{<kernel_image_file>} from @url{https://mipsdistros.mips.com/LinuxDistro/nanomips/kernels/v4.15.18-432-gb2eb9a8b07a1-20180627102142/index.html}.
+
+Start system emulation of Malta board with nanoMIPS I7200 CPU:
+@example
+qemu-system-mipsel -cpu I7200 -kernel @code{<kernel_image_file>} \
+ -M malta -serial stdio -m @code{<memory_size>} -hda @code{<disk_image_file>} \
+ -append "mem=256m@@0x0 rw console=ttyS0 vga=cirrus vesa=0x111 root=/dev/sda"
+@end example
+
@node ARM System emulator
@section ARM System emulator
}
break;
case '%':
- if (ctxt->ap && ptr[1] != '%') {
- parse_error(ctxt, token, "can't interpolate into string");
- goto out;
+ if (ctxt->ap) {
+ if (ptr[1] != '%') {
+ parse_error(ctxt, token, "can't interpolate into string");
+ goto out;
+ }
+ ptr++;
}
- ptr++;
/* fall through */
default:
cp = mod_utf8_codepoint(ptr, 6, &end);
CPUClass *cc = CPU_GET_CLASS(obj);
cpu->cpu_index = UNASSIGNED_CPU_INDEX;
+ cpu->cluster_index = UNASSIGNED_CLUSTER_INDEX;
cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
/* *-user doesn't have configurable SMP topology */
/* the default value is changed by qemu_init_vcpu() for softmmu */
# independent of what the developer currently has initialized
# in their checkout, because the build environment is completely
# different to the host OS.
-submodules="dtc ui/keycodemapdb"
+submodules="dtc ui/keycodemapdb tests/fp/berkeley-softfloat-3 tests/fp/berkeley-testfloat-3"
trap "status=$?; rm -rf \"$list_file\" \"$vroot_dir\"; exit \$status" 0 1 2 3 15
# Block comments use /* on a line of its own
if ($rawline !~ m@^\+.*/\*.*\*/[ \t]*$@ && #inline /*...*/
- $rawline =~ m@^\+.*/\*\*?[ \t]*.+[ \t]*$@) { # /* or /** non-blank
+ $rawline =~ m@^\+.*/\*\*?+[ \t]*[^ \t]@) { # /* or /** non-blank
WARN("Block comments use a leading /* on a separate line\n" . $herecurr);
}
output_fd.write(a)
-if sys.version_info >= (3, 0):
+if sys.version_info >= (3, 4):
re_fullmatch = re.fullmatch
else:
def re_fullmatch(pat, str):
logger.info("Skipped %d test cases", skipped)
if args.debug:
- stats = sorted([(len(wl_stats.get(i, [])), wl) for i, wl in enumerate(ERROR_WHITELIST)])
+ stats = sorted([(len(wl_stats.get(i, [])), wl) for i, wl in
+ enumerate(ERROR_WHITELIST)], key=lambda x: x[0])
for count, wl in stats:
dbg("whitelist entry stats: %d: %r", count, wl)
return ret
-def gen_event_send(name, arg_type, boxed, event_enum_name):
+def gen_event_send(name, arg_type, boxed, event_enum_name, event_emit):
# FIXME: Our declaration of local variables (and of 'errp' in the
# parameter list) can collide with exploded members of the event's
# data type passed in as parameters. If this collision ever hits in
%(proto)s
{
QDict *qmp;
- QMPEventFuncEmit emit;
''',
proto=build_event_send_proto(name, arg_type, boxed))
ret += mcgen('''
- emit = qmp_event_get_func_emit();
- if (!emit) {
- return;
- }
-
qmp = qmp_event_build_dict("%(name)s");
''',
''')
ret += mcgen('''
- emit(%(c_enum)s, qmp);
+ %(event_emit)s(%(c_enum)s, qmp);
''',
+ event_emit=event_emit,
c_enum=c_enum_const(event_enum_name, name))
if arg_type and not arg_type.is_empty():
' * Schema-defined QAPI/QMP events', __doc__)
self._event_enum_name = c_name(prefix + 'QAPIEvent', protect=False)
self._event_enum_members = []
+ self._event_emit_name = c_name(prefix + 'qapi_event_emit')
def _begin_module(self, name):
types = self._module_basename('qapi-types', name)
def visit_end(self):
(genc, genh) = self._module[self._main_module]
- genh.add(gen_enum(self._event_enum_name, self._event_enum_members))
+ genh.add(gen_enum(self._event_enum_name,
+ self._event_enum_members))
genc.add(gen_enum_lookup(self._event_enum_name,
self._event_enum_members))
+ genh.add(mcgen('''
+
+void %(event_emit)s(%(event_enum)s event, QDict *qdict);
+''',
+ event_emit=self._event_emit_name,
+ event_enum=self._event_enum_name))
def visit_event(self, name, info, ifcond, arg_type, boxed):
with ifcontext(ifcond, self._genh, self._genc):
self._genh.add(gen_event_send_decl(name, arg_type, boxed))
self._genc.add(gen_event_send(name, arg_type, boxed,
- self._event_enum_name))
+ self._event_enum_name,
+ self._event_emit_name))
self._event_enum_members.append(QAPISchemaMember(name, ifcond))
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qapi/qapi-events.h"
#include "qemu-common.h"
#include "monitor/monitor.h"
void monitor_init(Chardev *chr, int flags)
{
}
+
+void qapi_event_emit(QAPIEvent event, QDict *qdict)
+{
+}
unset_feature(env, ARM_FEATURE_PMU);
}
if (arm_feature(env, ARM_FEATURE_PMU)) {
- cpu->pmceid0 = get_pmceid(&cpu->env, 0);
- cpu->pmceid1 = get_pmceid(&cpu->env, 1);
+ pmu_init(cpu);
if (!kvm_enabled()) {
arm_register_pre_el_change_hook(cpu, &pmu_pre_el_change, 0);
void pmu_post_el_change(ARMCPU *cpu, void *ignored);
/*
- * get_pmceid
- * @env: CPUARMState
- * @which: which PMCEID register to return (0 or 1)
+ * pmu_init
+ * @cpu: ARMCPU
*
- * Return the PMCEID[01]_EL0 register values corresponding to the counters
- * which are supported given the current configuration
+ * Initialize the CPU's PMCEID[01]_EL0 registers and associated internal state
+ * for the current configuration
*/
-uint64_t get_pmceid(CPUARMState *env, unsigned which);
+void pmu_init(ARMCPU *cpu);
/* SCTLR bit meanings. Several bits have been reused in newer
* versions of the architecture; in that case we define constants
static uint16_t supported_event_map[MAX_EVENT_ID + 1];
/*
- * Called upon initialization to build PMCEID0_EL0 or PMCEID1_EL0 (indicated by
- * 'which'). We also use it to build a map of ARM event numbers to indices in
- * our pm_events array.
+ * Called upon CPU initialization to initialize PMCEID[01]_EL0 and build a map
+ * of ARM event numbers to indices in our pm_events array.
*
* Note: Events in the 0x40XX range are not currently supported.
*/
-uint64_t get_pmceid(CPUARMState *env, unsigned which)
+void pmu_init(ARMCPU *cpu)
{
- uint64_t pmceid = 0;
unsigned int i;
- assert(which <= 1);
-
+ /*
+ * Empty supported_event_map and cpu->pmceid[01] before adding supported
+ * events to them
+ */
for (i = 0; i < ARRAY_SIZE(supported_event_map); i++) {
supported_event_map[i] = UNSUPPORTED_EVENT;
}
+ cpu->pmceid0 = 0;
+ cpu->pmceid1 = 0;
for (i = 0; i < ARRAY_SIZE(pm_events); i++) {
const pm_event *cnt = &pm_events[i];
/* We do not currently support events in the 0x40xx range */
assert(cnt->number <= 0x3f);
- if ((cnt->number & 0x20) == (which << 6) &&
- cnt->supported(env)) {
- pmceid |= (1 << (cnt->number & 0x1f));
+ if (cnt->supported(&cpu->env)) {
supported_event_map[cnt->number] = i;
+ uint64_t event_mask = 1 << (cnt->number & 0x1f);
+ if (cnt->number & 0x20) {
+ cpu->pmceid1 |= event_mask;
+ } else {
+ cpu->pmceid0 |= event_mask;
+ }
}
}
- return pmceid;
}
/*
uint64_t ttbr;
hwaddr descaddr, indexmask, indexmask_grainsize;
uint32_t tableattrs;
- target_ulong page_size, top_bits;
+ target_ulong page_size;
uint32_t attrs;
int32_t stride;
int addrsize, inputsize;
* We determined the region when collecting the parameters, but we
* have not yet validated that the address is valid for the region.
* Extract the top bits and verify that they all match select.
- */
- top_bits = sextract64(address, inputsize, addrsize - inputsize);
- if (-top_bits != param.select || (param.select && !ttbr1_valid)) {
- /* In the gap between the two regions, this is a Translation fault */
- fault_type = ARMFault_Translation;
- goto do_fault;
+ *
+ * For aa32, if inputsize == addrsize, then we have selected the
+ * region by exclusion in aa32_va_parameters and there is no more
+ * validation to do here.
+ */
+ if (inputsize < addrsize) {
+ target_ulong top_bits = sextract64(address, inputsize,
+ addrsize - inputsize);
+ if (-top_bits != param.select || (param.select && !ttbr1_valid)) {
+ /* The gap between the two regions is a Translation fault */
+ fault_type = ARMFault_Translation;
+ goto do_fault;
+ }
}
if (param.using64k) {
}
}
}
+ break;
+ }
- /* The IDAU will override the SAU lookup results if it specifies
- * higher security than the SAU does.
- */
- if (!idau_ns) {
- if (sattrs->ns || (!idau_nsc && sattrs->nsc)) {
- sattrs->ns = false;
- sattrs->nsc = idau_nsc;
- }
+ /*
+ * The IDAU will override the SAU lookup results if it specifies
+ * higher security than the SAU does.
+ */
+ if (!idau_ns) {
+ if (sattrs->ns || (!idau_nsc && sattrs->nsc)) {
+ sattrs->ns = false;
+ sattrs->nsc = idau_nsc;
}
- break;
}
}
.vendor = CPUID_VENDOR_INTEL,
.family = 6,
.model = 85,
- .stepping = 5,
+ .stepping = 6,
.features[FEAT_1_EDX] =
CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_MISALIGNSSE |
CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | CPUID_EXT3_SVM |
CPUID_EXT3_LAHF_LM,
+ .features[FEAT_SVM] =
+ CPUID_SVM_NPT | CPUID_SVM_NRIPSAVE,
/* no xsaveopt! */
.xlevel = 0x8000001A,
.model_id = "AMD Opteron 62xx class CPU",
CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_MISALIGNSSE |
CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | CPUID_EXT3_SVM |
CPUID_EXT3_LAHF_LM,
+ .features[FEAT_SVM] =
+ CPUID_SVM_NPT | CPUID_SVM_NRIPSAVE,
/* no xsaveopt! */
.xlevel = 0x8000001A,
.model_id = "AMD Opteron 63xx class CPU",
CPUID_XSAVE_XGETBV1,
.features[FEAT_6_EAX] =
CPUID_6_EAX_ARAT,
+ .features[FEAT_SVM] =
+ CPUID_SVM_NPT | CPUID_SVM_NRIPSAVE,
.xlevel = 0x8000001E,
.model_id = "AMD EPYC Processor",
.cache_info = &epyc_cache_info,
CPUID_XSAVE_XGETBV1,
.features[FEAT_6_EAX] =
CPUID_6_EAX_ARAT,
+ .features[FEAT_SVM] =
+ CPUID_SVM_NPT | CPUID_SVM_NRIPSAVE,
.xlevel = 0x8000001E,
.model_id = "AMD EPYC Processor (with IBPB)",
.cache_info = &epyc_cache_info,
#define CPU_RESOLVING_TYPE TYPE_MIPS_CPU
bool cpu_supports_cps_smp(const char *cpu_type);
-bool cpu_supports_isa(const char *cpu_type, unsigned int isa);
+bool cpu_supports_isa(const char *cpu_type, uint64_t isa);
void cpu_set_exception_base(int vp_index, target_ulong address);
/* mips_int.c */
}
static void gen_scwp(DisasContext *ctx, uint32_t base, int16_t offset,
- uint32_t reg1, uint32_t reg2)
+ uint32_t reg1, uint32_t reg2, bool eva)
{
TCGv taddr = tcg_temp_local_new();
TCGv lladdr = tcg_temp_local_new();
tcg_gen_ld_i64(llval, cpu_env, offsetof(CPUMIPSState, llval_wp));
tcg_gen_atomic_cmpxchg_i64(val, taddr, llval, tval,
- ctx->mem_idx, MO_64);
+ eva ? MIPS_HFLAG_UM : ctx->mem_idx, MO_64);
if (reg1 != 0) {
tcg_gen_movi_tl(cpu_gpr[reg1], 1);
}
/* extraction utilities */
-#define NANOMIPS_EXTRACT_RD(op) ((op >> 7) & 0x7)
-#define NANOMIPS_EXTRACT_RS(op) ((op >> 4) & 0x7)
-#define NANOMIPS_EXTRACT_RS2(op) uMIPS_RS(op)
-#define NANOMIPS_EXTRACT_RS1(op) ((op >> 1) & 0x7)
+#define NANOMIPS_EXTRACT_RT3(op) ((op >> 7) & 0x7)
+#define NANOMIPS_EXTRACT_RS3(op) ((op >> 4) & 0x7)
+#define NANOMIPS_EXTRACT_RD3(op) ((op >> 1) & 0x7)
#define NANOMIPS_EXTRACT_RD5(op) ((op >> 5) & 0x1f)
#define NANOMIPS_EXTRACT_RS5(op) (op & 0x1f)
}
-/* extraction utilities */
-
-#define NANOMIPS_EXTRACT_RD(op) ((op >> 7) & 0x7)
-#define NANOMIPS_EXTRACT_RS(op) ((op >> 4) & 0x7)
-#define NANOMIPS_EXTRACT_RS2(op) uMIPS_RS(op)
-#define NANOMIPS_EXTRACT_RS1(op) ((op >> 1) & 0x7)
-#define NANOMIPS_EXTRACT_RD5(op) ((op >> 5) & 0x1f)
-#define NANOMIPS_EXTRACT_RS5(op) (op & 0x1f)
-
-
static void gen_adjust_sp(DisasContext *ctx, int u)
{
gen_op_addr_addi(ctx, cpu_gpr[29], cpu_gpr[29], u);
static void gen_pool16c_nanomips_insn(DisasContext *ctx)
{
- int rt = decode_gpr_gpr3(NANOMIPS_EXTRACT_RD(ctx->opcode));
- int rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS(ctx->opcode));
+ int rt = decode_gpr_gpr3(NANOMIPS_EXTRACT_RT3(ctx->opcode));
+ int rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS3(ctx->opcode));
switch (extract32(ctx->opcode, 2, 2)) {
case NM_NOT16:
goto out;
}
+ /* branch completion */
+ clear_branch_hflags(ctx);
+ ctx->base.is_jmp = DISAS_NORETURN;
+
if (bcond_compute == 0) {
/* Uncoditional compact branch */
gen_goto_tb(ctx, 0, ctx->btarget);
tcg_gen_movi_tl(t1, ctx->base.pc_next + 4);
gen_op_addr_add(ctx, btarget, t1, t0);
+ /* branch completion */
+ clear_branch_hflags(ctx);
+ ctx->base.is_jmp = DISAS_NORETURN;
+
/* unconditional branch to register */
tcg_gen_mov_tl(cpu_PC, btarget);
tcg_gen_lookup_and_goto_ptr();
goto out;
}
+ /* branch completion */
+ clear_branch_hflags(ctx);
+ ctx->base.is_jmp = DISAS_NORETURN;
+
/* Generating branch here as compact branches don't have delay slot */
gen_goto_tb(ctx, 1, ctx->btarget);
gen_set_label(fs);
break;
case NM_SCWP:
check_xnp(ctx);
- gen_scwp(ctx, rs, 0, rt, extract32(ctx->opcode, 3, 5));
+ gen_scwp(ctx, rs, 0, rt, extract32(ctx->opcode, 3, 5),
+ false);
break;
}
break;
check_xnp(ctx);
check_eva(ctx);
check_cp0_enabled(ctx);
- gen_scwp(ctx, rs, 0, rt, extract32(ctx->opcode, 3, 5));
+ gen_scwp(ctx, rs, 0, rt, extract32(ctx->opcode, 3, 5),
+ true);
break;
default:
generate_exception_end(ctx, EXCP_RI);
static int decode_nanomips_opc(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t op;
- int rt = decode_gpr_gpr3(NANOMIPS_EXTRACT_RD(ctx->opcode));
- int rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS(ctx->opcode));
- int rd = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS1(ctx->opcode));
+ int rt = decode_gpr_gpr3(NANOMIPS_EXTRACT_RT3(ctx->opcode));
+ int rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS3(ctx->opcode));
+ int rd = decode_gpr_gpr3(NANOMIPS_EXTRACT_RD3(ctx->opcode));
int offset;
int imm;
break;
case NM_SB16:
rt = decode_gpr_gpr3_src_store(
- NANOMIPS_EXTRACT_RD(ctx->opcode));
+ NANOMIPS_EXTRACT_RT3(ctx->opcode));
gen_st(ctx, OPC_SB, rt, rs, offset);
break;
case NM_LBU16:
break;
case NM_SH16:
rt = decode_gpr_gpr3_src_store(
- NANOMIPS_EXTRACT_RD(ctx->opcode));
+ NANOMIPS_EXTRACT_RT3(ctx->opcode));
gen_st(ctx, OPC_SH, rt, rs, offset);
break;
case NM_LHU16:
break;
case NM_SW16:
rt = decode_gpr_gpr3_src_store(
- NANOMIPS_EXTRACT_RD(ctx->opcode));
- rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS(ctx->opcode));
+ NANOMIPS_EXTRACT_RT3(ctx->opcode));
+ rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS3(ctx->opcode));
offset = extract32(ctx->opcode, 0, 4) << 2;
gen_st(ctx, OPC_SW, rt, rs, offset);
break;
case NM_SWGP16:
rt = decode_gpr_gpr3_src_store(
- NANOMIPS_EXTRACT_RD(ctx->opcode));
+ NANOMIPS_EXTRACT_RT3(ctx->opcode));
offset = extract32(ctx->opcode, 0, 7) << 2;
gen_st(ctx, OPC_SW, rt, 28, offset);
break;
return (mcc->cpu_def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0;
}
-bool cpu_supports_isa(const char *cpu_type, unsigned int isa)
+bool cpu_supports_isa(const char *cpu_type, uint64_t isa)
{
const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type));
return (mcc->cpu_def->insn_flags & isa) != 0;
.insn_flags = CPU_MIPS64R6 | ASE_MSA,
.mmu_type = MMU_TYPE_R4000,
},
+ {
+ .name = "I6500",
+ .CP0_PRid = 0x1B000,
+ .CP0_Config0 = MIPS_CONFIG0 | (0x2 << CP0C0_AR) | (0x2 << CP0C0_AT) |
+ (MMU_TYPE_R4000 << CP0C0_MT),
+ .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
+ (2 << CP0C1_IS) | (5 << CP0C1_IL) | (3 << CP0C1_IA) |
+ (2 << CP0C1_DS) | (5 << CP0C1_DL) | (3 << CP0C1_DA) |
+ (0 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
+ .CP0_Config2 = MIPS_CONFIG2,
+ .CP0_Config3 = MIPS_CONFIG3 | (1U << CP0C3_M) |
+ (1 << CP0C3_CMGCR) | (1 << CP0C3_MSAP) |
+ (1 << CP0C3_BP) | (1 << CP0C3_BI) | (1 << CP0C3_ULRI) |
+ (1 << CP0C3_RXI) | (1 << CP0C3_LPA) | (1 << CP0C3_VInt),
+ .CP0_Config4 = MIPS_CONFIG4 | (1U << CP0C4_M) | (3 << CP0C4_IE) |
+ (1 << CP0C4_AE) | (0xfc << CP0C4_KScrExist),
+ .CP0_Config5 = MIPS_CONFIG5 | (1 << CP0C5_XNP) | (1 << CP0C5_VP) |
+ (1 << CP0C5_LLB) | (1 << CP0C5_MRP),
+ .CP0_Config5_rw_bitmask = (1 << CP0C5_MSAEn) | (1 << CP0C5_SBRI) |
+ (1 << CP0C5_FRE) | (1 << CP0C5_UFE),
+ .CP0_LLAddr_rw_bitmask = 0,
+ .CP0_LLAddr_shift = 0,
+ .SYNCI_Step = 64,
+ .CCRes = 2,
+ .CP0_Status_rw_bitmask = 0x30D8FFFF,
+ .CP0_PageGrain = (1 << CP0PG_IEC) | (1 << CP0PG_XIE) |
+ (1U << CP0PG_RIE),
+ .CP0_PageGrain_rw_bitmask = (1 << CP0PG_ELPA),
+ .CP0_EBaseWG_rw_bitmask = (1 << CP0EBase_WG),
+ .CP1_fcr0 = (1 << FCR0_FREP) | (1 << FCR0_HAS2008) | (1 << FCR0_F64) |
+ (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) |
+ (1 << FCR0_S) | (0x03 << FCR0_PRID) | (0x0 << FCR0_REV),
+ .CP1_fcr31 = (1 << FCR31_ABS2008) | (1 << FCR31_NAN2008),
+ .CP1_fcr31_rw_bitmask = 0x0103FFFF,
+ .MSAIR = 0x03 << MSAIR_ProcID,
+ .SEGBITS = 48,
+ .PABITS = 48,
+ .insn_flags = CPU_MIPS64R6 | ASE_MSA,
+ .mmu_type = MMU_TYPE_R4000,
+ },
{
.name = "Loongson-2E",
.CP0_PRid = 0x6302,
}
if (version == fsl_e6500) {
- spr_register(env, SPR_BOOKE_SPRG8, "SPRG8",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
- spr_register(env, SPR_BOOKE_SPRG9, "SPRG9",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
/* Thread identification */
spr_register(env, SPR_TIR, "TIR",
SPR_NOACCESS, SPR_NOACCESS,
obj-$(CONFIG_SOFTMMU) += monitor.o xtensa-semi.o
obj-y += xtensa-isa.o
obj-y += translate.o op_helper.o helper.o cpu.o
+obj-$(CONFIG_SOFTMMU) += dbg_helper.o
+obj-y += exc_helper.o
+obj-y += fpu_helper.o
obj-y += gdbstub.o
+obj-$(CONFIG_SOFTMMU) += mmu_helper.o
+obj-y += win_helper.o
int excm_level;
int ndepc;
unsigned inst_fetch_width;
+ unsigned max_insn_size;
uint32_t vecbase;
uint32_t exception_vector[EXC_MAX];
unsigned ninterrupt;
#define XTENSA_TBFLAG_CALLINC_MASK 0x180000
#define XTENSA_TBFLAG_CALLINC_SHIFT 19
+#define XTENSA_CSBASE_LEND_MASK 0x0000ffff
+#define XTENSA_CSBASE_LEND_SHIFT 0
+#define XTENSA_CSBASE_LBEG_OFF_MASK 0x00ff0000
+#define XTENSA_CSBASE_LBEG_OFF_SHIFT 16
+
static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc,
target_ulong *cs_base, uint32_t *flags)
{
*flags |= xtensa_get_ring(env);
if (env->sregs[PS] & PS_EXCM) {
*flags |= XTENSA_TBFLAG_EXCM;
+ } else if (xtensa_option_enabled(env->config, XTENSA_OPTION_LOOP)) {
+ target_ulong lend_dist =
+ env->sregs[LEND] - (env->pc & -(1u << TARGET_PAGE_BITS));
+
+ /*
+ * 0 in the csbase_lend field means that there may not be a loopback
+ * for any instruction that starts inside this page. Any other value
+ * means that an instruction that ends at this offset from the page
+ * start may loop back and will need loopback code to be generated.
+ *
+ * lend_dist is 0 when LEND points to the start of the page, but
+ * no instruction that starts inside this page may end at offset 0,
+ * so it's still correct.
+ *
+ * When an instruction ends at a page boundary it may only start in
+ * the previous page. lend_dist will be encoded as TARGET_PAGE_SIZE
+ * for the TB that contains this instruction.
+ */
+ if (lend_dist < (1u << TARGET_PAGE_BITS) + env->config->max_insn_size) {
+ target_ulong lbeg_off = env->sregs[LEND] - env->sregs[LBEG];
+
+ *cs_base = lend_dist;
+ if (lbeg_off < 256) {
+ *cs_base |= lbeg_off << XTENSA_CSBASE_LBEG_OFF_SHIFT;
+ }
+ }
}
if (xtensa_option_enabled(env->config, XTENSA_OPTION_EXTENDED_L32R) &&
(env->sregs[LITBASE] & 1)) {
--- /dev/null
+/*
+ * Copyright (c) 2011 - 2019, Max Filippov, Open Source and Linux Lab.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the Open Source and Linux Lab nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/main-loop.h"
+#include "cpu.h"
+#include "exec/helper-proto.h"
+#include "qemu/host-utils.h"
+#include "exec/exec-all.h"
+#include "exec/address-spaces.h"
+
+static void tb_invalidate_virtual_addr(CPUXtensaState *env, uint32_t vaddr)
+{
+ uint32_t paddr;
+ uint32_t page_size;
+ unsigned access;
+ int ret = xtensa_get_physical_addr(env, false, vaddr, 2, 0,
+ &paddr, &page_size, &access);
+ if (ret == 0) {
+ tb_invalidate_phys_addr(&address_space_memory, paddr,
+ MEMTXATTRS_UNSPECIFIED);
+ }
+}
+
+void HELPER(wsr_ibreakenable)(CPUXtensaState *env, uint32_t v)
+{
+ uint32_t change = v ^ env->sregs[IBREAKENABLE];
+ unsigned i;
+
+ for (i = 0; i < env->config->nibreak; ++i) {
+ if (change & (1 << i)) {
+ tb_invalidate_virtual_addr(env, env->sregs[IBREAKA + i]);
+ }
+ }
+ env->sregs[IBREAKENABLE] = v & ((1 << env->config->nibreak) - 1);
+}
+
+void HELPER(wsr_ibreaka)(CPUXtensaState *env, uint32_t i, uint32_t v)
+{
+ if (env->sregs[IBREAKENABLE] & (1 << i) && env->sregs[IBREAKA + i] != v) {
+ tb_invalidate_virtual_addr(env, env->sregs[IBREAKA + i]);
+ tb_invalidate_virtual_addr(env, v);
+ }
+ env->sregs[IBREAKA + i] = v;
+}
+
+static void set_dbreak(CPUXtensaState *env, unsigned i, uint32_t dbreaka,
+ uint32_t dbreakc)
+{
+ CPUState *cs = CPU(xtensa_env_get_cpu(env));
+ int flags = BP_CPU | BP_STOP_BEFORE_ACCESS;
+ uint32_t mask = dbreakc | ~DBREAKC_MASK;
+
+ if (env->cpu_watchpoint[i]) {
+ cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[i]);
+ }
+ if (dbreakc & DBREAKC_SB) {
+ flags |= BP_MEM_WRITE;
+ }
+ if (dbreakc & DBREAKC_LB) {
+ flags |= BP_MEM_READ;
+ }
+ /* contiguous mask after inversion is one less than some power of 2 */
+ if ((~mask + 1) & ~mask) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "DBREAKC mask is not contiguous: 0x%08x\n", dbreakc);
+ /* cut mask after the first zero bit */
+ mask = 0xffffffff << (32 - clo32(mask));
+ }
+ if (cpu_watchpoint_insert(cs, dbreaka & mask, ~mask + 1,
+ flags, &env->cpu_watchpoint[i])) {
+ env->cpu_watchpoint[i] = NULL;
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "Failed to set data breakpoint at 0x%08x/%d\n",
+ dbreaka & mask, ~mask + 1);
+ }
+}
+
+void HELPER(wsr_dbreaka)(CPUXtensaState *env, uint32_t i, uint32_t v)
+{
+ uint32_t dbreakc = env->sregs[DBREAKC + i];
+
+ if ((dbreakc & DBREAKC_SB_LB) &&
+ env->sregs[DBREAKA + i] != v) {
+ set_dbreak(env, i, v, dbreakc);
+ }
+ env->sregs[DBREAKA + i] = v;
+}
+
+void HELPER(wsr_dbreakc)(CPUXtensaState *env, uint32_t i, uint32_t v)
+{
+ if ((env->sregs[DBREAKC + i] ^ v) & (DBREAKC_SB_LB | DBREAKC_MASK)) {
+ if (v & DBREAKC_SB_LB) {
+ set_dbreak(env, i, env->sregs[DBREAKA + i], v);
+ } else {
+ if (env->cpu_watchpoint[i]) {
+ CPUState *cs = CPU(xtensa_env_get_cpu(env));
+
+ cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[i]);
+ env->cpu_watchpoint[i] = NULL;
+ }
+ }
+ }
+ env->sregs[DBREAKC + i] = v;
+}
--- /dev/null
+/*
+ * Copyright (c) 2011 - 2019, Max Filippov, Open Source and Linux Lab.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the Open Source and Linux Lab nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/main-loop.h"
+#include "cpu.h"
+#include "exec/helper-proto.h"
+#include "qemu/host-utils.h"
+#include "exec/exec-all.h"
+
+void HELPER(exception)(CPUXtensaState *env, uint32_t excp)
+{
+ CPUState *cs = CPU(xtensa_env_get_cpu(env));
+
+ cs->exception_index = excp;
+ if (excp == EXCP_YIELD) {
+ env->yield_needed = 0;
+ }
+ if (excp == EXCP_DEBUG) {
+ env->exception_taken = 0;
+ }
+ cpu_loop_exit(cs);
+}
+
+void HELPER(exception_cause)(CPUXtensaState *env, uint32_t pc, uint32_t cause)
+{
+ uint32_t vector;
+
+ env->pc = pc;
+ if (env->sregs[PS] & PS_EXCM) {
+ if (env->config->ndepc) {
+ env->sregs[DEPC] = pc;
+ } else {
+ env->sregs[EPC1] = pc;
+ }
+ vector = EXC_DOUBLE;
+ } else {
+ env->sregs[EPC1] = pc;
+ vector = (env->sregs[PS] & PS_UM) ? EXC_USER : EXC_KERNEL;
+ }
+
+ env->sregs[EXCCAUSE] = cause;
+ env->sregs[PS] |= PS_EXCM;
+
+ HELPER(exception)(env, vector);
+}
+
+void HELPER(exception_cause_vaddr)(CPUXtensaState *env,
+ uint32_t pc, uint32_t cause, uint32_t vaddr)
+{
+ env->sregs[EXCVADDR] = vaddr;
+ HELPER(exception_cause)(env, pc, cause);
+}
+
+void debug_exception_env(CPUXtensaState *env, uint32_t cause)
+{
+ if (xtensa_get_cintlevel(env) < env->config->debug_level) {
+ HELPER(debug_exception)(env, env->pc, cause);
+ }
+}
+
+void HELPER(debug_exception)(CPUXtensaState *env, uint32_t pc, uint32_t cause)
+{
+ unsigned level = env->config->debug_level;
+
+ env->pc = pc;
+ env->sregs[DEBUGCAUSE] = cause;
+ env->sregs[EPC1 + level - 1] = pc;
+ env->sregs[EPS2 + level - 2] = env->sregs[PS];
+ env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) | PS_EXCM |
+ (level << PS_INTLEVEL_SHIFT);
+ HELPER(exception)(env, EXC_DEBUG);
+}
+
+#ifndef CONFIG_USER_ONLY
+
+void HELPER(waiti)(CPUXtensaState *env, uint32_t pc, uint32_t intlevel)
+{
+ CPUState *cpu;
+
+ env->pc = pc;
+ env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) |
+ (intlevel << PS_INTLEVEL_SHIFT);
+
+ qemu_mutex_lock_iothread();
+ check_interrupts(env);
+ qemu_mutex_unlock_iothread();
+
+ if (env->pending_irq_level) {
+ cpu_loop_exit(CPU(xtensa_env_get_cpu(env)));
+ return;
+ }
+
+ cpu = CPU(xtensa_env_get_cpu(env));
+ cpu->halted = 1;
+ HELPER(exception)(env, EXCP_HLT);
+}
+
+void HELPER(check_interrupts)(CPUXtensaState *env)
+{
+ qemu_mutex_lock_iothread();
+ check_interrupts(env);
+ qemu_mutex_unlock_iothread();
+}
+
+static uint32_t relocated_vector(CPUXtensaState *env, uint32_t vector)
+{
+ if (xtensa_option_enabled(env->config,
+ XTENSA_OPTION_RELOCATABLE_VECTOR)) {
+ return vector - env->config->vecbase + env->sregs[VECBASE];
+ } else {
+ return vector;
+ }
+}
+
+/*!
+ * Handle penging IRQ.
+ * For the high priority interrupt jump to the corresponding interrupt vector.
+ * For the level-1 interrupt convert it to either user, kernel or double
+ * exception with the 'level-1 interrupt' exception cause.
+ */
+static void handle_interrupt(CPUXtensaState *env)
+{
+ int level = env->pending_irq_level;
+
+ if (level > xtensa_get_cintlevel(env) &&
+ level <= env->config->nlevel &&
+ (env->config->level_mask[level] &
+ env->sregs[INTSET] &
+ env->sregs[INTENABLE])) {
+ CPUState *cs = CPU(xtensa_env_get_cpu(env));
+
+ if (level > 1) {
+ env->sregs[EPC1 + level - 1] = env->pc;
+ env->sregs[EPS2 + level - 2] = env->sregs[PS];
+ env->sregs[PS] =
+ (env->sregs[PS] & ~PS_INTLEVEL) | level | PS_EXCM;
+ env->pc = relocated_vector(env,
+ env->config->interrupt_vector[level]);
+ } else {
+ env->sregs[EXCCAUSE] = LEVEL1_INTERRUPT_CAUSE;
+
+ if (env->sregs[PS] & PS_EXCM) {
+ if (env->config->ndepc) {
+ env->sregs[DEPC] = env->pc;
+ } else {
+ env->sregs[EPC1] = env->pc;
+ }
+ cs->exception_index = EXC_DOUBLE;
+ } else {
+ env->sregs[EPC1] = env->pc;
+ cs->exception_index =
+ (env->sregs[PS] & PS_UM) ? EXC_USER : EXC_KERNEL;
+ }
+ env->sregs[PS] |= PS_EXCM;
+ }
+ env->exception_taken = 1;
+ }
+}
+
+/* Called from cpu_handle_interrupt with BQL held */
+void xtensa_cpu_do_interrupt(CPUState *cs)
+{
+ XtensaCPU *cpu = XTENSA_CPU(cs);
+ CPUXtensaState *env = &cpu->env;
+
+ if (cs->exception_index == EXC_IRQ) {
+ qemu_log_mask(CPU_LOG_INT,
+ "%s(EXC_IRQ) level = %d, cintlevel = %d, "
+ "pc = %08x, a0 = %08x, ps = %08x, "
+ "intset = %08x, intenable = %08x, "
+ "ccount = %08x\n",
+ __func__, env->pending_irq_level,
+ xtensa_get_cintlevel(env),
+ env->pc, env->regs[0], env->sregs[PS],
+ env->sregs[INTSET], env->sregs[INTENABLE],
+ env->sregs[CCOUNT]);
+ handle_interrupt(env);
+ }
+
+ switch (cs->exception_index) {
+ case EXC_WINDOW_OVERFLOW4:
+ case EXC_WINDOW_UNDERFLOW4:
+ case EXC_WINDOW_OVERFLOW8:
+ case EXC_WINDOW_UNDERFLOW8:
+ case EXC_WINDOW_OVERFLOW12:
+ case EXC_WINDOW_UNDERFLOW12:
+ case EXC_KERNEL:
+ case EXC_USER:
+ case EXC_DOUBLE:
+ case EXC_DEBUG:
+ qemu_log_mask(CPU_LOG_INT, "%s(%d) "
+ "pc = %08x, a0 = %08x, ps = %08x, ccount = %08x\n",
+ __func__, cs->exception_index,
+ env->pc, env->regs[0], env->sregs[PS],
+ env->sregs[CCOUNT]);
+ if (env->config->exception_vector[cs->exception_index]) {
+ uint32_t vector;
+
+ vector = env->config->exception_vector[cs->exception_index];
+ env->pc = relocated_vector(env, vector);
+ env->exception_taken = 1;
+ } else {
+ qemu_log_mask(CPU_LOG_INT,
+ "%s(pc = %08x) bad exception_index: %d\n",
+ __func__, env->pc, cs->exception_index);
+ }
+ break;
+
+ case EXC_IRQ:
+ break;
+
+ default:
+ qemu_log("%s(pc = %08x) unknown exception_index: %d\n",
+ __func__, env->pc, cs->exception_index);
+ break;
+ }
+ check_interrupts(env);
+}
+#else
+void xtensa_cpu_do_interrupt(CPUState *cs)
+{
+}
+#endif
+
+bool xtensa_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
+{
+ if (interrupt_request & CPU_INTERRUPT_HARD) {
+ cs->exception_index = EXC_IRQ;
+ xtensa_cpu_do_interrupt(cs);
+ return true;
+ }
+ return false;
+}
--- /dev/null
+/*
+ * Copyright (c) 2011 - 2019, Max Filippov, Open Source and Linux Lab.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the Open Source and Linux Lab nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/main-loop.h"
+#include "cpu.h"
+#include "exec/helper-proto.h"
+#include "qemu/host-utils.h"
+#include "exec/exec-all.h"
+#include "fpu/softfloat.h"
+
+void HELPER(wur_fcr)(CPUXtensaState *env, uint32_t v)
+{
+ static const int rounding_mode[] = {
+ float_round_nearest_even,
+ float_round_to_zero,
+ float_round_up,
+ float_round_down,
+ };
+
+ env->uregs[FCR] = v & 0xfffff07f;
+ set_float_rounding_mode(rounding_mode[v & 3], &env->fp_status);
+}
+
+float32 HELPER(abs_s)(float32 v)
+{
+ return float32_abs(v);
+}
+
+float32 HELPER(neg_s)(float32 v)
+{
+ return float32_chs(v);
+}
+
+float32 HELPER(add_s)(CPUXtensaState *env, float32 a, float32 b)
+{
+ return float32_add(a, b, &env->fp_status);
+}
+
+float32 HELPER(sub_s)(CPUXtensaState *env, float32 a, float32 b)
+{
+ return float32_sub(a, b, &env->fp_status);
+}
+
+float32 HELPER(mul_s)(CPUXtensaState *env, float32 a, float32 b)
+{
+ return float32_mul(a, b, &env->fp_status);
+}
+
+float32 HELPER(madd_s)(CPUXtensaState *env, float32 a, float32 b, float32 c)
+{
+ return float32_muladd(b, c, a, 0, &env->fp_status);
+}
+
+float32 HELPER(msub_s)(CPUXtensaState *env, float32 a, float32 b, float32 c)
+{
+ return float32_muladd(b, c, a, float_muladd_negate_product,
+ &env->fp_status);
+}
+
+uint32_t HELPER(ftoi)(float32 v, uint32_t rounding_mode, uint32_t scale)
+{
+ float_status fp_status = {0};
+
+ set_float_rounding_mode(rounding_mode, &fp_status);
+ return float32_to_int32(float32_scalbn(v, scale, &fp_status), &fp_status);
+}
+
+uint32_t HELPER(ftoui)(float32 v, uint32_t rounding_mode, uint32_t scale)
+{
+ float_status fp_status = {0};
+ float32 res;
+
+ set_float_rounding_mode(rounding_mode, &fp_status);
+
+ res = float32_scalbn(v, scale, &fp_status);
+
+ if (float32_is_neg(v) && !float32_is_any_nan(v)) {
+ return float32_to_int32(res, &fp_status);
+ } else {
+ return float32_to_uint32(res, &fp_status);
+ }
+}
+
+float32 HELPER(itof)(CPUXtensaState *env, uint32_t v, uint32_t scale)
+{
+ return float32_scalbn(int32_to_float32(v, &env->fp_status),
+ (int32_t)scale, &env->fp_status);
+}
+
+float32 HELPER(uitof)(CPUXtensaState *env, uint32_t v, uint32_t scale)
+{
+ return float32_scalbn(uint32_to_float32(v, &env->fp_status),
+ (int32_t)scale, &env->fp_status);
+}
+
+static inline void set_br(CPUXtensaState *env, bool v, uint32_t br)
+{
+ if (v) {
+ env->sregs[BR] |= br;
+ } else {
+ env->sregs[BR] &= ~br;
+ }
+}
+
+void HELPER(un_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
+{
+ set_br(env, float32_unordered_quiet(a, b, &env->fp_status), br);
+}
+
+void HELPER(oeq_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
+{
+ set_br(env, float32_eq_quiet(a, b, &env->fp_status), br);
+}
+
+void HELPER(ueq_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
+{
+ int v = float32_compare_quiet(a, b, &env->fp_status);
+ set_br(env, v == float_relation_equal || v == float_relation_unordered, br);
+}
+
+void HELPER(olt_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
+{
+ set_br(env, float32_lt_quiet(a, b, &env->fp_status), br);
+}
+
+void HELPER(ult_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
+{
+ int v = float32_compare_quiet(a, b, &env->fp_status);
+ set_br(env, v == float_relation_less || v == float_relation_unordered, br);
+}
+
+void HELPER(ole_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
+{
+ set_br(env, float32_le_quiet(a, b, &env->fp_status), br);
+}
+
+void HELPER(ule_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
+{
+ int v = float32_compare_quiet(a, b, &env->fp_status);
+ set_br(env, v != float_relation_greater, br);
+}
*/
#include "qemu/osdep.h"
-#include "qemu/units.h"
#include "cpu.h"
#include "exec/exec-all.h"
#include "exec/gdbstub.h"
+#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
-#if !defined(CONFIG_USER_ONLY)
-#include "hw/loader.h"
-#endif
static struct XtensaConfigList *xtensa_cores;
}
}
-hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
-{
-#ifndef CONFIG_USER_ONLY
- XtensaCPU *cpu = XTENSA_CPU(cs);
- uint32_t paddr;
- uint32_t page_size;
- unsigned access;
-
- if (xtensa_get_physical_addr(&cpu->env, false, addr, 0, 0,
- &paddr, &page_size, &access) == 0) {
- return paddr;
- }
- if (xtensa_get_physical_addr(&cpu->env, false, addr, 2, 0,
- &paddr, &page_size, &access) == 0) {
- return paddr;
- }
- return ~0;
-#else
- return addr;
-#endif
-}
-
-#ifndef CONFIG_USER_ONLY
-
-static uint32_t relocated_vector(CPUXtensaState *env, uint32_t vector)
-{
- if (xtensa_option_enabled(env->config,
- XTENSA_OPTION_RELOCATABLE_VECTOR)) {
- return vector - env->config->vecbase + env->sregs[VECBASE];
- } else {
- return vector;
- }
-}
-
-/*!
- * Handle penging IRQ.
- * For the high priority interrupt jump to the corresponding interrupt vector.
- * For the level-1 interrupt convert it to either user, kernel or double
- * exception with the 'level-1 interrupt' exception cause.
- */
-static void handle_interrupt(CPUXtensaState *env)
-{
- int level = env->pending_irq_level;
-
- if (level > xtensa_get_cintlevel(env) &&
- level <= env->config->nlevel &&
- (env->config->level_mask[level] &
- env->sregs[INTSET] &
- env->sregs[INTENABLE])) {
- CPUState *cs = CPU(xtensa_env_get_cpu(env));
-
- if (level > 1) {
- env->sregs[EPC1 + level - 1] = env->pc;
- env->sregs[EPS2 + level - 2] = env->sregs[PS];
- env->sregs[PS] =
- (env->sregs[PS] & ~PS_INTLEVEL) | level | PS_EXCM;
- env->pc = relocated_vector(env,
- env->config->interrupt_vector[level]);
- } else {
- env->sregs[EXCCAUSE] = LEVEL1_INTERRUPT_CAUSE;
-
- if (env->sregs[PS] & PS_EXCM) {
- if (env->config->ndepc) {
- env->sregs[DEPC] = env->pc;
- } else {
- env->sregs[EPC1] = env->pc;
- }
- cs->exception_index = EXC_DOUBLE;
- } else {
- env->sregs[EPC1] = env->pc;
- cs->exception_index =
- (env->sregs[PS] & PS_UM) ? EXC_USER : EXC_KERNEL;
- }
- env->sregs[PS] |= PS_EXCM;
- }
- env->exception_taken = 1;
- }
-}
-
-/* Called from cpu_handle_interrupt with BQL held */
-void xtensa_cpu_do_interrupt(CPUState *cs)
-{
- XtensaCPU *cpu = XTENSA_CPU(cs);
- CPUXtensaState *env = &cpu->env;
-
- if (cs->exception_index == EXC_IRQ) {
- qemu_log_mask(CPU_LOG_INT,
- "%s(EXC_IRQ) level = %d, cintlevel = %d, "
- "pc = %08x, a0 = %08x, ps = %08x, "
- "intset = %08x, intenable = %08x, "
- "ccount = %08x\n",
- __func__, env->pending_irq_level, xtensa_get_cintlevel(env),
- env->pc, env->regs[0], env->sregs[PS],
- env->sregs[INTSET], env->sregs[INTENABLE],
- env->sregs[CCOUNT]);
- handle_interrupt(env);
- }
-
- switch (cs->exception_index) {
- case EXC_WINDOW_OVERFLOW4:
- case EXC_WINDOW_UNDERFLOW4:
- case EXC_WINDOW_OVERFLOW8:
- case EXC_WINDOW_UNDERFLOW8:
- case EXC_WINDOW_OVERFLOW12:
- case EXC_WINDOW_UNDERFLOW12:
- case EXC_KERNEL:
- case EXC_USER:
- case EXC_DOUBLE:
- case EXC_DEBUG:
- qemu_log_mask(CPU_LOG_INT, "%s(%d) "
- "pc = %08x, a0 = %08x, ps = %08x, ccount = %08x\n",
- __func__, cs->exception_index,
- env->pc, env->regs[0], env->sregs[PS], env->sregs[CCOUNT]);
- if (env->config->exception_vector[cs->exception_index]) {
- env->pc = relocated_vector(env,
- env->config->exception_vector[cs->exception_index]);
- env->exception_taken = 1;
- } else {
- qemu_log_mask(CPU_LOG_INT, "%s(pc = %08x) bad exception_index: %d\n",
- __func__, env->pc, cs->exception_index);
- }
- break;
-
- case EXC_IRQ:
- break;
-
- default:
- qemu_log("%s(pc = %08x) unknown exception_index: %d\n",
- __func__, env->pc, cs->exception_index);
- break;
- }
- check_interrupts(env);
-}
-#else
-void xtensa_cpu_do_interrupt(CPUState *cs)
-{
-}
-#endif
-
-bool xtensa_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
-{
- if (interrupt_request & CPU_INTERRUPT_HARD) {
- cs->exception_index = EXC_IRQ;
- xtensa_cpu_do_interrupt(cs);
- return true;
- }
- return false;
-}
-
#ifdef CONFIG_USER_ONLY
int xtensa_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
#else
-static void reset_tlb_mmu_all_ways(CPUXtensaState *env,
- const xtensa_tlb *tlb, xtensa_tlb_entry entry[][MAX_TLB_WAY_SIZE])
-{
- unsigned wi, ei;
-
- for (wi = 0; wi < tlb->nways; ++wi) {
- for (ei = 0; ei < tlb->way_size[wi]; ++ei) {
- entry[wi][ei].asid = 0;
- entry[wi][ei].variable = true;
- }
- }
-}
-
-static void reset_tlb_mmu_ways56(CPUXtensaState *env,
- const xtensa_tlb *tlb, xtensa_tlb_entry entry[][MAX_TLB_WAY_SIZE])
-{
- if (!tlb->varway56) {
- static const xtensa_tlb_entry way5[] = {
- {
- .vaddr = 0xd0000000,
- .paddr = 0,
- .asid = 1,
- .attr = 7,
- .variable = false,
- }, {
- .vaddr = 0xd8000000,
- .paddr = 0,
- .asid = 1,
- .attr = 3,
- .variable = false,
- }
- };
- static const xtensa_tlb_entry way6[] = {
- {
- .vaddr = 0xe0000000,
- .paddr = 0xf0000000,
- .asid = 1,
- .attr = 7,
- .variable = false,
- }, {
- .vaddr = 0xf0000000,
- .paddr = 0xf0000000,
- .asid = 1,
- .attr = 3,
- .variable = false,
- }
- };
- memcpy(entry[5], way5, sizeof(way5));
- memcpy(entry[6], way6, sizeof(way6));
- } else {
- uint32_t ei;
- for (ei = 0; ei < 8; ++ei) {
- entry[6][ei].vaddr = ei << 29;
- entry[6][ei].paddr = ei << 29;
- entry[6][ei].asid = 1;
- entry[6][ei].attr = 3;
- }
- }
-}
-
-static void reset_tlb_region_way0(CPUXtensaState *env,
- xtensa_tlb_entry entry[][MAX_TLB_WAY_SIZE])
-{
- unsigned ei;
-
- for (ei = 0; ei < 8; ++ei) {
- entry[0][ei].vaddr = ei << 29;
- entry[0][ei].paddr = ei << 29;
- entry[0][ei].asid = 1;
- entry[0][ei].attr = 2;
- entry[0][ei].variable = true;
- }
-}
-
-void reset_mmu(CPUXtensaState *env)
-{
- if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
- env->sregs[RASID] = 0x04030201;
- env->sregs[ITLBCFG] = 0;
- env->sregs[DTLBCFG] = 0;
- env->autorefill_idx = 0;
- reset_tlb_mmu_all_ways(env, &env->config->itlb, env->itlb);
- reset_tlb_mmu_all_ways(env, &env->config->dtlb, env->dtlb);
- reset_tlb_mmu_ways56(env, &env->config->itlb, env->itlb);
- reset_tlb_mmu_ways56(env, &env->config->dtlb, env->dtlb);
- } else {
- reset_tlb_region_way0(env, env->itlb);
- reset_tlb_region_way0(env, env->dtlb);
- }
-}
-
-static unsigned get_ring(const CPUXtensaState *env, uint8_t asid)
+void xtensa_cpu_do_unaligned_access(CPUState *cs,
+ vaddr addr, MMUAccessType access_type,
+ int mmu_idx, uintptr_t retaddr)
{
- unsigned i;
- for (i = 0; i < 4; ++i) {
- if (((env->sregs[RASID] >> i * 8) & 0xff) == asid) {
- return i;
- }
- }
- return 0xff;
-}
-
-/*!
- * Lookup xtensa TLB for the given virtual address.
- * See ISA, 4.6.2.2
- *
- * \param pwi: [out] way index
- * \param pei: [out] entry index
- * \param pring: [out] access ring
- * \return 0 if ok, exception cause code otherwise
- */
-int xtensa_tlb_lookup(const CPUXtensaState *env, uint32_t addr, bool dtlb,
- uint32_t *pwi, uint32_t *pei, uint8_t *pring)
-{
- const xtensa_tlb *tlb = dtlb ?
- &env->config->dtlb : &env->config->itlb;
- const xtensa_tlb_entry (*entry)[MAX_TLB_WAY_SIZE] = dtlb ?
- env->dtlb : env->itlb;
-
- int nhits = 0;
- unsigned wi;
-
- for (wi = 0; wi < tlb->nways; ++wi) {
- uint32_t vpn;
- uint32_t ei;
- split_tlb_entry_spec_way(env, addr, dtlb, &vpn, wi, &ei);
- if (entry[wi][ei].vaddr == vpn && entry[wi][ei].asid) {
- unsigned ring = get_ring(env, entry[wi][ei].asid);
- if (ring < 4) {
- if (++nhits > 1) {
- return dtlb ?
- LOAD_STORE_TLB_MULTI_HIT_CAUSE :
- INST_TLB_MULTI_HIT_CAUSE;
- }
- *pwi = wi;
- *pei = ei;
- *pring = ring;
- }
- }
- }
- return nhits ? 0 :
- (dtlb ? LOAD_STORE_TLB_MISS_CAUSE : INST_TLB_MISS_CAUSE);
-}
-
-/*!
- * Convert MMU ATTR to PAGE_{READ,WRITE,EXEC} mask.
- * See ISA, 4.6.5.10
- */
-static unsigned mmu_attr_to_access(uint32_t attr)
-{
- unsigned access = 0;
-
- if (attr < 12) {
- access |= PAGE_READ;
- if (attr & 0x1) {
- access |= PAGE_EXEC;
- }
- if (attr & 0x2) {
- access |= PAGE_WRITE;
- }
-
- switch (attr & 0xc) {
- case 0:
- access |= PAGE_CACHE_BYPASS;
- break;
-
- case 4:
- access |= PAGE_CACHE_WB;
- break;
-
- case 8:
- access |= PAGE_CACHE_WT;
- break;
- }
- } else if (attr == 13) {
- access |= PAGE_READ | PAGE_WRITE | PAGE_CACHE_ISOLATE;
- }
- return access;
-}
-
-/*!
- * Convert region protection ATTR to PAGE_{READ,WRITE,EXEC} mask.
- * See ISA, 4.6.3.3
- */
-static unsigned region_attr_to_access(uint32_t attr)
-{
- static const unsigned access[16] = {
- [0] = PAGE_READ | PAGE_WRITE | PAGE_CACHE_WT,
- [1] = PAGE_READ | PAGE_WRITE | PAGE_EXEC | PAGE_CACHE_WT,
- [2] = PAGE_READ | PAGE_WRITE | PAGE_EXEC | PAGE_CACHE_BYPASS,
- [3] = PAGE_EXEC | PAGE_CACHE_WB,
- [4] = PAGE_READ | PAGE_WRITE | PAGE_EXEC | PAGE_CACHE_WB,
- [5] = PAGE_READ | PAGE_WRITE | PAGE_EXEC | PAGE_CACHE_WB,
- [14] = PAGE_READ | PAGE_WRITE | PAGE_CACHE_ISOLATE,
- };
-
- return access[attr & 0xf];
-}
-
-/*!
- * Convert cacheattr to PAGE_{READ,WRITE,EXEC} mask.
- * See ISA, A.2.14 The Cache Attribute Register
- */
-static unsigned cacheattr_attr_to_access(uint32_t attr)
-{
- static const unsigned access[16] = {
- [0] = PAGE_READ | PAGE_WRITE | PAGE_CACHE_WT,
- [1] = PAGE_READ | PAGE_WRITE | PAGE_EXEC | PAGE_CACHE_WT,
- [2] = PAGE_READ | PAGE_WRITE | PAGE_EXEC | PAGE_CACHE_BYPASS,
- [3] = PAGE_EXEC | PAGE_CACHE_WB,
- [4] = PAGE_READ | PAGE_WRITE | PAGE_EXEC | PAGE_CACHE_WB,
- [14] = PAGE_READ | PAGE_WRITE | PAGE_CACHE_ISOLATE,
- };
-
- return access[attr & 0xf];
-}
-
-static bool is_access_granted(unsigned access, int is_write)
-{
- switch (is_write) {
- case 0:
- return access & PAGE_READ;
-
- case 1:
- return access & PAGE_WRITE;
-
- case 2:
- return access & PAGE_EXEC;
-
- default:
- return 0;
- }
-}
-
-static bool get_pte(CPUXtensaState *env, uint32_t vaddr, uint32_t *pte);
-
-static int get_physical_addr_mmu(CPUXtensaState *env, bool update_tlb,
- uint32_t vaddr, int is_write, int mmu_idx,
- uint32_t *paddr, uint32_t *page_size, unsigned *access,
- bool may_lookup_pt)
-{
- bool dtlb = is_write != 2;
- uint32_t wi;
- uint32_t ei;
- uint8_t ring;
- uint32_t vpn;
- uint32_t pte;
- const xtensa_tlb_entry *entry = NULL;
- xtensa_tlb_entry tmp_entry;
- int ret = xtensa_tlb_lookup(env, vaddr, dtlb, &wi, &ei, &ring);
-
- if ((ret == INST_TLB_MISS_CAUSE || ret == LOAD_STORE_TLB_MISS_CAUSE) &&
- may_lookup_pt && get_pte(env, vaddr, &pte)) {
- ring = (pte >> 4) & 0x3;
- wi = 0;
- split_tlb_entry_spec_way(env, vaddr, dtlb, &vpn, wi, &ei);
-
- if (update_tlb) {
- wi = ++env->autorefill_idx & 0x3;
- xtensa_tlb_set_entry(env, dtlb, wi, ei, vpn, pte);
- env->sregs[EXCVADDR] = vaddr;
- qemu_log_mask(CPU_LOG_MMU, "%s: autorefill(%08x): %08x -> %08x\n",
- __func__, vaddr, vpn, pte);
- } else {
- xtensa_tlb_set_entry_mmu(env, &tmp_entry, dtlb, wi, ei, vpn, pte);
- entry = &tmp_entry;
- }
- ret = 0;
- }
- if (ret != 0) {
- return ret;
- }
-
- if (entry == NULL) {
- entry = xtensa_tlb_get_entry(env, dtlb, wi, ei);
- }
-
- if (ring < mmu_idx) {
- return dtlb ?
- LOAD_STORE_PRIVILEGE_CAUSE :
- INST_FETCH_PRIVILEGE_CAUSE;
- }
+ XtensaCPU *cpu = XTENSA_CPU(cs);
+ CPUXtensaState *env = &cpu->env;
- *access = mmu_attr_to_access(entry->attr) &
- ~(dtlb ? PAGE_EXEC : PAGE_READ | PAGE_WRITE);
- if (!is_access_granted(*access, is_write)) {
- return dtlb ?
- (is_write ?
- STORE_PROHIBITED_CAUSE :
- LOAD_PROHIBITED_CAUSE) :
- INST_FETCH_PROHIBITED_CAUSE;
+ if (xtensa_option_enabled(env->config, XTENSA_OPTION_UNALIGNED_EXCEPTION) &&
+ !xtensa_option_enabled(env->config, XTENSA_OPTION_HW_ALIGNMENT)) {
+ cpu_restore_state(CPU(cpu), retaddr, true);
+ HELPER(exception_cause_vaddr)(env,
+ env->pc, LOAD_STORE_ALIGNMENT_CAUSE,
+ addr);
}
-
- *paddr = entry->paddr | (vaddr & ~xtensa_tlb_get_addr_mask(env, dtlb, wi));
- *page_size = ~xtensa_tlb_get_addr_mask(env, dtlb, wi) + 1;
-
- return 0;
}
-static bool get_pte(CPUXtensaState *env, uint32_t vaddr, uint32_t *pte)
+void tlb_fill(CPUState *cs, target_ulong vaddr, int size,
+ MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
{
- CPUState *cs = CPU(xtensa_env_get_cpu(env));
+ XtensaCPU *cpu = XTENSA_CPU(cs);
+ CPUXtensaState *env = &cpu->env;
uint32_t paddr;
uint32_t page_size;
unsigned access;
- uint32_t pt_vaddr =
- (env->sregs[PTEVADDR] | (vaddr >> 10)) & 0xfffffffc;
- int ret = get_physical_addr_mmu(env, false, pt_vaddr, 0, 0,
- &paddr, &page_size, &access, false);
+ int ret = xtensa_get_physical_addr(env, true, vaddr, access_type, mmu_idx,
+ &paddr, &page_size, &access);
- if (ret == 0) {
- qemu_log_mask(CPU_LOG_MMU,
- "%s: autorefill(%08x): PTE va = %08x, pa = %08x\n",
- __func__, vaddr, pt_vaddr, paddr);
- } else {
- qemu_log_mask(CPU_LOG_MMU,
- "%s: autorefill(%08x): PTE va = %08x, failed (%d)\n",
- __func__, vaddr, pt_vaddr, ret);
- }
+ qemu_log_mask(CPU_LOG_MMU, "%s(%08x, %d, %d) -> %08x, ret = %d\n",
+ __func__, vaddr, access_type, mmu_idx, paddr, ret);
if (ret == 0) {
- MemTxResult result;
-
- *pte = address_space_ldl(cs->as, paddr, MEMTXATTRS_UNSPECIFIED,
- &result);
- if (result != MEMTX_OK) {
- qemu_log_mask(CPU_LOG_MMU,
- "%s: couldn't load PTE: transaction failed (%u)\n",
- __func__, (unsigned)result);
- ret = 1;
- }
- }
- return ret == 0;
-}
-
-static int get_physical_addr_region(CPUXtensaState *env,
- uint32_t vaddr, int is_write, int mmu_idx,
- uint32_t *paddr, uint32_t *page_size, unsigned *access)
-{
- bool dtlb = is_write != 2;
- uint32_t wi = 0;
- uint32_t ei = (vaddr >> 29) & 0x7;
- const xtensa_tlb_entry *entry =
- xtensa_tlb_get_entry(env, dtlb, wi, ei);
-
- *access = region_attr_to_access(entry->attr);
- if (!is_access_granted(*access, is_write)) {
- return dtlb ?
- (is_write ?
- STORE_PROHIBITED_CAUSE :
- LOAD_PROHIBITED_CAUSE) :
- INST_FETCH_PROHIBITED_CAUSE;
- }
-
- *paddr = entry->paddr | (vaddr & ~REGION_PAGE_MASK);
- *page_size = ~REGION_PAGE_MASK + 1;
-
- return 0;
-}
-
-/*!
- * Convert virtual address to physical addr.
- * MMU may issue pagewalk and change xtensa autorefill TLB way entry.
- *
- * \return 0 if ok, exception cause code otherwise
- */
-int xtensa_get_physical_addr(CPUXtensaState *env, bool update_tlb,
- uint32_t vaddr, int is_write, int mmu_idx,
- uint32_t *paddr, uint32_t *page_size, unsigned *access)
-{
- if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
- return get_physical_addr_mmu(env, update_tlb,
- vaddr, is_write, mmu_idx, paddr, page_size, access, true);
- } else if (xtensa_option_bits_enabled(env->config,
- XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_PROTECTION) |
- XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_TRANSLATION))) {
- return get_physical_addr_region(env, vaddr, is_write, mmu_idx,
- paddr, page_size, access);
+ tlb_set_page(cs,
+ vaddr & TARGET_PAGE_MASK,
+ paddr & TARGET_PAGE_MASK,
+ access, mmu_idx, page_size);
} else {
- *paddr = vaddr;
- *page_size = TARGET_PAGE_SIZE;
- *access = cacheattr_attr_to_access(
- env->sregs[CACHEATTR] >> ((vaddr & 0xe0000000) >> 27));
- return 0;
+ cpu_restore_state(cs, retaddr, true);
+ HELPER(exception_cause_vaddr)(env, env->pc, ret, vaddr);
}
}
-static void dump_tlb(FILE *f, fprintf_function cpu_fprintf,
- CPUXtensaState *env, bool dtlb)
+void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
+ unsigned size, MMUAccessType access_type,
+ int mmu_idx, MemTxAttrs attrs,
+ MemTxResult response, uintptr_t retaddr)
{
- unsigned wi, ei;
- const xtensa_tlb *conf =
- dtlb ? &env->config->dtlb : &env->config->itlb;
- unsigned (*attr_to_access)(uint32_t) =
- xtensa_option_enabled(env->config, XTENSA_OPTION_MMU) ?
- mmu_attr_to_access : region_attr_to_access;
-
- for (wi = 0; wi < conf->nways; ++wi) {
- uint32_t sz = ~xtensa_tlb_get_addr_mask(env, dtlb, wi) + 1;
- const char *sz_text;
- bool print_header = true;
-
- if (sz >= 0x100000) {
- sz /= MiB;
- sz_text = "MB";
- } else {
- sz /= KiB;
- sz_text = "KB";
- }
-
- for (ei = 0; ei < conf->way_size[wi]; ++ei) {
- const xtensa_tlb_entry *entry =
- xtensa_tlb_get_entry(env, dtlb, wi, ei);
-
- if (entry->asid) {
- static const char * const cache_text[8] = {
- [PAGE_CACHE_BYPASS >> PAGE_CACHE_SHIFT] = "Bypass",
- [PAGE_CACHE_WT >> PAGE_CACHE_SHIFT] = "WT",
- [PAGE_CACHE_WB >> PAGE_CACHE_SHIFT] = "WB",
- [PAGE_CACHE_ISOLATE >> PAGE_CACHE_SHIFT] = "Isolate",
- };
- unsigned access = attr_to_access(entry->attr);
- unsigned cache_idx = (access & PAGE_CACHE_MASK) >>
- PAGE_CACHE_SHIFT;
-
- if (print_header) {
- print_header = false;
- cpu_fprintf(f, "Way %u (%d %s)\n", wi, sz, sz_text);
- cpu_fprintf(f,
- "\tVaddr Paddr ASID Attr RWX Cache\n"
- "\t---------- ---------- ---- ---- --- -------\n");
- }
- cpu_fprintf(f,
- "\t0x%08x 0x%08x 0x%02x 0x%02x %c%c%c %-7s\n",
- entry->vaddr,
- entry->paddr,
- entry->asid,
- entry->attr,
- (access & PAGE_READ) ? 'R' : '-',
- (access & PAGE_WRITE) ? 'W' : '-',
- (access & PAGE_EXEC) ? 'X' : '-',
- cache_text[cache_idx] ? cache_text[cache_idx] :
- "Invalid");
- }
- }
- }
-}
+ XtensaCPU *cpu = XTENSA_CPU(cs);
+ CPUXtensaState *env = &cpu->env;
-void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUXtensaState *env)
-{
- if (xtensa_option_bits_enabled(env->config,
- XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_PROTECTION) |
- XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_TRANSLATION) |
- XTENSA_OPTION_BIT(XTENSA_OPTION_MMU))) {
-
- cpu_fprintf(f, "ITLB:\n");
- dump_tlb(f, cpu_fprintf, env, false);
- cpu_fprintf(f, "\nDTLB:\n");
- dump_tlb(f, cpu_fprintf, env, true);
- } else {
- cpu_fprintf(f, "No TLB for this CPU core\n");
- }
+ cpu_restore_state(cs, retaddr, true);
+ HELPER(exception_cause_vaddr)(env, env->pc,
+ access_type == MMU_INST_FETCH ?
+ INSTR_PIF_ADDR_ERROR_CAUSE :
+ LOAD_STORE_PIF_ADDR_ERROR_CAUSE,
+ addr);
}
void xtensa_runstall(CPUXtensaState *env, bool runstall)
DEF_HELPER_3(window_check, noreturn, env, i32, i32)
DEF_HELPER_1(restore_owb, void, env)
DEF_HELPER_2(movsp, void, env, i32)
-DEF_HELPER_2(wsr_lbeg, void, env, i32)
-DEF_HELPER_2(wsr_lend, void, env, i32)
#ifndef CONFIG_USER_ONLY
DEF_HELPER_1(simcall, void, env)
#endif
-DEF_HELPER_1(dump_state, void, env)
#ifndef CONFIG_USER_ONLY
DEF_HELPER_3(waiti, void, env, i32, i32)
--- /dev/null
+/*
+ * Copyright (c) 2011 - 2019, Max Filippov, Open Source and Linux Lab.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the Open Source and Linux Lab nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/main-loop.h"
+#include "qemu/units.h"
+#include "cpu.h"
+#include "exec/helper-proto.h"
+#include "qemu/host-utils.h"
+#include "exec/exec-all.h"
+#include "exec/cpu_ldst.h"
+
+void HELPER(itlb_hit_test)(CPUXtensaState *env, uint32_t vaddr)
+{
+ /*
+ * Attempt the memory load; we don't care about the result but
+ * only the side-effects (ie any MMU or other exception)
+ */
+ cpu_ldub_code_ra(env, vaddr, GETPC());
+}
+
+void HELPER(wsr_rasid)(CPUXtensaState *env, uint32_t v)
+{
+ XtensaCPU *cpu = xtensa_env_get_cpu(env);
+
+ v = (v & 0xffffff00) | 0x1;
+ if (v != env->sregs[RASID]) {
+ env->sregs[RASID] = v;
+ tlb_flush(CPU(cpu));
+ }
+}
+
+static uint32_t get_page_size(const CPUXtensaState *env,
+ bool dtlb, uint32_t way)
+{
+ uint32_t tlbcfg = env->sregs[dtlb ? DTLBCFG : ITLBCFG];
+
+ switch (way) {
+ case 4:
+ return (tlbcfg >> 16) & 0x3;
+
+ case 5:
+ return (tlbcfg >> 20) & 0x1;
+
+ case 6:
+ return (tlbcfg >> 24) & 0x1;
+
+ default:
+ return 0;
+ }
+}
+
+/*!
+ * Get bit mask for the virtual address bits translated by the TLB way
+ */
+uint32_t xtensa_tlb_get_addr_mask(const CPUXtensaState *env,
+ bool dtlb, uint32_t way)
+{
+ if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
+ bool varway56 = dtlb ?
+ env->config->dtlb.varway56 :
+ env->config->itlb.varway56;
+
+ switch (way) {
+ case 4:
+ return 0xfff00000 << get_page_size(env, dtlb, way) * 2;
+
+ case 5:
+ if (varway56) {
+ return 0xf8000000 << get_page_size(env, dtlb, way);
+ } else {
+ return 0xf8000000;
+ }
+
+ case 6:
+ if (varway56) {
+ return 0xf0000000 << (1 - get_page_size(env, dtlb, way));
+ } else {
+ return 0xf0000000;
+ }
+
+ default:
+ return 0xfffff000;
+ }
+ } else {
+ return REGION_PAGE_MASK;
+ }
+}
+
+/*!
+ * Get bit mask for the 'VPN without index' field.
+ * See ISA, 4.6.5.6, data format for RxTLB0
+ */
+static uint32_t get_vpn_mask(const CPUXtensaState *env, bool dtlb, uint32_t way)
+{
+ if (way < 4) {
+ bool is32 = (dtlb ?
+ env->config->dtlb.nrefillentries :
+ env->config->itlb.nrefillentries) == 32;
+ return is32 ? 0xffff8000 : 0xffffc000;
+ } else if (way == 4) {
+ return xtensa_tlb_get_addr_mask(env, dtlb, way) << 2;
+ } else if (way <= 6) {
+ uint32_t mask = xtensa_tlb_get_addr_mask(env, dtlb, way);
+ bool varway56 = dtlb ?
+ env->config->dtlb.varway56 :
+ env->config->itlb.varway56;
+
+ if (varway56) {
+ return mask << (way == 5 ? 2 : 3);
+ } else {
+ return mask << 1;
+ }
+ } else {
+ return 0xfffff000;
+ }
+}
+
+/*!
+ * Split virtual address into VPN (with index) and entry index
+ * for the given TLB way
+ */
+void split_tlb_entry_spec_way(const CPUXtensaState *env, uint32_t v, bool dtlb,
+ uint32_t *vpn, uint32_t wi, uint32_t *ei)
+{
+ bool varway56 = dtlb ?
+ env->config->dtlb.varway56 :
+ env->config->itlb.varway56;
+
+ if (!dtlb) {
+ wi &= 7;
+ }
+
+ if (wi < 4) {
+ bool is32 = (dtlb ?
+ env->config->dtlb.nrefillentries :
+ env->config->itlb.nrefillentries) == 32;
+ *ei = (v >> 12) & (is32 ? 0x7 : 0x3);
+ } else {
+ switch (wi) {
+ case 4:
+ {
+ uint32_t eibase = 20 + get_page_size(env, dtlb, wi) * 2;
+ *ei = (v >> eibase) & 0x3;
+ }
+ break;
+
+ case 5:
+ if (varway56) {
+ uint32_t eibase = 27 + get_page_size(env, dtlb, wi);
+ *ei = (v >> eibase) & 0x3;
+ } else {
+ *ei = (v >> 27) & 0x1;
+ }
+ break;
+
+ case 6:
+ if (varway56) {
+ uint32_t eibase = 29 - get_page_size(env, dtlb, wi);
+ *ei = (v >> eibase) & 0x7;
+ } else {
+ *ei = (v >> 28) & 0x1;
+ }
+ break;
+
+ default:
+ *ei = 0;
+ break;
+ }
+ }
+ *vpn = v & xtensa_tlb_get_addr_mask(env, dtlb, wi);
+}
+
+/*!
+ * Split TLB address into TLB way, entry index and VPN (with index).
+ * See ISA, 4.6.5.5 - 4.6.5.8 for the TLB addressing format
+ */
+static void split_tlb_entry_spec(CPUXtensaState *env, uint32_t v, bool dtlb,
+ uint32_t *vpn, uint32_t *wi, uint32_t *ei)
+{
+ if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
+ *wi = v & (dtlb ? 0xf : 0x7);
+ split_tlb_entry_spec_way(env, v, dtlb, vpn, *wi, ei);
+ } else {
+ *vpn = v & REGION_PAGE_MASK;
+ *wi = 0;
+ *ei = (v >> 29) & 0x7;
+ }
+}
+
+static xtensa_tlb_entry *get_tlb_entry(CPUXtensaState *env,
+ uint32_t v, bool dtlb, uint32_t *pwi)
+{
+ uint32_t vpn;
+ uint32_t wi;
+ uint32_t ei;
+
+ split_tlb_entry_spec(env, v, dtlb, &vpn, &wi, &ei);
+ if (pwi) {
+ *pwi = wi;
+ }
+ return xtensa_tlb_get_entry(env, dtlb, wi, ei);
+}
+
+uint32_t HELPER(rtlb0)(CPUXtensaState *env, uint32_t v, uint32_t dtlb)
+{
+ if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
+ uint32_t wi;
+ const xtensa_tlb_entry *entry = get_tlb_entry(env, v, dtlb, &wi);
+ return (entry->vaddr & get_vpn_mask(env, dtlb, wi)) | entry->asid;
+ } else {
+ return v & REGION_PAGE_MASK;
+ }
+}
+
+uint32_t HELPER(rtlb1)(CPUXtensaState *env, uint32_t v, uint32_t dtlb)
+{
+ const xtensa_tlb_entry *entry = get_tlb_entry(env, v, dtlb, NULL);
+ return entry->paddr | entry->attr;
+}
+
+void HELPER(itlb)(CPUXtensaState *env, uint32_t v, uint32_t dtlb)
+{
+ if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
+ uint32_t wi;
+ xtensa_tlb_entry *entry = get_tlb_entry(env, v, dtlb, &wi);
+ if (entry->variable && entry->asid) {
+ tlb_flush_page(CPU(xtensa_env_get_cpu(env)), entry->vaddr);
+ entry->asid = 0;
+ }
+ }
+}
+
+uint32_t HELPER(ptlb)(CPUXtensaState *env, uint32_t v, uint32_t dtlb)
+{
+ if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
+ uint32_t wi;
+ uint32_t ei;
+ uint8_t ring;
+ int res = xtensa_tlb_lookup(env, v, dtlb, &wi, &ei, &ring);
+
+ switch (res) {
+ case 0:
+ if (ring >= xtensa_get_ring(env)) {
+ return (v & 0xfffff000) | wi | (dtlb ? 0x10 : 0x8);
+ }
+ break;
+
+ case INST_TLB_MULTI_HIT_CAUSE:
+ case LOAD_STORE_TLB_MULTI_HIT_CAUSE:
+ HELPER(exception_cause_vaddr)(env, env->pc, res, v);
+ break;
+ }
+ return 0;
+ } else {
+ return (v & REGION_PAGE_MASK) | 0x1;
+ }
+}
+
+void xtensa_tlb_set_entry_mmu(const CPUXtensaState *env,
+ xtensa_tlb_entry *entry, bool dtlb,
+ unsigned wi, unsigned ei, uint32_t vpn,
+ uint32_t pte)
+{
+ entry->vaddr = vpn;
+ entry->paddr = pte & xtensa_tlb_get_addr_mask(env, dtlb, wi);
+ entry->asid = (env->sregs[RASID] >> ((pte >> 1) & 0x18)) & 0xff;
+ entry->attr = pte & 0xf;
+}
+
+void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb,
+ unsigned wi, unsigned ei, uint32_t vpn, uint32_t pte)
+{
+ XtensaCPU *cpu = xtensa_env_get_cpu(env);
+ CPUState *cs = CPU(cpu);
+ xtensa_tlb_entry *entry = xtensa_tlb_get_entry(env, dtlb, wi, ei);
+
+ if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
+ if (entry->variable) {
+ if (entry->asid) {
+ tlb_flush_page(cs, entry->vaddr);
+ }
+ xtensa_tlb_set_entry_mmu(env, entry, dtlb, wi, ei, vpn, pte);
+ tlb_flush_page(cs, entry->vaddr);
+ } else {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s %d, %d, %d trying to set immutable entry\n",
+ __func__, dtlb, wi, ei);
+ }
+ } else {
+ tlb_flush_page(cs, entry->vaddr);
+ if (xtensa_option_enabled(env->config,
+ XTENSA_OPTION_REGION_TRANSLATION)) {
+ entry->paddr = pte & REGION_PAGE_MASK;
+ }
+ entry->attr = pte & 0xf;
+ }
+}
+
+void HELPER(wtlb)(CPUXtensaState *env, uint32_t p, uint32_t v, uint32_t dtlb)
+{
+ uint32_t vpn;
+ uint32_t wi;
+ uint32_t ei;
+ split_tlb_entry_spec(env, v, dtlb, &vpn, &wi, &ei);
+ xtensa_tlb_set_entry(env, dtlb, wi, ei, vpn, p);
+}
+
+hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
+{
+ XtensaCPU *cpu = XTENSA_CPU(cs);
+ uint32_t paddr;
+ uint32_t page_size;
+ unsigned access;
+
+ if (xtensa_get_physical_addr(&cpu->env, false, addr, 0, 0,
+ &paddr, &page_size, &access) == 0) {
+ return paddr;
+ }
+ if (xtensa_get_physical_addr(&cpu->env, false, addr, 2, 0,
+ &paddr, &page_size, &access) == 0) {
+ return paddr;
+ }
+ return ~0;
+}
+
+static void reset_tlb_mmu_all_ways(CPUXtensaState *env,
+ const xtensa_tlb *tlb,
+ xtensa_tlb_entry entry[][MAX_TLB_WAY_SIZE])
+{
+ unsigned wi, ei;
+
+ for (wi = 0; wi < tlb->nways; ++wi) {
+ for (ei = 0; ei < tlb->way_size[wi]; ++ei) {
+ entry[wi][ei].asid = 0;
+ entry[wi][ei].variable = true;
+ }
+ }
+}
+
+static void reset_tlb_mmu_ways56(CPUXtensaState *env,
+ const xtensa_tlb *tlb,
+ xtensa_tlb_entry entry[][MAX_TLB_WAY_SIZE])
+{
+ if (!tlb->varway56) {
+ static const xtensa_tlb_entry way5[] = {
+ {
+ .vaddr = 0xd0000000,
+ .paddr = 0,
+ .asid = 1,
+ .attr = 7,
+ .variable = false,
+ }, {
+ .vaddr = 0xd8000000,
+ .paddr = 0,
+ .asid = 1,
+ .attr = 3,
+ .variable = false,
+ }
+ };
+ static const xtensa_tlb_entry way6[] = {
+ {
+ .vaddr = 0xe0000000,
+ .paddr = 0xf0000000,
+ .asid = 1,
+ .attr = 7,
+ .variable = false,
+ }, {
+ .vaddr = 0xf0000000,
+ .paddr = 0xf0000000,
+ .asid = 1,
+ .attr = 3,
+ .variable = false,
+ }
+ };
+ memcpy(entry[5], way5, sizeof(way5));
+ memcpy(entry[6], way6, sizeof(way6));
+ } else {
+ uint32_t ei;
+ for (ei = 0; ei < 8; ++ei) {
+ entry[6][ei].vaddr = ei << 29;
+ entry[6][ei].paddr = ei << 29;
+ entry[6][ei].asid = 1;
+ entry[6][ei].attr = 3;
+ }
+ }
+}
+
+static void reset_tlb_region_way0(CPUXtensaState *env,
+ xtensa_tlb_entry entry[][MAX_TLB_WAY_SIZE])
+{
+ unsigned ei;
+
+ for (ei = 0; ei < 8; ++ei) {
+ entry[0][ei].vaddr = ei << 29;
+ entry[0][ei].paddr = ei << 29;
+ entry[0][ei].asid = 1;
+ entry[0][ei].attr = 2;
+ entry[0][ei].variable = true;
+ }
+}
+
+void reset_mmu(CPUXtensaState *env)
+{
+ if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
+ env->sregs[RASID] = 0x04030201;
+ env->sregs[ITLBCFG] = 0;
+ env->sregs[DTLBCFG] = 0;
+ env->autorefill_idx = 0;
+ reset_tlb_mmu_all_ways(env, &env->config->itlb, env->itlb);
+ reset_tlb_mmu_all_ways(env, &env->config->dtlb, env->dtlb);
+ reset_tlb_mmu_ways56(env, &env->config->itlb, env->itlb);
+ reset_tlb_mmu_ways56(env, &env->config->dtlb, env->dtlb);
+ } else {
+ reset_tlb_region_way0(env, env->itlb);
+ reset_tlb_region_way0(env, env->dtlb);
+ }
+}
+
+static unsigned get_ring(const CPUXtensaState *env, uint8_t asid)
+{
+ unsigned i;
+ for (i = 0; i < 4; ++i) {
+ if (((env->sregs[RASID] >> i * 8) & 0xff) == asid) {
+ return i;
+ }
+ }
+ return 0xff;
+}
+
+/*!
+ * Lookup xtensa TLB for the given virtual address.
+ * See ISA, 4.6.2.2
+ *
+ * \param pwi: [out] way index
+ * \param pei: [out] entry index
+ * \param pring: [out] access ring
+ * \return 0 if ok, exception cause code otherwise
+ */
+int xtensa_tlb_lookup(const CPUXtensaState *env, uint32_t addr, bool dtlb,
+ uint32_t *pwi, uint32_t *pei, uint8_t *pring)
+{
+ const xtensa_tlb *tlb = dtlb ?
+ &env->config->dtlb : &env->config->itlb;
+ const xtensa_tlb_entry (*entry)[MAX_TLB_WAY_SIZE] = dtlb ?
+ env->dtlb : env->itlb;
+
+ int nhits = 0;
+ unsigned wi;
+
+ for (wi = 0; wi < tlb->nways; ++wi) {
+ uint32_t vpn;
+ uint32_t ei;
+ split_tlb_entry_spec_way(env, addr, dtlb, &vpn, wi, &ei);
+ if (entry[wi][ei].vaddr == vpn && entry[wi][ei].asid) {
+ unsigned ring = get_ring(env, entry[wi][ei].asid);
+ if (ring < 4) {
+ if (++nhits > 1) {
+ return dtlb ?
+ LOAD_STORE_TLB_MULTI_HIT_CAUSE :
+ INST_TLB_MULTI_HIT_CAUSE;
+ }
+ *pwi = wi;
+ *pei = ei;
+ *pring = ring;
+ }
+ }
+ }
+ return nhits ? 0 :
+ (dtlb ? LOAD_STORE_TLB_MISS_CAUSE : INST_TLB_MISS_CAUSE);
+}
+
+/*!
+ * Convert MMU ATTR to PAGE_{READ,WRITE,EXEC} mask.
+ * See ISA, 4.6.5.10
+ */
+static unsigned mmu_attr_to_access(uint32_t attr)
+{
+ unsigned access = 0;
+
+ if (attr < 12) {
+ access |= PAGE_READ;
+ if (attr & 0x1) {
+ access |= PAGE_EXEC;
+ }
+ if (attr & 0x2) {
+ access |= PAGE_WRITE;
+ }
+
+ switch (attr & 0xc) {
+ case 0:
+ access |= PAGE_CACHE_BYPASS;
+ break;
+
+ case 4:
+ access |= PAGE_CACHE_WB;
+ break;
+
+ case 8:
+ access |= PAGE_CACHE_WT;
+ break;
+ }
+ } else if (attr == 13) {
+ access |= PAGE_READ | PAGE_WRITE | PAGE_CACHE_ISOLATE;
+ }
+ return access;
+}
+
+/*!
+ * Convert region protection ATTR to PAGE_{READ,WRITE,EXEC} mask.
+ * See ISA, 4.6.3.3
+ */
+static unsigned region_attr_to_access(uint32_t attr)
+{
+ static const unsigned access[16] = {
+ [0] = PAGE_READ | PAGE_WRITE | PAGE_CACHE_WT,
+ [1] = PAGE_READ | PAGE_WRITE | PAGE_EXEC | PAGE_CACHE_WT,
+ [2] = PAGE_READ | PAGE_WRITE | PAGE_EXEC | PAGE_CACHE_BYPASS,
+ [3] = PAGE_EXEC | PAGE_CACHE_WB,
+ [4] = PAGE_READ | PAGE_WRITE | PAGE_EXEC | PAGE_CACHE_WB,
+ [5] = PAGE_READ | PAGE_WRITE | PAGE_EXEC | PAGE_CACHE_WB,
+ [14] = PAGE_READ | PAGE_WRITE | PAGE_CACHE_ISOLATE,
+ };
+
+ return access[attr & 0xf];
+}
+
+/*!
+ * Convert cacheattr to PAGE_{READ,WRITE,EXEC} mask.
+ * See ISA, A.2.14 The Cache Attribute Register
+ */
+static unsigned cacheattr_attr_to_access(uint32_t attr)
+{
+ static const unsigned access[16] = {
+ [0] = PAGE_READ | PAGE_WRITE | PAGE_CACHE_WT,
+ [1] = PAGE_READ | PAGE_WRITE | PAGE_EXEC | PAGE_CACHE_WT,
+ [2] = PAGE_READ | PAGE_WRITE | PAGE_EXEC | PAGE_CACHE_BYPASS,
+ [3] = PAGE_EXEC | PAGE_CACHE_WB,
+ [4] = PAGE_READ | PAGE_WRITE | PAGE_EXEC | PAGE_CACHE_WB,
+ [14] = PAGE_READ | PAGE_WRITE | PAGE_CACHE_ISOLATE,
+ };
+
+ return access[attr & 0xf];
+}
+
+static bool is_access_granted(unsigned access, int is_write)
+{
+ switch (is_write) {
+ case 0:
+ return access & PAGE_READ;
+
+ case 1:
+ return access & PAGE_WRITE;
+
+ case 2:
+ return access & PAGE_EXEC;
+
+ default:
+ return 0;
+ }
+}
+
+static bool get_pte(CPUXtensaState *env, uint32_t vaddr, uint32_t *pte);
+
+static int get_physical_addr_mmu(CPUXtensaState *env, bool update_tlb,
+ uint32_t vaddr, int is_write, int mmu_idx,
+ uint32_t *paddr, uint32_t *page_size,
+ unsigned *access, bool may_lookup_pt)
+{
+ bool dtlb = is_write != 2;
+ uint32_t wi;
+ uint32_t ei;
+ uint8_t ring;
+ uint32_t vpn;
+ uint32_t pte;
+ const xtensa_tlb_entry *entry = NULL;
+ xtensa_tlb_entry tmp_entry;
+ int ret = xtensa_tlb_lookup(env, vaddr, dtlb, &wi, &ei, &ring);
+
+ if ((ret == INST_TLB_MISS_CAUSE || ret == LOAD_STORE_TLB_MISS_CAUSE) &&
+ may_lookup_pt && get_pte(env, vaddr, &pte)) {
+ ring = (pte >> 4) & 0x3;
+ wi = 0;
+ split_tlb_entry_spec_way(env, vaddr, dtlb, &vpn, wi, &ei);
+
+ if (update_tlb) {
+ wi = ++env->autorefill_idx & 0x3;
+ xtensa_tlb_set_entry(env, dtlb, wi, ei, vpn, pte);
+ env->sregs[EXCVADDR] = vaddr;
+ qemu_log_mask(CPU_LOG_MMU, "%s: autorefill(%08x): %08x -> %08x\n",
+ __func__, vaddr, vpn, pte);
+ } else {
+ xtensa_tlb_set_entry_mmu(env, &tmp_entry, dtlb, wi, ei, vpn, pte);
+ entry = &tmp_entry;
+ }
+ ret = 0;
+ }
+ if (ret != 0) {
+ return ret;
+ }
+
+ if (entry == NULL) {
+ entry = xtensa_tlb_get_entry(env, dtlb, wi, ei);
+ }
+
+ if (ring < mmu_idx) {
+ return dtlb ?
+ LOAD_STORE_PRIVILEGE_CAUSE :
+ INST_FETCH_PRIVILEGE_CAUSE;
+ }
+
+ *access = mmu_attr_to_access(entry->attr) &
+ ~(dtlb ? PAGE_EXEC : PAGE_READ | PAGE_WRITE);
+ if (!is_access_granted(*access, is_write)) {
+ return dtlb ?
+ (is_write ?
+ STORE_PROHIBITED_CAUSE :
+ LOAD_PROHIBITED_CAUSE) :
+ INST_FETCH_PROHIBITED_CAUSE;
+ }
+
+ *paddr = entry->paddr | (vaddr & ~xtensa_tlb_get_addr_mask(env, dtlb, wi));
+ *page_size = ~xtensa_tlb_get_addr_mask(env, dtlb, wi) + 1;
+
+ return 0;
+}
+
+static bool get_pte(CPUXtensaState *env, uint32_t vaddr, uint32_t *pte)
+{
+ CPUState *cs = CPU(xtensa_env_get_cpu(env));
+ uint32_t paddr;
+ uint32_t page_size;
+ unsigned access;
+ uint32_t pt_vaddr =
+ (env->sregs[PTEVADDR] | (vaddr >> 10)) & 0xfffffffc;
+ int ret = get_physical_addr_mmu(env, false, pt_vaddr, 0, 0,
+ &paddr, &page_size, &access, false);
+
+ if (ret == 0) {
+ qemu_log_mask(CPU_LOG_MMU,
+ "%s: autorefill(%08x): PTE va = %08x, pa = %08x\n",
+ __func__, vaddr, pt_vaddr, paddr);
+ } else {
+ qemu_log_mask(CPU_LOG_MMU,
+ "%s: autorefill(%08x): PTE va = %08x, failed (%d)\n",
+ __func__, vaddr, pt_vaddr, ret);
+ }
+
+ if (ret == 0) {
+ MemTxResult result;
+
+ *pte = address_space_ldl(cs->as, paddr, MEMTXATTRS_UNSPECIFIED,
+ &result);
+ if (result != MEMTX_OK) {
+ qemu_log_mask(CPU_LOG_MMU,
+ "%s: couldn't load PTE: transaction failed (%u)\n",
+ __func__, (unsigned)result);
+ ret = 1;
+ }
+ }
+ return ret == 0;
+}
+
+static int get_physical_addr_region(CPUXtensaState *env,
+ uint32_t vaddr, int is_write, int mmu_idx,
+ uint32_t *paddr, uint32_t *page_size,
+ unsigned *access)
+{
+ bool dtlb = is_write != 2;
+ uint32_t wi = 0;
+ uint32_t ei = (vaddr >> 29) & 0x7;
+ const xtensa_tlb_entry *entry =
+ xtensa_tlb_get_entry(env, dtlb, wi, ei);
+
+ *access = region_attr_to_access(entry->attr);
+ if (!is_access_granted(*access, is_write)) {
+ return dtlb ?
+ (is_write ?
+ STORE_PROHIBITED_CAUSE :
+ LOAD_PROHIBITED_CAUSE) :
+ INST_FETCH_PROHIBITED_CAUSE;
+ }
+
+ *paddr = entry->paddr | (vaddr & ~REGION_PAGE_MASK);
+ *page_size = ~REGION_PAGE_MASK + 1;
+
+ return 0;
+}
+
+/*!
+ * Convert virtual address to physical addr.
+ * MMU may issue pagewalk and change xtensa autorefill TLB way entry.
+ *
+ * \return 0 if ok, exception cause code otherwise
+ */
+int xtensa_get_physical_addr(CPUXtensaState *env, bool update_tlb,
+ uint32_t vaddr, int is_write, int mmu_idx,
+ uint32_t *paddr, uint32_t *page_size,
+ unsigned *access)
+{
+ if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
+ return get_physical_addr_mmu(env, update_tlb,
+ vaddr, is_write, mmu_idx, paddr,
+ page_size, access, true);
+ } else if (xtensa_option_bits_enabled(env->config,
+ XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_PROTECTION) |
+ XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_TRANSLATION))) {
+ return get_physical_addr_region(env, vaddr, is_write, mmu_idx,
+ paddr, page_size, access);
+ } else {
+ *paddr = vaddr;
+ *page_size = TARGET_PAGE_SIZE;
+ *access = cacheattr_attr_to_access(env->sregs[CACHEATTR] >>
+ ((vaddr & 0xe0000000) >> 27));
+ return 0;
+ }
+}
+
+static void dump_tlb(FILE *f, fprintf_function cpu_fprintf,
+ CPUXtensaState *env, bool dtlb)
+{
+ unsigned wi, ei;
+ const xtensa_tlb *conf =
+ dtlb ? &env->config->dtlb : &env->config->itlb;
+ unsigned (*attr_to_access)(uint32_t) =
+ xtensa_option_enabled(env->config, XTENSA_OPTION_MMU) ?
+ mmu_attr_to_access : region_attr_to_access;
+
+ for (wi = 0; wi < conf->nways; ++wi) {
+ uint32_t sz = ~xtensa_tlb_get_addr_mask(env, dtlb, wi) + 1;
+ const char *sz_text;
+ bool print_header = true;
+
+ if (sz >= 0x100000) {
+ sz /= MiB;
+ sz_text = "MB";
+ } else {
+ sz /= KiB;
+ sz_text = "KB";
+ }
+
+ for (ei = 0; ei < conf->way_size[wi]; ++ei) {
+ const xtensa_tlb_entry *entry =
+ xtensa_tlb_get_entry(env, dtlb, wi, ei);
+
+ if (entry->asid) {
+ static const char * const cache_text[8] = {
+ [PAGE_CACHE_BYPASS >> PAGE_CACHE_SHIFT] = "Bypass",
+ [PAGE_CACHE_WT >> PAGE_CACHE_SHIFT] = "WT",
+ [PAGE_CACHE_WB >> PAGE_CACHE_SHIFT] = "WB",
+ [PAGE_CACHE_ISOLATE >> PAGE_CACHE_SHIFT] = "Isolate",
+ };
+ unsigned access = attr_to_access(entry->attr);
+ unsigned cache_idx = (access & PAGE_CACHE_MASK) >>
+ PAGE_CACHE_SHIFT;
+
+ if (print_header) {
+ print_header = false;
+ cpu_fprintf(f, "Way %u (%d %s)\n", wi, sz, sz_text);
+ cpu_fprintf(f,
+ "\tVaddr Paddr ASID Attr RWX Cache\n"
+ "\t---------- ---------- ---- ---- --- -------\n");
+ }
+ cpu_fprintf(f,
+ "\t0x%08x 0x%08x 0x%02x 0x%02x %c%c%c %-7s\n",
+ entry->vaddr,
+ entry->paddr,
+ entry->asid,
+ entry->attr,
+ (access & PAGE_READ) ? 'R' : '-',
+ (access & PAGE_WRITE) ? 'W' : '-',
+ (access & PAGE_EXEC) ? 'X' : '-',
+ cache_text[cache_idx] ?
+ cache_text[cache_idx] : "Invalid");
+ }
+ }
+ }
+}
+
+void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUXtensaState *env)
+{
+ if (xtensa_option_bits_enabled(env->config,
+ XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_PROTECTION) |
+ XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_TRANSLATION) |
+ XTENSA_OPTION_BIT(XTENSA_OPTION_MMU))) {
+
+ cpu_fprintf(f, "ITLB:\n");
+ dump_tlb(f, cpu_fprintf, env, false);
+ cpu_fprintf(f, "\nDTLB:\n");
+ dump_tlb(f, cpu_fprintf, env, true);
+ } else {
+ cpu_fprintf(f, "No TLB for this CPU core\n");
+ }
+}
#include "exec/cpu_ldst.h"
#include "exec/address-spaces.h"
#include "qemu/timer.h"
-#include "fpu/softfloat.h"
#ifndef CONFIG_USER_ONLY
-void xtensa_cpu_do_unaligned_access(CPUState *cs,
- vaddr addr, MMUAccessType access_type,
- int mmu_idx, uintptr_t retaddr)
-{
- XtensaCPU *cpu = XTENSA_CPU(cs);
- CPUXtensaState *env = &cpu->env;
-
- if (xtensa_option_enabled(env->config, XTENSA_OPTION_UNALIGNED_EXCEPTION) &&
- !xtensa_option_enabled(env->config, XTENSA_OPTION_HW_ALIGNMENT)) {
- cpu_restore_state(CPU(cpu), retaddr, true);
- HELPER(exception_cause_vaddr)(env,
- env->pc, LOAD_STORE_ALIGNMENT_CAUSE, addr);
- }
-}
-
-void tlb_fill(CPUState *cs, target_ulong vaddr, int size,
- MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
-{
- XtensaCPU *cpu = XTENSA_CPU(cs);
- CPUXtensaState *env = &cpu->env;
- uint32_t paddr;
- uint32_t page_size;
- unsigned access;
- int ret = xtensa_get_physical_addr(env, true, vaddr, access_type, mmu_idx,
- &paddr, &page_size, &access);
-
- qemu_log_mask(CPU_LOG_MMU, "%s(%08x, %d, %d) -> %08x, ret = %d\n",
- __func__, vaddr, access_type, mmu_idx, paddr, ret);
-
- if (ret == 0) {
- tlb_set_page(cs,
- vaddr & TARGET_PAGE_MASK,
- paddr & TARGET_PAGE_MASK,
- access, mmu_idx, page_size);
- } else {
- cpu_restore_state(cs, retaddr, true);
- HELPER(exception_cause_vaddr)(env, env->pc, ret, vaddr);
- }
-}
-
-void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
- unsigned size, MMUAccessType access_type,
- int mmu_idx, MemTxAttrs attrs,
- MemTxResult response, uintptr_t retaddr)
-{
- XtensaCPU *cpu = XTENSA_CPU(cs);
- CPUXtensaState *env = &cpu->env;
-
- cpu_restore_state(cs, retaddr, true);
- HELPER(exception_cause_vaddr)(env, env->pc,
- access_type == MMU_INST_FETCH ?
- INSTR_PIF_ADDR_ERROR_CAUSE :
- LOAD_STORE_PIF_ADDR_ERROR_CAUSE,
- addr);
-}
-
-static void tb_invalidate_virtual_addr(CPUXtensaState *env, uint32_t vaddr)
-{
- uint32_t paddr;
- uint32_t page_size;
- unsigned access;
- int ret = xtensa_get_physical_addr(env, false, vaddr, 2, 0,
- &paddr, &page_size, &access);
- if (ret == 0) {
- tb_invalidate_phys_addr(&address_space_memory, paddr,
- MEMTXATTRS_UNSPECIFIED);
- }
-}
-
-#else
-
-static void tb_invalidate_virtual_addr(CPUXtensaState *env, uint32_t vaddr)
-{
- tb_invalidate_phys_addr(vaddr);
-}
-
-#endif
-
-void HELPER(exception)(CPUXtensaState *env, uint32_t excp)
-{
- CPUState *cs = CPU(xtensa_env_get_cpu(env));
-
- cs->exception_index = excp;
- if (excp == EXCP_YIELD) {
- env->yield_needed = 0;
- }
- if (excp == EXCP_DEBUG) {
- env->exception_taken = 0;
- }
- cpu_loop_exit(cs);
-}
-
-void HELPER(exception_cause)(CPUXtensaState *env, uint32_t pc, uint32_t cause)
-{
- uint32_t vector;
-
- env->pc = pc;
- if (env->sregs[PS] & PS_EXCM) {
- if (env->config->ndepc) {
- env->sregs[DEPC] = pc;
- } else {
- env->sregs[EPC1] = pc;
- }
- vector = EXC_DOUBLE;
- } else {
- env->sregs[EPC1] = pc;
- vector = (env->sregs[PS] & PS_UM) ? EXC_USER : EXC_KERNEL;
- }
-
- env->sregs[EXCCAUSE] = cause;
- env->sregs[PS] |= PS_EXCM;
-
- HELPER(exception)(env, vector);
-}
-
-void HELPER(exception_cause_vaddr)(CPUXtensaState *env,
- uint32_t pc, uint32_t cause, uint32_t vaddr)
-{
- env->sregs[EXCVADDR] = vaddr;
- HELPER(exception_cause)(env, pc, cause);
-}
-
-void debug_exception_env(CPUXtensaState *env, uint32_t cause)
-{
- if (xtensa_get_cintlevel(env) < env->config->debug_level) {
- HELPER(debug_exception)(env, env->pc, cause);
- }
-}
-
-void HELPER(debug_exception)(CPUXtensaState *env, uint32_t pc, uint32_t cause)
-{
- unsigned level = env->config->debug_level;
-
- env->pc = pc;
- env->sregs[DEBUGCAUSE] = cause;
- env->sregs[EPC1 + level - 1] = pc;
- env->sregs[EPS2 + level - 2] = env->sregs[PS];
- env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) | PS_EXCM |
- (level << PS_INTLEVEL_SHIFT);
- HELPER(exception)(env, EXC_DEBUG);
-}
-
-static void copy_window_from_phys(CPUXtensaState *env,
- uint32_t window, uint32_t phys, uint32_t n)
-{
- assert(phys < env->config->nareg);
- if (phys + n <= env->config->nareg) {
- memcpy(env->regs + window, env->phys_regs + phys,
- n * sizeof(uint32_t));
- } else {
- uint32_t n1 = env->config->nareg - phys;
- memcpy(env->regs + window, env->phys_regs + phys,
- n1 * sizeof(uint32_t));
- memcpy(env->regs + window + n1, env->phys_regs,
- (n - n1) * sizeof(uint32_t));
- }
-}
-
-static void copy_phys_from_window(CPUXtensaState *env,
- uint32_t phys, uint32_t window, uint32_t n)
-{
- assert(phys < env->config->nareg);
- if (phys + n <= env->config->nareg) {
- memcpy(env->phys_regs + phys, env->regs + window,
- n * sizeof(uint32_t));
- } else {
- uint32_t n1 = env->config->nareg - phys;
- memcpy(env->phys_regs + phys, env->regs + window,
- n1 * sizeof(uint32_t));
- memcpy(env->phys_regs, env->regs + window + n1,
- (n - n1) * sizeof(uint32_t));
- }
-}
-
-
-static inline unsigned windowbase_bound(unsigned a, const CPUXtensaState *env)
-{
- return a & (env->config->nareg / 4 - 1);
-}
-
-static inline unsigned windowstart_bit(unsigned a, const CPUXtensaState *env)
-{
- return 1 << windowbase_bound(a, env);
-}
-
-void xtensa_sync_window_from_phys(CPUXtensaState *env)
-{
- copy_window_from_phys(env, 0, env->sregs[WINDOW_BASE] * 4, 16);
-}
-
-void xtensa_sync_phys_from_window(CPUXtensaState *env)
-{
- copy_phys_from_window(env, env->sregs[WINDOW_BASE] * 4, 0, 16);
-}
-
-static void xtensa_rotate_window_abs(CPUXtensaState *env, uint32_t position)
-{
- xtensa_sync_phys_from_window(env);
- env->sregs[WINDOW_BASE] = windowbase_bound(position, env);
- xtensa_sync_window_from_phys(env);
-}
-
-void xtensa_rotate_window(CPUXtensaState *env, uint32_t delta)
-{
- xtensa_rotate_window_abs(env, env->sregs[WINDOW_BASE] + delta);
-}
-
-void HELPER(wsr_windowbase)(CPUXtensaState *env, uint32_t v)
-{
- xtensa_rotate_window_abs(env, v);
-}
-
-void HELPER(entry)(CPUXtensaState *env, uint32_t pc, uint32_t s, uint32_t imm)
-{
- int callinc = (env->sregs[PS] & PS_CALLINC) >> PS_CALLINC_SHIFT;
-
- env->regs[(callinc << 2) | (s & 3)] = env->regs[s] - imm;
- xtensa_rotate_window(env, callinc);
- env->sregs[WINDOW_START] |=
- windowstart_bit(env->sregs[WINDOW_BASE], env);
-}
-
-void HELPER(window_check)(CPUXtensaState *env, uint32_t pc, uint32_t w)
-{
- uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
- uint32_t windowstart = xtensa_replicate_windowstart(env) >>
- (env->sregs[WINDOW_BASE] + 1);
- uint32_t n = ctz32(windowstart) + 1;
-
- assert(n <= w);
-
- xtensa_rotate_window(env, n);
- env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) |
- (windowbase << PS_OWB_SHIFT) | PS_EXCM;
- env->sregs[EPC1] = env->pc = pc;
-
- switch (ctz32(windowstart >> n)) {
- case 0:
- HELPER(exception)(env, EXC_WINDOW_OVERFLOW4);
- break;
- case 1:
- HELPER(exception)(env, EXC_WINDOW_OVERFLOW8);
- break;
- default:
- HELPER(exception)(env, EXC_WINDOW_OVERFLOW12);
- break;
- }
-}
-
-void HELPER(test_ill_retw)(CPUXtensaState *env, uint32_t pc)
-{
- int n = (env->regs[0] >> 30) & 0x3;
- int m = 0;
- uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
- uint32_t windowstart = env->sregs[WINDOW_START];
-
- if (windowstart & windowstart_bit(windowbase - 1, env)) {
- m = 1;
- } else if (windowstart & windowstart_bit(windowbase - 2, env)) {
- m = 2;
- } else if (windowstart & windowstart_bit(windowbase - 3, env)) {
- m = 3;
- }
-
- if (n == 0 || (m != 0 && m != n)) {
- qemu_log_mask(LOG_GUEST_ERROR, "Illegal retw instruction(pc = %08x), "
- "PS = %08x, m = %d, n = %d\n",
- pc, env->sregs[PS], m, n);
- HELPER(exception_cause)(env, pc, ILLEGAL_INSTRUCTION_CAUSE);
- }
-}
-
-void HELPER(test_underflow_retw)(CPUXtensaState *env, uint32_t pc)
-{
- int n = (env->regs[0] >> 30) & 0x3;
-
- if (!(env->sregs[WINDOW_START] &
- windowstart_bit(env->sregs[WINDOW_BASE] - n, env))) {
- uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
-
- xtensa_rotate_window(env, -n);
- /* window underflow */
- env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) |
- (windowbase << PS_OWB_SHIFT) | PS_EXCM;
- env->sregs[EPC1] = env->pc = pc;
-
- if (n == 1) {
- HELPER(exception)(env, EXC_WINDOW_UNDERFLOW4);
- } else if (n == 2) {
- HELPER(exception)(env, EXC_WINDOW_UNDERFLOW8);
- } else if (n == 3) {
- HELPER(exception)(env, EXC_WINDOW_UNDERFLOW12);
- }
- }
-}
-
-uint32_t HELPER(retw)(CPUXtensaState *env, uint32_t pc)
-{
- int n = (env->regs[0] >> 30) & 0x3;
- uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
- uint32_t ret_pc = (pc & 0xc0000000) | (env->regs[0] & 0x3fffffff);
-
- xtensa_rotate_window(env, -n);
- env->sregs[WINDOW_START] &= ~windowstart_bit(windowbase, env);
- return ret_pc;
-}
-
-void HELPER(rotw)(CPUXtensaState *env, uint32_t imm4)
-{
- xtensa_rotate_window(env, imm4);
-}
-
-void xtensa_restore_owb(CPUXtensaState *env)
-{
- xtensa_rotate_window_abs(env, (env->sregs[PS] & PS_OWB) >> PS_OWB_SHIFT);
-}
-
-void HELPER(restore_owb)(CPUXtensaState *env)
-{
- xtensa_restore_owb(env);
-}
-
-void HELPER(movsp)(CPUXtensaState *env, uint32_t pc)
-{
- if ((env->sregs[WINDOW_START] &
- (windowstart_bit(env->sregs[WINDOW_BASE] - 3, env) |
- windowstart_bit(env->sregs[WINDOW_BASE] - 2, env) |
- windowstart_bit(env->sregs[WINDOW_BASE] - 1, env))) == 0) {
- HELPER(exception_cause)(env, pc, ALLOCA_CAUSE);
- }
-}
-
-void HELPER(wsr_lbeg)(CPUXtensaState *env, uint32_t v)
-{
- if (env->sregs[LBEG] != v) {
- tb_invalidate_virtual_addr(env, env->sregs[LEND] - 1);
- env->sregs[LBEG] = v;
- }
-}
-
-void HELPER(wsr_lend)(CPUXtensaState *env, uint32_t v)
-{
- if (env->sregs[LEND] != v) {
- tb_invalidate_virtual_addr(env, env->sregs[LEND] - 1);
- env->sregs[LEND] = v;
- tb_invalidate_virtual_addr(env, env->sregs[LEND] - 1);
- }
-}
-
-void HELPER(dump_state)(CPUXtensaState *env)
-{
- XtensaCPU *cpu = xtensa_env_get_cpu(env);
-
- cpu_dump_state(CPU(cpu), stderr, fprintf, 0);
-}
-
-#ifndef CONFIG_USER_ONLY
-
-void HELPER(waiti)(CPUXtensaState *env, uint32_t pc, uint32_t intlevel)
-{
- CPUState *cpu;
-
- env->pc = pc;
- env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) |
- (intlevel << PS_INTLEVEL_SHIFT);
-
- qemu_mutex_lock_iothread();
- check_interrupts(env);
- qemu_mutex_unlock_iothread();
-
- if (env->pending_irq_level) {
- cpu_loop_exit(CPU(xtensa_env_get_cpu(env)));
- return;
- }
-
- cpu = CPU(xtensa_env_get_cpu(env));
- cpu->halted = 1;
- HELPER(exception)(env, EXCP_HLT);
-}
-
void HELPER(update_ccount)(CPUXtensaState *env)
{
uint64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
env->yield_needed = 1;
}
-void HELPER(check_interrupts)(CPUXtensaState *env)
-{
- qemu_mutex_lock_iothread();
- check_interrupts(env);
- qemu_mutex_unlock_iothread();
-}
-
-void HELPER(itlb_hit_test)(CPUXtensaState *env, uint32_t vaddr)
-{
- /*
- * Attempt the memory load; we don't care about the result but
- * only the side-effects (ie any MMU or other exception)
- */
- cpu_ldub_code_ra(env, vaddr, GETPC());
-}
-
/*!
* Check vaddr accessibility/cache attributes and raise an exception if
* specified by the ATOMCTL SR.
env->sregs[MEMCTL] = v & env->config->memctl_mask;
}
-void HELPER(wsr_rasid)(CPUXtensaState *env, uint32_t v)
-{
- XtensaCPU *cpu = xtensa_env_get_cpu(env);
-
- v = (v & 0xffffff00) | 0x1;
- if (v != env->sregs[RASID]) {
- env->sregs[RASID] = v;
- tlb_flush(CPU(cpu));
- }
-}
-
-static uint32_t get_page_size(const CPUXtensaState *env, bool dtlb, uint32_t way)
-{
- uint32_t tlbcfg = env->sregs[dtlb ? DTLBCFG : ITLBCFG];
-
- switch (way) {
- case 4:
- return (tlbcfg >> 16) & 0x3;
-
- case 5:
- return (tlbcfg >> 20) & 0x1;
-
- case 6:
- return (tlbcfg >> 24) & 0x1;
-
- default:
- return 0;
- }
-}
-
-/*!
- * Get bit mask for the virtual address bits translated by the TLB way
- */
-uint32_t xtensa_tlb_get_addr_mask(const CPUXtensaState *env, bool dtlb, uint32_t way)
-{
- if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
- bool varway56 = dtlb ?
- env->config->dtlb.varway56 :
- env->config->itlb.varway56;
-
- switch (way) {
- case 4:
- return 0xfff00000 << get_page_size(env, dtlb, way) * 2;
-
- case 5:
- if (varway56) {
- return 0xf8000000 << get_page_size(env, dtlb, way);
- } else {
- return 0xf8000000;
- }
-
- case 6:
- if (varway56) {
- return 0xf0000000 << (1 - get_page_size(env, dtlb, way));
- } else {
- return 0xf0000000;
- }
-
- default:
- return 0xfffff000;
- }
- } else {
- return REGION_PAGE_MASK;
- }
-}
-
-/*!
- * Get bit mask for the 'VPN without index' field.
- * See ISA, 4.6.5.6, data format for RxTLB0
- */
-static uint32_t get_vpn_mask(const CPUXtensaState *env, bool dtlb, uint32_t way)
-{
- if (way < 4) {
- bool is32 = (dtlb ?
- env->config->dtlb.nrefillentries :
- env->config->itlb.nrefillentries) == 32;
- return is32 ? 0xffff8000 : 0xffffc000;
- } else if (way == 4) {
- return xtensa_tlb_get_addr_mask(env, dtlb, way) << 2;
- } else if (way <= 6) {
- uint32_t mask = xtensa_tlb_get_addr_mask(env, dtlb, way);
- bool varway56 = dtlb ?
- env->config->dtlb.varway56 :
- env->config->itlb.varway56;
-
- if (varway56) {
- return mask << (way == 5 ? 2 : 3);
- } else {
- return mask << 1;
- }
- } else {
- return 0xfffff000;
- }
-}
-
-/*!
- * Split virtual address into VPN (with index) and entry index
- * for the given TLB way
- */
-void split_tlb_entry_spec_way(const CPUXtensaState *env, uint32_t v, bool dtlb,
- uint32_t *vpn, uint32_t wi, uint32_t *ei)
-{
- bool varway56 = dtlb ?
- env->config->dtlb.varway56 :
- env->config->itlb.varway56;
-
- if (!dtlb) {
- wi &= 7;
- }
-
- if (wi < 4) {
- bool is32 = (dtlb ?
- env->config->dtlb.nrefillentries :
- env->config->itlb.nrefillentries) == 32;
- *ei = (v >> 12) & (is32 ? 0x7 : 0x3);
- } else {
- switch (wi) {
- case 4:
- {
- uint32_t eibase = 20 + get_page_size(env, dtlb, wi) * 2;
- *ei = (v >> eibase) & 0x3;
- }
- break;
-
- case 5:
- if (varway56) {
- uint32_t eibase = 27 + get_page_size(env, dtlb, wi);
- *ei = (v >> eibase) & 0x3;
- } else {
- *ei = (v >> 27) & 0x1;
- }
- break;
-
- case 6:
- if (varway56) {
- uint32_t eibase = 29 - get_page_size(env, dtlb, wi);
- *ei = (v >> eibase) & 0x7;
- } else {
- *ei = (v >> 28) & 0x1;
- }
- break;
-
- default:
- *ei = 0;
- break;
- }
- }
- *vpn = v & xtensa_tlb_get_addr_mask(env, dtlb, wi);
-}
-
-/*!
- * Split TLB address into TLB way, entry index and VPN (with index).
- * See ISA, 4.6.5.5 - 4.6.5.8 for the TLB addressing format
- */
-static void split_tlb_entry_spec(CPUXtensaState *env, uint32_t v, bool dtlb,
- uint32_t *vpn, uint32_t *wi, uint32_t *ei)
-{
- if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
- *wi = v & (dtlb ? 0xf : 0x7);
- split_tlb_entry_spec_way(env, v, dtlb, vpn, *wi, ei);
- } else {
- *vpn = v & REGION_PAGE_MASK;
- *wi = 0;
- *ei = (v >> 29) & 0x7;
- }
-}
-
-static xtensa_tlb_entry *get_tlb_entry(CPUXtensaState *env,
- uint32_t v, bool dtlb, uint32_t *pwi)
-{
- uint32_t vpn;
- uint32_t wi;
- uint32_t ei;
-
- split_tlb_entry_spec(env, v, dtlb, &vpn, &wi, &ei);
- if (pwi) {
- *pwi = wi;
- }
- return xtensa_tlb_get_entry(env, dtlb, wi, ei);
-}
-
-uint32_t HELPER(rtlb0)(CPUXtensaState *env, uint32_t v, uint32_t dtlb)
-{
- if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
- uint32_t wi;
- const xtensa_tlb_entry *entry = get_tlb_entry(env, v, dtlb, &wi);
- return (entry->vaddr & get_vpn_mask(env, dtlb, wi)) | entry->asid;
- } else {
- return v & REGION_PAGE_MASK;
- }
-}
-
-uint32_t HELPER(rtlb1)(CPUXtensaState *env, uint32_t v, uint32_t dtlb)
-{
- const xtensa_tlb_entry *entry = get_tlb_entry(env, v, dtlb, NULL);
- return entry->paddr | entry->attr;
-}
-
-void HELPER(itlb)(CPUXtensaState *env, uint32_t v, uint32_t dtlb)
-{
- if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
- uint32_t wi;
- xtensa_tlb_entry *entry = get_tlb_entry(env, v, dtlb, &wi);
- if (entry->variable && entry->asid) {
- tlb_flush_page(CPU(xtensa_env_get_cpu(env)), entry->vaddr);
- entry->asid = 0;
- }
- }
-}
-
-uint32_t HELPER(ptlb)(CPUXtensaState *env, uint32_t v, uint32_t dtlb)
-{
- if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
- uint32_t wi;
- uint32_t ei;
- uint8_t ring;
- int res = xtensa_tlb_lookup(env, v, dtlb, &wi, &ei, &ring);
-
- switch (res) {
- case 0:
- if (ring >= xtensa_get_ring(env)) {
- return (v & 0xfffff000) | wi | (dtlb ? 0x10 : 0x8);
- }
- break;
-
- case INST_TLB_MULTI_HIT_CAUSE:
- case LOAD_STORE_TLB_MULTI_HIT_CAUSE:
- HELPER(exception_cause_vaddr)(env, env->pc, res, v);
- break;
- }
- return 0;
- } else {
- return (v & REGION_PAGE_MASK) | 0x1;
- }
-}
-
-void xtensa_tlb_set_entry_mmu(const CPUXtensaState *env,
- xtensa_tlb_entry *entry, bool dtlb,
- unsigned wi, unsigned ei, uint32_t vpn, uint32_t pte)
-{
- entry->vaddr = vpn;
- entry->paddr = pte & xtensa_tlb_get_addr_mask(env, dtlb, wi);
- entry->asid = (env->sregs[RASID] >> ((pte >> 1) & 0x18)) & 0xff;
- entry->attr = pte & 0xf;
-}
-
-void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb,
- unsigned wi, unsigned ei, uint32_t vpn, uint32_t pte)
-{
- XtensaCPU *cpu = xtensa_env_get_cpu(env);
- CPUState *cs = CPU(cpu);
- xtensa_tlb_entry *entry = xtensa_tlb_get_entry(env, dtlb, wi, ei);
-
- if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
- if (entry->variable) {
- if (entry->asid) {
- tlb_flush_page(cs, entry->vaddr);
- }
- xtensa_tlb_set_entry_mmu(env, entry, dtlb, wi, ei, vpn, pte);
- tlb_flush_page(cs, entry->vaddr);
- } else {
- qemu_log_mask(LOG_GUEST_ERROR, "%s %d, %d, %d trying to set immutable entry\n",
- __func__, dtlb, wi, ei);
- }
- } else {
- tlb_flush_page(cs, entry->vaddr);
- if (xtensa_option_enabled(env->config,
- XTENSA_OPTION_REGION_TRANSLATION)) {
- entry->paddr = pte & REGION_PAGE_MASK;
- }
- entry->attr = pte & 0xf;
- }
-}
-
-void HELPER(wtlb)(CPUXtensaState *env, uint32_t p, uint32_t v, uint32_t dtlb)
-{
- uint32_t vpn;
- uint32_t wi;
- uint32_t ei;
- split_tlb_entry_spec(env, v, dtlb, &vpn, &wi, &ei);
- xtensa_tlb_set_entry(env, dtlb, wi, ei, vpn, p);
-}
-
-
-void HELPER(wsr_ibreakenable)(CPUXtensaState *env, uint32_t v)
-{
- uint32_t change = v ^ env->sregs[IBREAKENABLE];
- unsigned i;
-
- for (i = 0; i < env->config->nibreak; ++i) {
- if (change & (1 << i)) {
- tb_invalidate_virtual_addr(env, env->sregs[IBREAKA + i]);
- }
- }
- env->sregs[IBREAKENABLE] = v & ((1 << env->config->nibreak) - 1);
-}
-
-void HELPER(wsr_ibreaka)(CPUXtensaState *env, uint32_t i, uint32_t v)
-{
- if (env->sregs[IBREAKENABLE] & (1 << i) && env->sregs[IBREAKA + i] != v) {
- tb_invalidate_virtual_addr(env, env->sregs[IBREAKA + i]);
- tb_invalidate_virtual_addr(env, v);
- }
- env->sregs[IBREAKA + i] = v;
-}
-
-static void set_dbreak(CPUXtensaState *env, unsigned i, uint32_t dbreaka,
- uint32_t dbreakc)
-{
- CPUState *cs = CPU(xtensa_env_get_cpu(env));
- int flags = BP_CPU | BP_STOP_BEFORE_ACCESS;
- uint32_t mask = dbreakc | ~DBREAKC_MASK;
-
- if (env->cpu_watchpoint[i]) {
- cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[i]);
- }
- if (dbreakc & DBREAKC_SB) {
- flags |= BP_MEM_WRITE;
- }
- if (dbreakc & DBREAKC_LB) {
- flags |= BP_MEM_READ;
- }
- /* contiguous mask after inversion is one less than some power of 2 */
- if ((~mask + 1) & ~mask) {
- qemu_log_mask(LOG_GUEST_ERROR, "DBREAKC mask is not contiguous: 0x%08x\n", dbreakc);
- /* cut mask after the first zero bit */
- mask = 0xffffffff << (32 - clo32(mask));
- }
- if (cpu_watchpoint_insert(cs, dbreaka & mask, ~mask + 1,
- flags, &env->cpu_watchpoint[i])) {
- env->cpu_watchpoint[i] = NULL;
- qemu_log_mask(LOG_GUEST_ERROR, "Failed to set data breakpoint at 0x%08x/%d\n",
- dbreaka & mask, ~mask + 1);
- }
-}
-
-void HELPER(wsr_dbreaka)(CPUXtensaState *env, uint32_t i, uint32_t v)
-{
- uint32_t dbreakc = env->sregs[DBREAKC + i];
-
- if ((dbreakc & DBREAKC_SB_LB) &&
- env->sregs[DBREAKA + i] != v) {
- set_dbreak(env, i, v, dbreakc);
- }
- env->sregs[DBREAKA + i] = v;
-}
-
-void HELPER(wsr_dbreakc)(CPUXtensaState *env, uint32_t i, uint32_t v)
-{
- if ((env->sregs[DBREAKC + i] ^ v) & (DBREAKC_SB_LB | DBREAKC_MASK)) {
- if (v & DBREAKC_SB_LB) {
- set_dbreak(env, i, env->sregs[DBREAKA + i], v);
- } else {
- if (env->cpu_watchpoint[i]) {
- CPUState *cs = CPU(xtensa_env_get_cpu(env));
-
- cpu_watchpoint_remove_by_ref(cs, env->cpu_watchpoint[i]);
- env->cpu_watchpoint[i] = NULL;
- }
- }
- }
- env->sregs[DBREAKC + i] = v;
-}
#endif
-void HELPER(wur_fcr)(CPUXtensaState *env, uint32_t v)
-{
- static const int rounding_mode[] = {
- float_round_nearest_even,
- float_round_to_zero,
- float_round_up,
- float_round_down,
- };
-
- env->uregs[FCR] = v & 0xfffff07f;
- set_float_rounding_mode(rounding_mode[v & 3], &env->fp_status);
-}
-
-float32 HELPER(abs_s)(float32 v)
-{
- return float32_abs(v);
-}
-
-float32 HELPER(neg_s)(float32 v)
-{
- return float32_chs(v);
-}
-
-float32 HELPER(add_s)(CPUXtensaState *env, float32 a, float32 b)
-{
- return float32_add(a, b, &env->fp_status);
-}
-
-float32 HELPER(sub_s)(CPUXtensaState *env, float32 a, float32 b)
-{
- return float32_sub(a, b, &env->fp_status);
-}
-
-float32 HELPER(mul_s)(CPUXtensaState *env, float32 a, float32 b)
-{
- return float32_mul(a, b, &env->fp_status);
-}
-
-float32 HELPER(madd_s)(CPUXtensaState *env, float32 a, float32 b, float32 c)
-{
- return float32_muladd(b, c, a, 0,
- &env->fp_status);
-}
-
-float32 HELPER(msub_s)(CPUXtensaState *env, float32 a, float32 b, float32 c)
-{
- return float32_muladd(b, c, a, float_muladd_negate_product,
- &env->fp_status);
-}
-
-uint32_t HELPER(ftoi)(float32 v, uint32_t rounding_mode, uint32_t scale)
-{
- float_status fp_status = {0};
-
- set_float_rounding_mode(rounding_mode, &fp_status);
- return float32_to_int32(
- float32_scalbn(v, scale, &fp_status), &fp_status);
-}
-
-uint32_t HELPER(ftoui)(float32 v, uint32_t rounding_mode, uint32_t scale)
-{
- float_status fp_status = {0};
- float32 res;
-
- set_float_rounding_mode(rounding_mode, &fp_status);
-
- res = float32_scalbn(v, scale, &fp_status);
-
- if (float32_is_neg(v) && !float32_is_any_nan(v)) {
- return float32_to_int32(res, &fp_status);
- } else {
- return float32_to_uint32(res, &fp_status);
- }
-}
-
-float32 HELPER(itof)(CPUXtensaState *env, uint32_t v, uint32_t scale)
-{
- return float32_scalbn(int32_to_float32(v, &env->fp_status),
- (int32_t)scale, &env->fp_status);
-}
-
-float32 HELPER(uitof)(CPUXtensaState *env, uint32_t v, uint32_t scale)
-{
- return float32_scalbn(uint32_to_float32(v, &env->fp_status),
- (int32_t)scale, &env->fp_status);
-}
-
-static inline void set_br(CPUXtensaState *env, bool v, uint32_t br)
-{
- if (v) {
- env->sregs[BR] |= br;
- } else {
- env->sregs[BR] &= ~br;
- }
-}
-
-void HELPER(un_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
-{
- set_br(env, float32_unordered_quiet(a, b, &env->fp_status), br);
-}
-
-void HELPER(oeq_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
-{
- set_br(env, float32_eq_quiet(a, b, &env->fp_status), br);
-}
-
-void HELPER(ueq_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
-{
- int v = float32_compare_quiet(a, b, &env->fp_status);
- set_br(env, v == float_relation_equal || v == float_relation_unordered, br);
-}
-
-void HELPER(olt_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
-{
- set_br(env, float32_lt_quiet(a, b, &env->fp_status), br);
-}
-
-void HELPER(ult_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
-{
- int v = float32_compare_quiet(a, b, &env->fp_status);
- set_br(env, v == float_relation_less || v == float_relation_unordered, br);
-}
-
-void HELPER(ole_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
-{
- set_br(env, float32_le_quiet(a, b, &env->fp_status), br);
-}
-
-void HELPER(ule_s)(CPUXtensaState *env, uint32_t br, float32 a, float32 b)
-{
- int v = float32_compare_quiet(a, b, &env->fp_status);
- set_br(env, v != float_relation_greater, br);
-}
-
uint32_t HELPER(rer)(CPUXtensaState *env, uint32_t addr)
{
#ifndef CONFIG_USER_ONLY
.nareg = XCHAL_NUM_AREGS, \
.ndepc = (XCHAL_XEA_VERSION >= 2), \
.inst_fetch_width = XCHAL_INST_FETCH_WIDTH, \
+ .max_insn_size = XCHAL_MAX_INSTRUCTION_SIZE, \
EXCEPTIONS_SECTION, \
INTERRUPTS_SECTION, \
TLB_SECTION, \
uint32_t pc;
int cring;
int ring;
- uint32_t lbeg;
+ uint32_t lbeg_off;
uint32_t lend;
bool sar_5bit;
static void gen_jumpi(DisasContext *dc, uint32_t dest, int slot)
{
TCGv_i32 tmp = tcg_const_i32(dest);
-#ifndef CONFIG_USER_ONLY
if (((dc->base.pc_first ^ dest) & TARGET_PAGE_MASK) != 0) {
slot = -1;
}
-#endif
gen_jump_slot(dc, tmp, slot);
tcg_temp_free(tmp);
}
static void gen_callwi(DisasContext *dc, int callinc, uint32_t dest, int slot)
{
TCGv_i32 tmp = tcg_const_i32(dest);
-#ifndef CONFIG_USER_ONLY
if (((dc->base.pc_first ^ dest) & TARGET_PAGE_MASK) != 0) {
slot = -1;
}
-#endif
gen_callw_slot(dc, callinc, tmp, slot);
tcg_temp_free(tmp);
}
static bool gen_check_loop_end(DisasContext *dc, int slot)
{
- if (option_enabled(dc, XTENSA_OPTION_LOOP) &&
- !(dc->base.tb->flags & XTENSA_TBFLAG_EXCM) &&
- dc->base.pc_next == dc->lend) {
+ if (dc->base.pc_next == dc->lend) {
TCGLabel *label = gen_new_label();
tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_SR[LCOUNT], 0, label);
tcg_gen_subi_i32(cpu_SR[LCOUNT], cpu_SR[LCOUNT], 1);
- gen_jumpi(dc, dc->lbeg, slot);
+ if (dc->lbeg_off) {
+ gen_jumpi(dc, dc->base.pc_next - dc->lbeg_off, slot);
+ } else {
+ gen_jump(dc, cpu_SR[LBEG]);
+ }
gen_set_label(label);
gen_jumpi(dc, dc->base.pc_next, -1);
return true;
}
}
-static void gen_wsr_lbeg(DisasContext *dc, uint32_t sr, TCGv_i32 s)
-{
- gen_helper_wsr_lbeg(cpu_env, s);
-}
-
-static void gen_wsr_lend(DisasContext *dc, uint32_t sr, TCGv_i32 s)
-{
- gen_helper_wsr_lend(cpu_env, s);
-}
-
static void gen_wsr_sar(DisasContext *dc, uint32_t sr, TCGv_i32 s)
{
tcg_gen_andi_i32(cpu_SR[sr], s, 0x3f);
{
static void (* const wsr_handler[256])(DisasContext *dc,
uint32_t sr, TCGv_i32 v) = {
- [LBEG] = gen_wsr_lbeg,
- [LEND] = gen_wsr_lend,
[SAR] = gen_wsr_sar,
[BR] = gen_wsr_br,
[LITBASE] = gen_wsr_litbase,
}
dc->base.pc_next = dc->pc + len;
- if (xtensa_option_enabled(dc->config, XTENSA_OPTION_LOOP) &&
- dc->lbeg == dc->pc &&
- ((dc->pc ^ (dc->base.pc_next - 1)) & -dc->config->inst_fetch_width)) {
- qemu_log_mask(LOG_GUEST_ERROR,
- "unaligned first instruction of a loop (pc = %08x)\n",
- dc->pc);
- }
for (i = 1; i < len; ++i) {
b[i] = cpu_ldub_code(env, dc->pc + i);
}
dc->pc = dc->base.pc_first;
dc->ring = tb_flags & XTENSA_TBFLAG_RING_MASK;
dc->cring = (tb_flags & XTENSA_TBFLAG_EXCM) ? 0 : dc->ring;
- dc->lbeg = env->sregs[LBEG];
- dc->lend = env->sregs[LEND];
+ dc->lbeg_off = (dc->base.tb->cs_base & XTENSA_CSBASE_LBEG_OFF_MASK) >>
+ XTENSA_CSBASE_LBEG_OFF_SHIFT;
+ dc->lend = (dc->base.tb->cs_base & XTENSA_CSBASE_LEND_MASK) +
+ (dc->base.pc_first & TARGET_PAGE_MASK);
dc->debug = tb_flags & XTENSA_TBFLAG_DEBUG;
dc->icount = tb_flags & XTENSA_TBFLAG_ICOUNT;
dc->cpenable = (tb_flags & XTENSA_TBFLAG_CPENABLE_MASK) >>
const uint32_t par[])
{
uint32_t lend = arg[1];
- TCGv_i32 tmp = tcg_const_i32(lend);
tcg_gen_subi_i32(cpu_SR[LCOUNT], cpu_R[arg[0]], 1);
tcg_gen_movi_i32(cpu_SR[LBEG], dc->base.pc_next);
- gen_helper_wsr_lend(cpu_env, tmp);
- tcg_temp_free(tmp);
+ tcg_gen_movi_i32(cpu_SR[LEND], lend);
if (par[0] != TCG_COND_NEVER) {
TCGLabel *label = gen_new_label();
.translate = translate_wsr,
.test_ill = test_ill_wsr,
.par = (const uint32_t[]){LBEG},
- .op_flags = XTENSA_OP_EXIT_TB_0,
+ .op_flags = XTENSA_OP_EXIT_TB_M1,
.windowed_register_op = 0x1,
}, {
.name = "wsr.lcount",
.translate = translate_wsr,
.test_ill = test_ill_wsr,
.par = (const uint32_t[]){LEND},
- .op_flags = XTENSA_OP_EXIT_TB_0,
+ .op_flags = XTENSA_OP_EXIT_TB_M1,
.windowed_register_op = 0x1,
}, {
.name = "wsr.litbase",
.translate = translate_xsr,
.test_ill = test_ill_xsr,
.par = (const uint32_t[]){LBEG},
- .op_flags = XTENSA_OP_EXIT_TB_0,
+ .op_flags = XTENSA_OP_EXIT_TB_M1,
.windowed_register_op = 0x1,
}, {
.name = "xsr.lcount",
.translate = translate_xsr,
.test_ill = test_ill_xsr,
.par = (const uint32_t[]){LEND},
- .op_flags = XTENSA_OP_EXIT_TB_0,
+ .op_flags = XTENSA_OP_EXIT_TB_M1,
.windowed_register_op = 0x1,
}, {
.name = "xsr.litbase",
--- /dev/null
+/*
+ * Copyright (c) 2011 - 2019, Max Filippov, Open Source and Linux Lab.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the Open Source and Linux Lab nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/main-loop.h"
+#include "cpu.h"
+#include "exec/helper-proto.h"
+#include "qemu/host-utils.h"
+#include "exec/exec-all.h"
+
+static void copy_window_from_phys(CPUXtensaState *env,
+ uint32_t window, uint32_t phys, uint32_t n)
+{
+ assert(phys < env->config->nareg);
+ if (phys + n <= env->config->nareg) {
+ memcpy(env->regs + window, env->phys_regs + phys,
+ n * sizeof(uint32_t));
+ } else {
+ uint32_t n1 = env->config->nareg - phys;
+ memcpy(env->regs + window, env->phys_regs + phys,
+ n1 * sizeof(uint32_t));
+ memcpy(env->regs + window + n1, env->phys_regs,
+ (n - n1) * sizeof(uint32_t));
+ }
+}
+
+static void copy_phys_from_window(CPUXtensaState *env,
+ uint32_t phys, uint32_t window, uint32_t n)
+{
+ assert(phys < env->config->nareg);
+ if (phys + n <= env->config->nareg) {
+ memcpy(env->phys_regs + phys, env->regs + window,
+ n * sizeof(uint32_t));
+ } else {
+ uint32_t n1 = env->config->nareg - phys;
+ memcpy(env->phys_regs + phys, env->regs + window,
+ n1 * sizeof(uint32_t));
+ memcpy(env->phys_regs, env->regs + window + n1,
+ (n - n1) * sizeof(uint32_t));
+ }
+}
+
+static inline unsigned windowbase_bound(unsigned a, const CPUXtensaState *env)
+{
+ return a & (env->config->nareg / 4 - 1);
+}
+
+static inline unsigned windowstart_bit(unsigned a, const CPUXtensaState *env)
+{
+ return 1 << windowbase_bound(a, env);
+}
+
+void xtensa_sync_window_from_phys(CPUXtensaState *env)
+{
+ copy_window_from_phys(env, 0, env->sregs[WINDOW_BASE] * 4, 16);
+}
+
+void xtensa_sync_phys_from_window(CPUXtensaState *env)
+{
+ copy_phys_from_window(env, env->sregs[WINDOW_BASE] * 4, 0, 16);
+}
+
+static void xtensa_rotate_window_abs(CPUXtensaState *env, uint32_t position)
+{
+ xtensa_sync_phys_from_window(env);
+ env->sregs[WINDOW_BASE] = windowbase_bound(position, env);
+ xtensa_sync_window_from_phys(env);
+}
+
+void xtensa_rotate_window(CPUXtensaState *env, uint32_t delta)
+{
+ xtensa_rotate_window_abs(env, env->sregs[WINDOW_BASE] + delta);
+}
+
+void HELPER(wsr_windowbase)(CPUXtensaState *env, uint32_t v)
+{
+ xtensa_rotate_window_abs(env, v);
+}
+
+void HELPER(entry)(CPUXtensaState *env, uint32_t pc, uint32_t s, uint32_t imm)
+{
+ int callinc = (env->sregs[PS] & PS_CALLINC) >> PS_CALLINC_SHIFT;
+
+ env->regs[(callinc << 2) | (s & 3)] = env->regs[s] - imm;
+ xtensa_rotate_window(env, callinc);
+ env->sregs[WINDOW_START] |=
+ windowstart_bit(env->sregs[WINDOW_BASE], env);
+}
+
+void HELPER(window_check)(CPUXtensaState *env, uint32_t pc, uint32_t w)
+{
+ uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
+ uint32_t windowstart = xtensa_replicate_windowstart(env) >>
+ (env->sregs[WINDOW_BASE] + 1);
+ uint32_t n = ctz32(windowstart) + 1;
+
+ assert(n <= w);
+
+ xtensa_rotate_window(env, n);
+ env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) |
+ (windowbase << PS_OWB_SHIFT) | PS_EXCM;
+ env->sregs[EPC1] = env->pc = pc;
+
+ switch (ctz32(windowstart >> n)) {
+ case 0:
+ HELPER(exception)(env, EXC_WINDOW_OVERFLOW4);
+ break;
+ case 1:
+ HELPER(exception)(env, EXC_WINDOW_OVERFLOW8);
+ break;
+ default:
+ HELPER(exception)(env, EXC_WINDOW_OVERFLOW12);
+ break;
+ }
+}
+
+void HELPER(test_ill_retw)(CPUXtensaState *env, uint32_t pc)
+{
+ int n = (env->regs[0] >> 30) & 0x3;
+ int m = 0;
+ uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
+ uint32_t windowstart = env->sregs[WINDOW_START];
+
+ if (windowstart & windowstart_bit(windowbase - 1, env)) {
+ m = 1;
+ } else if (windowstart & windowstart_bit(windowbase - 2, env)) {
+ m = 2;
+ } else if (windowstart & windowstart_bit(windowbase - 3, env)) {
+ m = 3;
+ }
+
+ if (n == 0 || (m != 0 && m != n)) {
+ qemu_log_mask(LOG_GUEST_ERROR, "Illegal retw instruction(pc = %08x), "
+ "PS = %08x, m = %d, n = %d\n",
+ pc, env->sregs[PS], m, n);
+ HELPER(exception_cause)(env, pc, ILLEGAL_INSTRUCTION_CAUSE);
+ }
+}
+
+void HELPER(test_underflow_retw)(CPUXtensaState *env, uint32_t pc)
+{
+ int n = (env->regs[0] >> 30) & 0x3;
+
+ if (!(env->sregs[WINDOW_START] &
+ windowstart_bit(env->sregs[WINDOW_BASE] - n, env))) {
+ uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
+
+ xtensa_rotate_window(env, -n);
+ /* window underflow */
+ env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) |
+ (windowbase << PS_OWB_SHIFT) | PS_EXCM;
+ env->sregs[EPC1] = env->pc = pc;
+
+ if (n == 1) {
+ HELPER(exception)(env, EXC_WINDOW_UNDERFLOW4);
+ } else if (n == 2) {
+ HELPER(exception)(env, EXC_WINDOW_UNDERFLOW8);
+ } else if (n == 3) {
+ HELPER(exception)(env, EXC_WINDOW_UNDERFLOW12);
+ }
+ }
+}
+
+uint32_t HELPER(retw)(CPUXtensaState *env, uint32_t pc)
+{
+ int n = (env->regs[0] >> 30) & 0x3;
+ uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
+ uint32_t ret_pc = (pc & 0xc0000000) | (env->regs[0] & 0x3fffffff);
+
+ xtensa_rotate_window(env, -n);
+ env->sregs[WINDOW_START] &= ~windowstart_bit(windowbase, env);
+ return ret_pc;
+}
+
+void HELPER(rotw)(CPUXtensaState *env, uint32_t imm4)
+{
+ xtensa_rotate_window(env, imm4);
+}
+
+void xtensa_restore_owb(CPUXtensaState *env)
+{
+ xtensa_rotate_window_abs(env, (env->sregs[PS] & PS_OWB) >> PS_OWB_SHIFT);
+}
+
+void HELPER(restore_owb)(CPUXtensaState *env)
+{
+ xtensa_restore_owb(env);
+}
+
+void HELPER(movsp)(CPUXtensaState *env, uint32_t pc)
+{
+ if ((env->sregs[WINDOW_START] &
+ (windowstart_bit(env->sregs[WINDOW_BASE] - 3, env) |
+ windowstart_bit(env->sregs[WINDOW_BASE] - 2, env) |
+ windowstart_bit(env->sregs[WINDOW_BASE] - 1, env))) == 0) {
+ HELPER(exception_cause)(env, pc, ALLOCA_CAUSE);
+ }
+}
Similarly, v0 = -v1.
+* smin_vec:
+* umin_vec:
+
+ Similarly, v0 = MIN(v1, v2), for signed and unsigned element types.
+
+* smax_vec:
+* umax_vec:
+
+ Similarly, v0 = MAX(v1, v2), for signed and unsigned element types.
+
+* ssadd_vec:
+* sssub_vec:
+* usadd_vec:
+* ussub_vec:
+
+ Signed and unsigned saturating addition and subtraction. If the true
+ result is not representable within the element type, the element is
+ set to the minimum or maximum value for the type.
+
* and_vec v0, v1, v2
* or_vec v0, v1, v2
* xor_vec v0, v1, v2
#define TCG_TARGET_HAS_shv_vec 0
#define TCG_TARGET_HAS_cmp_vec 1
#define TCG_TARGET_HAS_mul_vec 1
+#define TCG_TARGET_HAS_sat_vec 1
+#define TCG_TARGET_HAS_minmax_vec 1
#define TCG_TARGET_DEFAULT_MO (0)
#define TCG_TARGET_HAS_MEMORY_BSWAP 1
I3510_EON = 0x4a200000,
I3510_ANDS = 0x6a000000,
+ /* Logical shifted register instructions (with a shift). */
+ I3502S_AND_LSR = I3510_AND | (1 << 22),
+
/* AdvSIMD copy */
I3605_DUP = 0x0e000400,
I3605_INS = 0x4e001c00,
I3616_CMHI = 0x2e203400,
I3616_CMHS = 0x2e203c00,
I3616_CMEQ = 0x2e208c00,
+ I3616_SMAX = 0x0e206400,
+ I3616_SMIN = 0x0e206c00,
+ I3616_SQADD = 0x0e200c00,
+ I3616_SQSUB = 0x0e202c00,
+ I3616_UMAX = 0x2e206400,
+ I3616_UMIN = 0x2e206c00,
+ I3616_UQADD = 0x2e200c00,
+ I3616_UQSUB = 0x2e202c00,
/* AdvSIMD two-reg misc. */
I3617_CMGT0 = 0x0e208800,
label->label_ptr[0] = label_ptr;
}
+/* We expect tlb_mask to be before tlb_table. */
+QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table) <
+ offsetof(CPUArchState, tlb_mask));
+
+/* We expect to use a 24-bit unsigned offset from ENV. */
+QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table[NB_MMU_MODES - 1])
+ > 0xffffff);
+
/* Load and compare a TLB entry, emitting the conditional jump to the
slow path for the failure case, which will be patched later when finalizing
the slow path. Generated code returns the host addend in X1,
tcg_insn_unit **label_ptr, int mem_index,
bool is_read)
{
- int tlb_offset = is_read ?
- offsetof(CPUArchState, tlb_table[mem_index][0].addr_read)
- : offsetof(CPUArchState, tlb_table[mem_index][0].addr_write);
+ int mask_ofs = offsetof(CPUArchState, tlb_mask[mem_index]);
+ int table_ofs = offsetof(CPUArchState, tlb_table[mem_index]);
unsigned a_bits = get_alignment_bits(opc);
unsigned s_bits = opc & MO_SIZE;
unsigned a_mask = (1u << a_bits) - 1;
unsigned s_mask = (1u << s_bits) - 1;
- TCGReg base = TCG_AREG0, x3;
- uint64_t tlb_mask;
+ TCGReg mask_base = TCG_AREG0, table_base = TCG_AREG0, x3;
+ TCGType mask_type;
+ uint64_t compare_mask;
+
+ if (table_ofs > 0xfff) {
+ int table_hi = table_ofs & ~0xfff;
+ int mask_hi = mask_ofs & ~0xfff;
+
+ table_base = TCG_REG_X1;
+ if (mask_hi == table_hi) {
+ mask_base = table_base;
+ } else if (mask_hi) {
+ mask_base = TCG_REG_X0;
+ tcg_out_insn(s, 3401, ADDI, TCG_TYPE_I64,
+ mask_base, TCG_AREG0, mask_hi);
+ }
+ tcg_out_insn(s, 3401, ADDI, TCG_TYPE_I64,
+ table_base, TCG_AREG0, table_hi);
+ mask_ofs -= mask_hi;
+ table_ofs -= table_hi;
+ }
+
+ mask_type = (TARGET_PAGE_BITS + CPU_TLB_DYN_MAX_BITS > 32
+ ? TCG_TYPE_I64 : TCG_TYPE_I32);
+
+ /* Load tlb_mask[mmu_idx] and tlb_table[mmu_idx]. */
+ tcg_out_ld(s, mask_type, TCG_REG_X0, mask_base, mask_ofs);
+ tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_X1, table_base, table_ofs);
+
+ /* Extract the TLB index from the address into X0. */
+ tcg_out_insn(s, 3502S, AND_LSR, mask_type == TCG_TYPE_I64,
+ TCG_REG_X0, TCG_REG_X0, addr_reg,
+ TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
+
+ /* Add the tlb_table pointer, creating the CPUTLBEntry address into X1. */
+ tcg_out_insn(s, 3502, ADD, 1, TCG_REG_X1, TCG_REG_X1, TCG_REG_X0);
+
+ /* Load the tlb comparator into X0, and the fast path addend into X1. */
+ tcg_out_ld(s, TCG_TYPE_TL, TCG_REG_X0, TCG_REG_X1, is_read
+ ? offsetof(CPUTLBEntry, addr_read)
+ : offsetof(CPUTLBEntry, addr_write));
+ tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_X1, TCG_REG_X1,
+ offsetof(CPUTLBEntry, addend));
/* For aligned accesses, we check the first byte and include the alignment
bits within the address. For unaligned access, we check that we don't
TCG_REG_X3, addr_reg, s_mask - a_mask);
x3 = TCG_REG_X3;
}
- tlb_mask = (uint64_t)TARGET_PAGE_MASK | a_mask;
-
- /* Extract the TLB index from the address into X0.
- X0<CPU_TLB_BITS:0> =
- addr_reg<TARGET_PAGE_BITS+CPU_TLB_BITS:TARGET_PAGE_BITS> */
- tcg_out_ubfm(s, TARGET_LONG_BITS == 64, TCG_REG_X0, addr_reg,
- TARGET_PAGE_BITS, TARGET_PAGE_BITS + CPU_TLB_BITS);
+ compare_mask = (uint64_t)TARGET_PAGE_MASK | a_mask;
/* Store the page mask part of the address into X3. */
tcg_out_logicali(s, I3404_ANDI, TARGET_LONG_BITS == 64,
- TCG_REG_X3, x3, tlb_mask);
-
- /* Add any "high bits" from the tlb offset to the env address into X2,
- to take advantage of the LSL12 form of the ADDI instruction.
- X2 = env + (tlb_offset & 0xfff000) */
- if (tlb_offset & 0xfff000) {
- tcg_out_insn(s, 3401, ADDI, TCG_TYPE_I64, TCG_REG_X2, base,
- tlb_offset & 0xfff000);
- base = TCG_REG_X2;
- }
-
- /* Merge the tlb index contribution into X2.
- X2 = X2 + (X0 << CPU_TLB_ENTRY_BITS) */
- tcg_out_insn(s, 3502S, ADD_LSL, TCG_TYPE_I64, TCG_REG_X2, base,
- TCG_REG_X0, CPU_TLB_ENTRY_BITS);
-
- /* Merge "low bits" from tlb offset, load the tlb comparator into X0.
- X0 = load [X2 + (tlb_offset & 0x000fff)] */
- tcg_out_ldst(s, TARGET_LONG_BITS == 32 ? I3312_LDRW : I3312_LDRX,
- TCG_REG_X0, TCG_REG_X2, tlb_offset & 0xfff,
- TARGET_LONG_BITS == 32 ? 2 : 3);
-
- /* Load the tlb addend. Do that early to avoid stalling.
- X1 = load [X2 + (tlb_offset & 0xfff) + offsetof(addend)] */
- tcg_out_ldst(s, I3312_LDRX, TCG_REG_X1, TCG_REG_X2,
- (tlb_offset & 0xfff) + (offsetof(CPUTLBEntry, addend)) -
- (is_read ? offsetof(CPUTLBEntry, addr_read)
- : offsetof(CPUTLBEntry, addr_write)), 3);
+ TCG_REG_X3, x3, compare_mask);
/* Perform the address comparison. */
- tcg_out_cmp(s, (TARGET_LONG_BITS == 64), TCG_REG_X0, TCG_REG_X3, 0);
+ tcg_out_cmp(s, TARGET_LONG_BITS == 64, TCG_REG_X0, TCG_REG_X3, 0);
/* If not equal, we jump to the slow path. */
*label_ptr = s->code_ptr;
case INDEX_op_orc_vec:
tcg_out_insn(s, 3616, ORN, is_q, 0, a0, a1, a2);
break;
+ case INDEX_op_ssadd_vec:
+ tcg_out_insn(s, 3616, SQADD, is_q, vece, a0, a1, a2);
+ break;
+ case INDEX_op_sssub_vec:
+ tcg_out_insn(s, 3616, SQSUB, is_q, vece, a0, a1, a2);
+ break;
+ case INDEX_op_usadd_vec:
+ tcg_out_insn(s, 3616, UQADD, is_q, vece, a0, a1, a2);
+ break;
+ case INDEX_op_ussub_vec:
+ tcg_out_insn(s, 3616, UQSUB, is_q, vece, a0, a1, a2);
+ break;
+ case INDEX_op_smax_vec:
+ tcg_out_insn(s, 3616, SMAX, is_q, vece, a0, a1, a2);
+ break;
+ case INDEX_op_smin_vec:
+ tcg_out_insn(s, 3616, SMIN, is_q, vece, a0, a1, a2);
+ break;
+ case INDEX_op_umax_vec:
+ tcg_out_insn(s, 3616, UMAX, is_q, vece, a0, a1, a2);
+ break;
+ case INDEX_op_umin_vec:
+ tcg_out_insn(s, 3616, UMIN, is_q, vece, a0, a1, a2);
+ break;
case INDEX_op_not_vec:
tcg_out_insn(s, 3617, NOT, is_q, 0, a0, a1);
break;
case INDEX_op_shli_vec:
case INDEX_op_shri_vec:
case INDEX_op_sari_vec:
+ case INDEX_op_ssadd_vec:
+ case INDEX_op_sssub_vec:
+ case INDEX_op_usadd_vec:
+ case INDEX_op_ussub_vec:
+ case INDEX_op_smax_vec:
+ case INDEX_op_smin_vec:
+ case INDEX_op_umax_vec:
+ case INDEX_op_umin_vec:
return 1;
case INDEX_op_mul_vec:
return vece < MO_64;
case INDEX_op_xor_vec:
case INDEX_op_andc_vec:
case INDEX_op_orc_vec:
+ case INDEX_op_ssadd_vec:
+ case INDEX_op_sssub_vec:
+ case INDEX_op_usadd_vec:
+ case INDEX_op_ussub_vec:
+ case INDEX_op_smax_vec:
+ case INDEX_op_smin_vec:
+ case INDEX_op_umax_vec:
+ case INDEX_op_umin_vec:
return &w_w_w;
case INDEX_op_not_vec:
case INDEX_op_neg_vec:
tcg_out_memop_r(s, cond, INSN_LDRD_REG, rt, rn, rm, 1, 1, 0);
}
+static inline void tcg_out_ldrd_rwb(TCGContext *s, int cond, TCGReg rt,
+ TCGReg rn, TCGReg rm)
+{
+ tcg_out_memop_r(s, cond, INSN_LDRD_REG, rt, rn, rm, 1, 1, 1);
+}
+
static inline void tcg_out_strd_8(TCGContext *s, int cond, TCGReg rt,
TCGReg rn, int imm8)
{
#define TLB_SHIFT (CPU_TLB_ENTRY_BITS + CPU_TLB_BITS)
-/* We're expecting to use an 8-bit immediate and to mask. */
-QEMU_BUILD_BUG_ON(CPU_TLB_BITS > 8);
+/* We expect tlb_mask to be before tlb_table. */
+QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table) <
+ offsetof(CPUArchState, tlb_mask));
+
+/* We expect to use a 20-bit unsigned offset from ENV. */
+QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table[NB_MMU_MODES - 1])
+ > 0xfffff);
/* Load and compare a TLB entry, leaving the flags set. Returns the register
containing the addend of the tlb entry. Clobbers R0, R1, R2, TMP. */
static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
TCGMemOp opc, int mem_index, bool is_load)
{
- TCGReg base = TCG_AREG0;
- int cmp_off =
- (is_load
- ? offsetof(CPUArchState, tlb_table[mem_index][0].addr_read)
- : offsetof(CPUArchState, tlb_table[mem_index][0].addr_write));
- int add_off = offsetof(CPUArchState, tlb_table[mem_index][0].addend);
- int mask_off;
+ int cmp_off = (is_load ? offsetof(CPUTLBEntry, addr_read)
+ : offsetof(CPUTLBEntry, addr_write));
+ int mask_off = offsetof(CPUArchState, tlb_mask[mem_index]);
+ int table_off = offsetof(CPUArchState, tlb_table[mem_index]);
+ TCGReg mask_base = TCG_AREG0, table_base = TCG_AREG0;
unsigned s_bits = opc & MO_SIZE;
unsigned a_bits = get_alignment_bits(opc);
- /* V7 generates the following:
- * ubfx r0, addrlo, #TARGET_PAGE_BITS, #CPU_TLB_BITS
- * add r2, env, #high
- * add r2, r2, r0, lsl #CPU_TLB_ENTRY_BITS
- * ldr r0, [r2, #cmp]
- * ldr r2, [r2, #add]
- * movw tmp, #page_align_mask
- * bic tmp, addrlo, tmp
- * cmp r0, tmp
- *
- * Otherwise we generate:
- * shr tmp, addrlo, #TARGET_PAGE_BITS
- * add r2, env, #high
- * and r0, tmp, #(CPU_TLB_SIZE - 1)
- * add r2, r2, r0, lsl #CPU_TLB_ENTRY_BITS
- * ldr r0, [r2, #cmp]
- * ldr r2, [r2, #add]
- * tst addrlo, #s_mask
- * cmpeq r0, tmp, lsl #TARGET_PAGE_BITS
- */
- if (use_armv7_instructions) {
- tcg_out_extract(s, COND_AL, TCG_REG_R0, addrlo,
- TARGET_PAGE_BITS, CPU_TLB_BITS);
- } else {
- tcg_out_dat_reg(s, COND_AL, ARITH_MOV, TCG_REG_TMP,
- 0, addrlo, SHIFT_IMM_LSR(TARGET_PAGE_BITS));
- }
+ if (table_off > 0xfff) {
+ int mask_hi = mask_off & ~0xfff;
+ int table_hi = table_off & ~0xfff;
+ int rot;
+
+ table_base = TCG_REG_R2;
+ if (mask_hi == table_hi) {
+ mask_base = table_base;
+ } else if (mask_hi) {
+ mask_base = TCG_REG_TMP;
+ rot = encode_imm(mask_hi);
+ assert(rot >= 0);
+ tcg_out_dat_imm(s, COND_AL, ARITH_ADD, mask_base, TCG_AREG0,
+ rotl(mask_hi, rot) | (rot << 7));
+ }
+ rot = encode_imm(table_hi);
+ assert(rot >= 0);
+ tcg_out_dat_imm(s, COND_AL, ARITH_ADD, table_base, TCG_AREG0,
+ rotl(table_hi, rot) | (rot << 7));
- /* Add portions of the offset until the memory access is in range.
- * If we plan on using ldrd, reduce to an 8-bit offset; otherwise
- * we can use a 12-bit offset. */
- if (use_armv6_instructions && TARGET_LONG_BITS == 64) {
- mask_off = 0xff;
- } else {
- mask_off = 0xfff;
- }
- while (cmp_off > mask_off) {
- int shift = ctz32(cmp_off & ~mask_off) & ~1;
- int rot = ((32 - shift) << 7) & 0xf00;
- int addend = cmp_off & (0xff << shift);
- tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R2, base,
- rot | ((cmp_off >> shift) & 0xff));
- base = TCG_REG_R2;
- add_off -= addend;
- cmp_off -= addend;
+ mask_off -= mask_hi;
+ table_off -= table_hi;
}
- if (!use_armv7_instructions) {
- tcg_out_dat_imm(s, COND_AL, ARITH_AND,
- TCG_REG_R0, TCG_REG_TMP, CPU_TLB_SIZE - 1);
- }
- tcg_out_dat_reg(s, COND_AL, ARITH_ADD, TCG_REG_R2, base,
- TCG_REG_R0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS));
-
- /* Load the tlb comparator. Use ldrd if needed and available,
- but due to how the pointer needs setting up, ldm isn't useful.
- Base arm5 doesn't have ldrd, but armv5te does. */
- if (use_armv6_instructions && TARGET_LONG_BITS == 64) {
- tcg_out_ldrd_8(s, COND_AL, TCG_REG_R0, TCG_REG_R2, cmp_off);
- } else {
- tcg_out_ld32_12(s, COND_AL, TCG_REG_R0, TCG_REG_R2, cmp_off);
- if (TARGET_LONG_BITS == 64) {
- tcg_out_ld32_12(s, COND_AL, TCG_REG_R1, TCG_REG_R2, cmp_off + 4);
+ /* Load tlb_mask[mmu_idx] and tlb_table[mmu_idx]. */
+ tcg_out_ld(s, TCG_TYPE_I32, TCG_REG_TMP, mask_base, mask_off);
+ tcg_out_ld(s, TCG_TYPE_I32, TCG_REG_R2, table_base, table_off);
+
+ /* Extract the tlb index from the address into TMP. */
+ tcg_out_dat_reg(s, COND_AL, ARITH_AND, TCG_REG_TMP, TCG_REG_TMP, addrlo,
+ SHIFT_IMM_LSR(TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS));
+
+ /*
+ * Add the tlb_table pointer, creating the CPUTLBEntry address in R2.
+ * Load the tlb comparator into R0/R1 and the fast path addend into R2.
+ */
+ if (cmp_off == 0) {
+ if (use_armv6_instructions && TARGET_LONG_BITS == 64) {
+ tcg_out_ldrd_rwb(s, COND_AL, TCG_REG_R0, TCG_REG_R2, TCG_REG_TMP);
+ } else {
+ tcg_out_ld32_rwb(s, COND_AL, TCG_REG_R0, TCG_REG_R2, TCG_REG_TMP);
}
+ } else {
+ tcg_out_dat_reg(s, COND_AL, ARITH_ADD,
+ TCG_REG_R2, TCG_REG_R2, TCG_REG_TMP, 0);
+ if (use_armv6_instructions && TARGET_LONG_BITS == 64) {
+ tcg_out_ldrd_8(s, COND_AL, TCG_REG_R0, TCG_REG_R2, cmp_off);
+ } else {
+ tcg_out_ld32_12(s, COND_AL, TCG_REG_R0, TCG_REG_R2, cmp_off);
+ }
+ }
+ if (!use_armv6_instructions && TARGET_LONG_BITS == 64) {
+ tcg_out_ld32_12(s, COND_AL, TCG_REG_R1, TCG_REG_R2, cmp_off + 4);
}
/* Load the tlb addend. */
- tcg_out_ld32_12(s, COND_AL, TCG_REG_R2, TCG_REG_R2, add_off);
+ tcg_out_ld32_12(s, COND_AL, TCG_REG_R2, TCG_REG_R2,
+ offsetof(CPUTLBEntry, addend));
/* Check alignment. We don't support inline unaligned acceses,
but we can easily support overalignment checks. */
#define TCG_TARGET_HAS_shv_vec 0
#define TCG_TARGET_HAS_cmp_vec 1
#define TCG_TARGET_HAS_mul_vec 1
+#define TCG_TARGET_HAS_sat_vec 1
+#define TCG_TARGET_HAS_minmax_vec 1
#define TCG_TARGET_deposit_i32_valid(ofs, len) \
(((ofs) == 0 && (len) == 8) || ((ofs) == 8 && (len) == 8) || \
#define OPC_ARITH_GvEv (0x03) /* ... plus (ARITH_FOO << 3) */
#define OPC_ANDN (0xf2 | P_EXT38)
#define OPC_ADD_GvEv (OPC_ARITH_GvEv | (ARITH_ADD << 3))
+#define OPC_AND_GvEv (OPC_ARITH_GvEv | (ARITH_AND << 3))
#define OPC_BLENDPS (0x0c | P_EXT3A | P_DATA16)
#define OPC_BSF (0xbc | P_EXT)
#define OPC_BSR (0xbd | P_EXT)
#define OPC_PADDW (0xfd | P_EXT | P_DATA16)
#define OPC_PADDD (0xfe | P_EXT | P_DATA16)
#define OPC_PADDQ (0xd4 | P_EXT | P_DATA16)
+#define OPC_PADDSB (0xec | P_EXT | P_DATA16)
+#define OPC_PADDSW (0xed | P_EXT | P_DATA16)
+#define OPC_PADDUB (0xdc | P_EXT | P_DATA16)
+#define OPC_PADDUW (0xdd | P_EXT | P_DATA16)
#define OPC_PAND (0xdb | P_EXT | P_DATA16)
#define OPC_PANDN (0xdf | P_EXT | P_DATA16)
#define OPC_PBLENDW (0x0e | P_EXT3A | P_DATA16)
#define OPC_PCMPGTW (0x65 | P_EXT | P_DATA16)
#define OPC_PCMPGTD (0x66 | P_EXT | P_DATA16)
#define OPC_PCMPGTQ (0x37 | P_EXT38 | P_DATA16)
+#define OPC_PMAXSB (0x3c | P_EXT38 | P_DATA16)
+#define OPC_PMAXSW (0xee | P_EXT | P_DATA16)
+#define OPC_PMAXSD (0x3d | P_EXT38 | P_DATA16)
+#define OPC_PMAXUB (0xde | P_EXT | P_DATA16)
+#define OPC_PMAXUW (0x3e | P_EXT38 | P_DATA16)
+#define OPC_PMAXUD (0x3f | P_EXT38 | P_DATA16)
+#define OPC_PMINSB (0x38 | P_EXT38 | P_DATA16)
+#define OPC_PMINSW (0xea | P_EXT | P_DATA16)
+#define OPC_PMINSD (0x39 | P_EXT38 | P_DATA16)
+#define OPC_PMINUB (0xda | P_EXT | P_DATA16)
+#define OPC_PMINUW (0x3a | P_EXT38 | P_DATA16)
+#define OPC_PMINUD (0x3b | P_EXT38 | P_DATA16)
#define OPC_PMOVSXBW (0x20 | P_EXT38 | P_DATA16)
#define OPC_PMOVSXWD (0x23 | P_EXT38 | P_DATA16)
#define OPC_PMOVSXDQ (0x25 | P_EXT38 | P_DATA16)
#define OPC_PSUBW (0xf9 | P_EXT | P_DATA16)
#define OPC_PSUBD (0xfa | P_EXT | P_DATA16)
#define OPC_PSUBQ (0xfb | P_EXT | P_DATA16)
+#define OPC_PSUBSB (0xe8 | P_EXT | P_DATA16)
+#define OPC_PSUBSW (0xe9 | P_EXT | P_DATA16)
+#define OPC_PSUBUB (0xd8 | P_EXT | P_DATA16)
+#define OPC_PSUBUW (0xd9 | P_EXT | P_DATA16)
#define OPC_PUNPCKLBW (0x60 | P_EXT | P_DATA16)
#define OPC_PUNPCKLWD (0x61 | P_EXT | P_DATA16)
#define OPC_PUNPCKLDQ (0x62 | P_EXT | P_DATA16)
}
if (TCG_TYPE_PTR == TCG_TYPE_I64) {
hrexw = P_REXW;
- if (TARGET_PAGE_BITS + CPU_TLB_BITS > 32) {
+ if (TARGET_PAGE_BITS + CPU_TLB_DYN_MAX_BITS > 32) {
tlbtype = TCG_TYPE_I64;
tlbrexw = P_REXW;
}
}
tcg_out_mov(s, tlbtype, r0, addrlo);
+ tcg_out_shifti(s, SHIFT_SHR + tlbrexw, r0,
+ TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
+
+ tcg_out_modrm_offset(s, OPC_AND_GvEv + trexw, r0, TCG_AREG0,
+ offsetof(CPUArchState, tlb_mask[mem_index]));
+
+ tcg_out_modrm_offset(s, OPC_ADD_GvEv + hrexw, r0, TCG_AREG0,
+ offsetof(CPUArchState, tlb_table[mem_index]));
+
/* If the required alignment is at least as large as the access, simply
copy the address and mask. For lesser alignments, check that we don't
cross pages for the complete access. */
tcg_out_modrm_offset(s, OPC_LEA + trexw, r1, addrlo, s_mask - a_mask);
}
tlb_mask = (target_ulong)TARGET_PAGE_MASK | a_mask;
-
- tcg_out_shifti(s, SHIFT_SHR + tlbrexw, r0,
- TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
-
tgen_arithi(s, ARITH_AND + trexw, r1, tlb_mask, 0);
- tgen_arithi(s, ARITH_AND + tlbrexw, r0,
- (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS, 0);
-
- tcg_out_modrm_sib_offset(s, OPC_LEA + hrexw, r0, TCG_AREG0, r0, 0,
- offsetof(CPUArchState, tlb_table[mem_index][0])
- + which);
/* cmp 0(r0), r1 */
- tcg_out_modrm_offset(s, OPC_CMP_GvEv + trexw, r1, r0, 0);
+ tcg_out_modrm_offset(s, OPC_CMP_GvEv + trexw, r1, r0, which);
/* Prepare for both the fast path add of the tlb addend, and the slow
path function argument setup. */
if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) {
/* cmp 4(r0), addrhi */
- tcg_out_modrm_offset(s, OPC_CMP_GvEv, addrhi, r0, 4);
+ tcg_out_modrm_offset(s, OPC_CMP_GvEv, addrhi, r0, which + 4);
/* jne slow_path */
tcg_out_opc(s, OPC_JCC_long + JCC_JNE, 0, 0, 0);
/* add addend(r0), r1 */
tcg_out_modrm_offset(s, OPC_ADD_GvEv + hrexw, r1, r0,
- offsetof(CPUTLBEntry, addend) - which);
+ offsetof(CPUTLBEntry, addend));
}
/*
static int const add_insn[4] = {
OPC_PADDB, OPC_PADDW, OPC_PADDD, OPC_PADDQ
};
+ static int const ssadd_insn[4] = {
+ OPC_PADDSB, OPC_PADDSW, OPC_UD2, OPC_UD2
+ };
+ static int const usadd_insn[4] = {
+ OPC_PADDSB, OPC_PADDSW, OPC_UD2, OPC_UD2
+ };
static int const sub_insn[4] = {
OPC_PSUBB, OPC_PSUBW, OPC_PSUBD, OPC_PSUBQ
};
+ static int const sssub_insn[4] = {
+ OPC_PSUBSB, OPC_PSUBSW, OPC_UD2, OPC_UD2
+ };
+ static int const ussub_insn[4] = {
+ OPC_PSUBSB, OPC_PSUBSW, OPC_UD2, OPC_UD2
+ };
static int const mul_insn[4] = {
OPC_UD2, OPC_PMULLW, OPC_PMULLD, OPC_UD2
};
static int const packus_insn[4] = {
OPC_PACKUSWB, OPC_PACKUSDW, OPC_UD2, OPC_UD2
};
+ static int const smin_insn[4] = {
+ OPC_PMINSB, OPC_PMINSW, OPC_PMINSD, OPC_UD2
+ };
+ static int const smax_insn[4] = {
+ OPC_PMAXSB, OPC_PMAXSW, OPC_PMAXSD, OPC_UD2
+ };
+ static int const umin_insn[4] = {
+ OPC_PMINUB, OPC_PMINUW, OPC_PMINUD, OPC_UD2
+ };
+ static int const umax_insn[4] = {
+ OPC_PMAXUB, OPC_PMAXUW, OPC_PMAXUD, OPC_UD2
+ };
TCGType type = vecl + TCG_TYPE_V64;
int insn, sub;
case INDEX_op_add_vec:
insn = add_insn[vece];
goto gen_simd;
+ case INDEX_op_ssadd_vec:
+ insn = ssadd_insn[vece];
+ goto gen_simd;
+ case INDEX_op_usadd_vec:
+ insn = usadd_insn[vece];
+ goto gen_simd;
case INDEX_op_sub_vec:
insn = sub_insn[vece];
goto gen_simd;
+ case INDEX_op_sssub_vec:
+ insn = sssub_insn[vece];
+ goto gen_simd;
+ case INDEX_op_ussub_vec:
+ insn = ussub_insn[vece];
+ goto gen_simd;
case INDEX_op_mul_vec:
insn = mul_insn[vece];
goto gen_simd;
case INDEX_op_xor_vec:
insn = OPC_PXOR;
goto gen_simd;
+ case INDEX_op_smin_vec:
+ insn = smin_insn[vece];
+ goto gen_simd;
+ case INDEX_op_umin_vec:
+ insn = umin_insn[vece];
+ goto gen_simd;
+ case INDEX_op_smax_vec:
+ insn = smax_insn[vece];
+ goto gen_simd;
+ case INDEX_op_umax_vec:
+ insn = umax_insn[vece];
+ goto gen_simd;
case INDEX_op_x86_punpckl_vec:
insn = punpckl_insn[vece];
goto gen_simd;
case INDEX_op_or_vec:
case INDEX_op_xor_vec:
case INDEX_op_andc_vec:
+ case INDEX_op_ssadd_vec:
+ case INDEX_op_usadd_vec:
+ case INDEX_op_sssub_vec:
+ case INDEX_op_ussub_vec:
+ case INDEX_op_smin_vec:
+ case INDEX_op_umin_vec:
+ case INDEX_op_smax_vec:
+ case INDEX_op_umax_vec:
case INDEX_op_cmp_vec:
case INDEX_op_x86_shufps_vec:
case INDEX_op_x86_blend_vec:
}
return 1;
+ case INDEX_op_ssadd_vec:
+ case INDEX_op_usadd_vec:
+ case INDEX_op_sssub_vec:
+ case INDEX_op_ussub_vec:
+ return vece <= MO_16;
+ case INDEX_op_smin_vec:
+ case INDEX_op_smax_vec:
+ case INDEX_op_umin_vec:
+ case INDEX_op_umax_vec:
+ return vece <= MO_32 ? 1 : -1;
+
default:
return 0;
}
}
-void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
- TCGArg a0, ...)
+static void expand_vec_shi(TCGType type, unsigned vece, bool shr,
+ TCGv_vec v0, TCGv_vec v1, TCGArg imm)
{
- va_list va;
- TCGArg a1, a2;
- TCGv_vec v0, t1, t2, t3, t4;
+ TCGv_vec t1, t2;
- va_start(va, a0);
- v0 = temp_tcgv_vec(arg_temp(a0));
+ tcg_debug_assert(vece == MO_8);
- switch (opc) {
- case INDEX_op_shli_vec:
- case INDEX_op_shri_vec:
- tcg_debug_assert(vece == MO_8);
- a1 = va_arg(va, TCGArg);
- a2 = va_arg(va, TCGArg);
- /* Unpack to W, shift, and repack. Tricky bits:
- (1) Use punpck*bw x,x to produce DDCCBBAA,
- i.e. duplicate in other half of the 16-bit lane.
- (2) For right-shift, add 8 so that the high half of
- the lane becomes zero. For left-shift, we must
- shift up and down again.
- (3) Step 2 leaves high half zero such that PACKUSWB
- (pack with unsigned saturation) does not modify
- the quantity. */
+ t1 = tcg_temp_new_vec(type);
+ t2 = tcg_temp_new_vec(type);
+
+ /* Unpack to W, shift, and repack. Tricky bits:
+ (1) Use punpck*bw x,x to produce DDCCBBAA,
+ i.e. duplicate in other half of the 16-bit lane.
+ (2) For right-shift, add 8 so that the high half of
+ the lane becomes zero. For left-shift, we must
+ shift up and down again.
+ (3) Step 2 leaves high half zero such that PACKUSWB
+ (pack with unsigned saturation) does not modify
+ the quantity. */
+ vec_gen_3(INDEX_op_x86_punpckl_vec, type, MO_8,
+ tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(v1));
+ vec_gen_3(INDEX_op_x86_punpckh_vec, type, MO_8,
+ tcgv_vec_arg(t2), tcgv_vec_arg(v1), tcgv_vec_arg(v1));
+
+ if (shr) {
+ tcg_gen_shri_vec(MO_16, t1, t1, imm + 8);
+ tcg_gen_shri_vec(MO_16, t2, t2, imm + 8);
+ } else {
+ tcg_gen_shli_vec(MO_16, t1, t1, imm + 8);
+ tcg_gen_shli_vec(MO_16, t2, t2, imm + 8);
+ tcg_gen_shri_vec(MO_16, t1, t1, 8);
+ tcg_gen_shri_vec(MO_16, t2, t2, 8);
+ }
+
+ vec_gen_3(INDEX_op_x86_packus_vec, type, MO_8,
+ tcgv_vec_arg(v0), tcgv_vec_arg(t1), tcgv_vec_arg(t2));
+ tcg_temp_free_vec(t1);
+ tcg_temp_free_vec(t2);
+}
+
+static void expand_vec_sari(TCGType type, unsigned vece,
+ TCGv_vec v0, TCGv_vec v1, TCGArg imm)
+{
+ TCGv_vec t1, t2;
+
+ switch (vece) {
+ case MO_8:
+ /* Unpack to W, shift, and repack, as in expand_vec_shi. */
t1 = tcg_temp_new_vec(type);
t2 = tcg_temp_new_vec(type);
vec_gen_3(INDEX_op_x86_punpckl_vec, type, MO_8,
- tcgv_vec_arg(t1), a1, a1);
+ tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(v1));
vec_gen_3(INDEX_op_x86_punpckh_vec, type, MO_8,
- tcgv_vec_arg(t2), a1, a1);
- if (opc == INDEX_op_shri_vec) {
- vec_gen_3(INDEX_op_shri_vec, type, MO_16,
- tcgv_vec_arg(t1), tcgv_vec_arg(t1), a2 + 8);
- vec_gen_3(INDEX_op_shri_vec, type, MO_16,
- tcgv_vec_arg(t2), tcgv_vec_arg(t2), a2 + 8);
- } else {
- vec_gen_3(INDEX_op_shli_vec, type, MO_16,
- tcgv_vec_arg(t1), tcgv_vec_arg(t1), a2 + 8);
- vec_gen_3(INDEX_op_shli_vec, type, MO_16,
- tcgv_vec_arg(t2), tcgv_vec_arg(t2), a2 + 8);
- vec_gen_3(INDEX_op_shri_vec, type, MO_16,
- tcgv_vec_arg(t1), tcgv_vec_arg(t1), 8);
- vec_gen_3(INDEX_op_shri_vec, type, MO_16,
- tcgv_vec_arg(t2), tcgv_vec_arg(t2), 8);
- }
- vec_gen_3(INDEX_op_x86_packus_vec, type, MO_8,
- a0, tcgv_vec_arg(t1), tcgv_vec_arg(t2));
+ tcgv_vec_arg(t2), tcgv_vec_arg(v1), tcgv_vec_arg(v1));
+ tcg_gen_sari_vec(MO_16, t1, t1, imm + 8);
+ tcg_gen_sari_vec(MO_16, t2, t2, imm + 8);
+ vec_gen_3(INDEX_op_x86_packss_vec, type, MO_8,
+ tcgv_vec_arg(v0), tcgv_vec_arg(t1), tcgv_vec_arg(t2));
tcg_temp_free_vec(t1);
tcg_temp_free_vec(t2);
break;
- case INDEX_op_sari_vec:
- a1 = va_arg(va, TCGArg);
- a2 = va_arg(va, TCGArg);
- if (vece == MO_8) {
- /* Unpack to W, shift, and repack, as above. */
- t1 = tcg_temp_new_vec(type);
- t2 = tcg_temp_new_vec(type);
- vec_gen_3(INDEX_op_x86_punpckl_vec, type, MO_8,
- tcgv_vec_arg(t1), a1, a1);
- vec_gen_3(INDEX_op_x86_punpckh_vec, type, MO_8,
- tcgv_vec_arg(t2), a1, a1);
- vec_gen_3(INDEX_op_sari_vec, type, MO_16,
- tcgv_vec_arg(t1), tcgv_vec_arg(t1), a2 + 8);
- vec_gen_3(INDEX_op_sari_vec, type, MO_16,
- tcgv_vec_arg(t2), tcgv_vec_arg(t2), a2 + 8);
- vec_gen_3(INDEX_op_x86_packss_vec, type, MO_8,
- a0, tcgv_vec_arg(t1), tcgv_vec_arg(t2));
- tcg_temp_free_vec(t1);
- tcg_temp_free_vec(t2);
- break;
- }
- tcg_debug_assert(vece == MO_64);
- /* MO_64: If the shift is <= 32, we can emulate the sign extend by
- performing an arithmetic 32-bit shift and overwriting the high
- half of the result (note that the ISA says shift of 32 is valid). */
- if (a2 <= 32) {
+ case MO_64:
+ if (imm <= 32) {
+ /* We can emulate a small sign extend by performing an arithmetic
+ * 32-bit shift and overwriting the high half of a 64-bit logical
+ * shift (note that the ISA says shift of 32 is valid).
+ */
t1 = tcg_temp_new_vec(type);
- vec_gen_3(INDEX_op_sari_vec, type, MO_32, tcgv_vec_arg(t1), a1, a2);
- vec_gen_3(INDEX_op_shri_vec, type, MO_64, a0, a1, a2);
+ tcg_gen_sari_vec(MO_32, t1, v1, imm);
+ tcg_gen_shri_vec(MO_64, v0, v1, imm);
vec_gen_4(INDEX_op_x86_blend_vec, type, MO_32,
- a0, a0, tcgv_vec_arg(t1), 0xaa);
+ tcgv_vec_arg(v0), tcgv_vec_arg(v0),
+ tcgv_vec_arg(t1), 0xaa);
+ tcg_temp_free_vec(t1);
+ } else {
+ /* Otherwise we will need to use a compare vs 0 to produce
+ * the sign-extend, shift and merge.
+ */
+ t1 = tcg_const_zeros_vec(type);
+ tcg_gen_cmp_vec(TCG_COND_GT, MO_64, t1, t1, v1);
+ tcg_gen_shri_vec(MO_64, v0, v1, imm);
+ tcg_gen_shli_vec(MO_64, t1, t1, 64 - imm);
+ tcg_gen_or_vec(MO_64, v0, v0, t1);
tcg_temp_free_vec(t1);
- break;
}
- /* Otherwise we will need to use a compare vs 0 to produce the
- sign-extend, shift and merge. */
- t1 = tcg_temp_new_vec(type);
- t2 = tcg_const_zeros_vec(type);
- vec_gen_4(INDEX_op_cmp_vec, type, MO_64,
- tcgv_vec_arg(t1), tcgv_vec_arg(t2), a1, TCG_COND_GT);
+ break;
+
+ default:
+ g_assert_not_reached();
+ }
+}
+
+static void expand_vec_mul(TCGType type, unsigned vece,
+ TCGv_vec v0, TCGv_vec v1, TCGv_vec v2)
+{
+ TCGv_vec t1, t2, t3, t4;
+
+ tcg_debug_assert(vece == MO_8);
+
+ /*
+ * Unpack v1 bytes to words, 0 | x.
+ * Unpack v2 bytes to words, y | 0.
+ * This leaves the 8-bit result, x * y, with 8 bits of right padding.
+ * Shift logical right by 8 bits to clear the high 8 bytes before
+ * using an unsigned saturated pack.
+ *
+ * The difference between the V64, V128 and V256 cases is merely how
+ * we distribute the expansion between temporaries.
+ */
+ switch (type) {
+ case TCG_TYPE_V64:
+ t1 = tcg_temp_new_vec(TCG_TYPE_V128);
+ t2 = tcg_temp_new_vec(TCG_TYPE_V128);
+ tcg_gen_dup16i_vec(t2, 0);
+ vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V128, MO_8,
+ tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(t2));
+ vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V128, MO_8,
+ tcgv_vec_arg(t2), tcgv_vec_arg(t2), tcgv_vec_arg(v2));
+ tcg_gen_mul_vec(MO_16, t1, t1, t2);
+ tcg_gen_shri_vec(MO_16, t1, t1, 8);
+ vec_gen_3(INDEX_op_x86_packus_vec, TCG_TYPE_V128, MO_8,
+ tcgv_vec_arg(v0), tcgv_vec_arg(t1), tcgv_vec_arg(t1));
+ tcg_temp_free_vec(t1);
tcg_temp_free_vec(t2);
- vec_gen_3(INDEX_op_shri_vec, type, MO_64, a0, a1, a2);
- vec_gen_3(INDEX_op_shli_vec, type, MO_64,
- tcgv_vec_arg(t1), tcgv_vec_arg(t1), 64 - a2);
- vec_gen_3(INDEX_op_or_vec, type, MO_64, a0, a0, tcgv_vec_arg(t1));
+ break;
+
+ case TCG_TYPE_V128:
+ case TCG_TYPE_V256:
+ t1 = tcg_temp_new_vec(type);
+ t2 = tcg_temp_new_vec(type);
+ t3 = tcg_temp_new_vec(type);
+ t4 = tcg_temp_new_vec(type);
+ tcg_gen_dup16i_vec(t4, 0);
+ vec_gen_3(INDEX_op_x86_punpckl_vec, type, MO_8,
+ tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(t4));
+ vec_gen_3(INDEX_op_x86_punpckl_vec, type, MO_8,
+ tcgv_vec_arg(t2), tcgv_vec_arg(t4), tcgv_vec_arg(v2));
+ vec_gen_3(INDEX_op_x86_punpckh_vec, type, MO_8,
+ tcgv_vec_arg(t3), tcgv_vec_arg(v1), tcgv_vec_arg(t4));
+ vec_gen_3(INDEX_op_x86_punpckh_vec, type, MO_8,
+ tcgv_vec_arg(t4), tcgv_vec_arg(t4), tcgv_vec_arg(v2));
+ tcg_gen_mul_vec(MO_16, t1, t1, t2);
+ tcg_gen_mul_vec(MO_16, t3, t3, t4);
+ tcg_gen_shri_vec(MO_16, t1, t1, 8);
+ tcg_gen_shri_vec(MO_16, t3, t3, 8);
+ vec_gen_3(INDEX_op_x86_packus_vec, type, MO_8,
+ tcgv_vec_arg(v0), tcgv_vec_arg(t1), tcgv_vec_arg(t3));
tcg_temp_free_vec(t1);
+ tcg_temp_free_vec(t2);
+ tcg_temp_free_vec(t3);
+ tcg_temp_free_vec(t4);
break;
- case INDEX_op_mul_vec:
- tcg_debug_assert(vece == MO_8);
- a1 = va_arg(va, TCGArg);
- a2 = va_arg(va, TCGArg);
- switch (type) {
- case TCG_TYPE_V64:
- t1 = tcg_temp_new_vec(TCG_TYPE_V128);
- t2 = tcg_temp_new_vec(TCG_TYPE_V128);
- tcg_gen_dup16i_vec(t2, 0);
- vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V128, MO_8,
- tcgv_vec_arg(t1), a1, tcgv_vec_arg(t2));
- vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V128, MO_8,
- tcgv_vec_arg(t2), tcgv_vec_arg(t2), a2);
- tcg_gen_mul_vec(MO_16, t1, t1, t2);
- tcg_gen_shri_vec(MO_16, t1, t1, 8);
- vec_gen_3(INDEX_op_x86_packus_vec, TCG_TYPE_V128, MO_8,
- a0, tcgv_vec_arg(t1), tcgv_vec_arg(t1));
- tcg_temp_free_vec(t1);
- tcg_temp_free_vec(t2);
- break;
+ default:
+ g_assert_not_reached();
+ }
+}
- case TCG_TYPE_V128:
- t1 = tcg_temp_new_vec(TCG_TYPE_V128);
- t2 = tcg_temp_new_vec(TCG_TYPE_V128);
- t3 = tcg_temp_new_vec(TCG_TYPE_V128);
- t4 = tcg_temp_new_vec(TCG_TYPE_V128);
- tcg_gen_dup16i_vec(t4, 0);
- vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V128, MO_8,
- tcgv_vec_arg(t1), a1, tcgv_vec_arg(t4));
- vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V128, MO_8,
- tcgv_vec_arg(t2), tcgv_vec_arg(t4), a2);
- vec_gen_3(INDEX_op_x86_punpckh_vec, TCG_TYPE_V128, MO_8,
- tcgv_vec_arg(t3), a1, tcgv_vec_arg(t4));
- vec_gen_3(INDEX_op_x86_punpckh_vec, TCG_TYPE_V128, MO_8,
- tcgv_vec_arg(t4), tcgv_vec_arg(t4), a2);
- tcg_gen_mul_vec(MO_16, t1, t1, t2);
- tcg_gen_mul_vec(MO_16, t3, t3, t4);
- tcg_gen_shri_vec(MO_16, t1, t1, 8);
- tcg_gen_shri_vec(MO_16, t3, t3, 8);
- vec_gen_3(INDEX_op_x86_packus_vec, TCG_TYPE_V128, MO_8,
- a0, tcgv_vec_arg(t1), tcgv_vec_arg(t3));
- tcg_temp_free_vec(t1);
- tcg_temp_free_vec(t2);
- tcg_temp_free_vec(t3);
- tcg_temp_free_vec(t4);
- break;
+static void expand_vec_cmp(TCGType type, unsigned vece, TCGv_vec v0,
+ TCGv_vec v1, TCGv_vec v2, TCGCond cond)
+{
+ enum {
+ NEED_SWAP = 1,
+ NEED_INV = 2,
+ NEED_BIAS = 4
+ };
+ static const uint8_t fixups[16] = {
+ [0 ... 15] = -1,
+ [TCG_COND_EQ] = 0,
+ [TCG_COND_NE] = NEED_INV,
+ [TCG_COND_GT] = 0,
+ [TCG_COND_LT] = NEED_SWAP,
+ [TCG_COND_LE] = NEED_INV,
+ [TCG_COND_GE] = NEED_SWAP | NEED_INV,
+ [TCG_COND_GTU] = NEED_BIAS,
+ [TCG_COND_LTU] = NEED_BIAS | NEED_SWAP,
+ [TCG_COND_LEU] = NEED_BIAS | NEED_INV,
+ [TCG_COND_GEU] = NEED_BIAS | NEED_SWAP | NEED_INV,
+ };
+ TCGv_vec t1, t2;
+ uint8_t fixup;
- case TCG_TYPE_V256:
- t1 = tcg_temp_new_vec(TCG_TYPE_V256);
- t2 = tcg_temp_new_vec(TCG_TYPE_V256);
- t3 = tcg_temp_new_vec(TCG_TYPE_V256);
- t4 = tcg_temp_new_vec(TCG_TYPE_V256);
- tcg_gen_dup16i_vec(t4, 0);
- /* a1: A[0-7] ... D[0-7]; a2: W[0-7] ... Z[0-7]
- t1: extends of B[0-7], D[0-7]
- t2: extends of X[0-7], Z[0-7]
- t3: extends of A[0-7], C[0-7]
- t4: extends of W[0-7], Y[0-7]. */
- vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V256, MO_8,
- tcgv_vec_arg(t1), a1, tcgv_vec_arg(t4));
- vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V256, MO_8,
- tcgv_vec_arg(t2), tcgv_vec_arg(t4), a2);
- vec_gen_3(INDEX_op_x86_punpckh_vec, TCG_TYPE_V256, MO_8,
- tcgv_vec_arg(t3), a1, tcgv_vec_arg(t4));
- vec_gen_3(INDEX_op_x86_punpckh_vec, TCG_TYPE_V256, MO_8,
- tcgv_vec_arg(t4), tcgv_vec_arg(t4), a2);
- /* t1: BX DZ; t2: AW CY. */
- tcg_gen_mul_vec(MO_16, t1, t1, t2);
- tcg_gen_mul_vec(MO_16, t3, t3, t4);
- tcg_gen_shri_vec(MO_16, t1, t1, 8);
- tcg_gen_shri_vec(MO_16, t3, t3, 8);
- /* a0: AW BX CY DZ. */
- vec_gen_3(INDEX_op_x86_packus_vec, TCG_TYPE_V256, MO_8,
- a0, tcgv_vec_arg(t1), tcgv_vec_arg(t3));
- tcg_temp_free_vec(t1);
- tcg_temp_free_vec(t2);
- tcg_temp_free_vec(t3);
- tcg_temp_free_vec(t4);
- break;
+ fixup = fixups[cond & 15];
+ tcg_debug_assert(fixup != 0xff);
- default:
- g_assert_not_reached();
+ if (fixup & NEED_INV) {
+ cond = tcg_invert_cond(cond);
+ }
+ if (fixup & NEED_SWAP) {
+ t1 = v1, v1 = v2, v2 = t1;
+ cond = tcg_swap_cond(cond);
+ }
+
+ t1 = t2 = NULL;
+ if (fixup & NEED_BIAS) {
+ t1 = tcg_temp_new_vec(type);
+ t2 = tcg_temp_new_vec(type);
+ tcg_gen_dupi_vec(vece, t2, 1ull << ((8 << vece) - 1));
+ tcg_gen_sub_vec(vece, t1, v1, t2);
+ tcg_gen_sub_vec(vece, t2, v2, t2);
+ v1 = t1;
+ v2 = t2;
+ cond = tcg_signed_cond(cond);
+ }
+
+ tcg_debug_assert(cond == TCG_COND_EQ || cond == TCG_COND_GT);
+ /* Expand directly; do not recurse. */
+ vec_gen_4(INDEX_op_cmp_vec, type, vece,
+ tcgv_vec_arg(v0), tcgv_vec_arg(v1), tcgv_vec_arg(v2), cond);
+
+ if (t1) {
+ tcg_temp_free_vec(t1);
+ if (t2) {
+ tcg_temp_free_vec(t2);
}
- break;
+ }
+ if (fixup & NEED_INV) {
+ tcg_gen_not_vec(vece, v0, v0);
+ }
+}
- case INDEX_op_cmp_vec:
- {
- enum {
- NEED_SWAP = 1,
- NEED_INV = 2,
- NEED_BIAS = 4
- };
- static const uint8_t fixups[16] = {
- [0 ... 15] = -1,
- [TCG_COND_EQ] = 0,
- [TCG_COND_NE] = NEED_INV,
- [TCG_COND_GT] = 0,
- [TCG_COND_LT] = NEED_SWAP,
- [TCG_COND_LE] = NEED_INV,
- [TCG_COND_GE] = NEED_SWAP | NEED_INV,
- [TCG_COND_GTU] = NEED_BIAS,
- [TCG_COND_LTU] = NEED_BIAS | NEED_SWAP,
- [TCG_COND_LEU] = NEED_BIAS | NEED_INV,
- [TCG_COND_GEU] = NEED_BIAS | NEED_SWAP | NEED_INV,
- };
+static void expand_vec_minmax(TCGType type, unsigned vece,
+ TCGCond cond, bool min,
+ TCGv_vec v0, TCGv_vec v1, TCGv_vec v2)
+{
+ TCGv_vec t1 = tcg_temp_new_vec(type);
- TCGCond cond;
- uint8_t fixup;
+ tcg_debug_assert(vece == MO_64);
- a1 = va_arg(va, TCGArg);
- a2 = va_arg(va, TCGArg);
- cond = va_arg(va, TCGArg);
- fixup = fixups[cond & 15];
- tcg_debug_assert(fixup != 0xff);
+ tcg_gen_cmp_vec(cond, vece, t1, v1, v2);
+ if (min) {
+ TCGv_vec t2;
+ t2 = v1, v1 = v2, v2 = t2;
+ }
+ vec_gen_4(INDEX_op_x86_vpblendvb_vec, type, vece,
+ tcgv_vec_arg(v0), tcgv_vec_arg(v1),
+ tcgv_vec_arg(v2), tcgv_vec_arg(t1));
+ tcg_temp_free_vec(t1);
+}
- if (fixup & NEED_INV) {
- cond = tcg_invert_cond(cond);
- }
- if (fixup & NEED_SWAP) {
- TCGArg t;
- t = a1, a1 = a2, a2 = t;
- cond = tcg_swap_cond(cond);
- }
+void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
+ TCGArg a0, ...)
+{
+ va_list va;
+ TCGArg a2;
+ TCGv_vec v0, v1, v2;
- t1 = t2 = NULL;
- if (fixup & NEED_BIAS) {
- t1 = tcg_temp_new_vec(type);
- t2 = tcg_temp_new_vec(type);
- tcg_gen_dupi_vec(vece, t2, 1ull << ((8 << vece) - 1));
- tcg_gen_sub_vec(vece, t1, temp_tcgv_vec(arg_temp(a1)), t2);
- tcg_gen_sub_vec(vece, t2, temp_tcgv_vec(arg_temp(a2)), t2);
- a1 = tcgv_vec_arg(t1);
- a2 = tcgv_vec_arg(t2);
- cond = tcg_signed_cond(cond);
- }
+ va_start(va, a0);
+ v0 = temp_tcgv_vec(arg_temp(a0));
+ v1 = temp_tcgv_vec(arg_temp(va_arg(va, TCGArg)));
+ a2 = va_arg(va, TCGArg);
- tcg_debug_assert(cond == TCG_COND_EQ || cond == TCG_COND_GT);
- vec_gen_4(INDEX_op_cmp_vec, type, vece, a0, a1, a2, cond);
+ switch (opc) {
+ case INDEX_op_shli_vec:
+ case INDEX_op_shri_vec:
+ expand_vec_shi(type, vece, opc == INDEX_op_shri_vec, v0, v1, a2);
+ break;
- if (fixup & NEED_BIAS) {
- tcg_temp_free_vec(t1);
- tcg_temp_free_vec(t2);
- }
- if (fixup & NEED_INV) {
- tcg_gen_not_vec(vece, v0, v0);
- }
- }
+ case INDEX_op_sari_vec:
+ expand_vec_sari(type, vece, v0, v1, a2);
+ break;
+
+ case INDEX_op_mul_vec:
+ v2 = temp_tcgv_vec(arg_temp(a2));
+ expand_vec_mul(type, vece, v0, v1, v2);
+ break;
+
+ case INDEX_op_cmp_vec:
+ v2 = temp_tcgv_vec(arg_temp(a2));
+ expand_vec_cmp(type, vece, v0, v1, v2, va_arg(va, TCGArg));
+ break;
+
+ case INDEX_op_smin_vec:
+ v2 = temp_tcgv_vec(arg_temp(a2));
+ expand_vec_minmax(type, vece, TCG_COND_GT, true, v0, v1, v2);
+ break;
+ case INDEX_op_smax_vec:
+ v2 = temp_tcgv_vec(arg_temp(a2));
+ expand_vec_minmax(type, vece, TCG_COND_GT, false, v0, v1, v2);
+ break;
+ case INDEX_op_umin_vec:
+ v2 = temp_tcgv_vec(arg_temp(a2));
+ expand_vec_minmax(type, vece, TCG_COND_GTU, true, v0, v1, v2);
+ break;
+ case INDEX_op_umax_vec:
+ v2 = temp_tcgv_vec(arg_temp(a2));
+ expand_vec_minmax(type, vece, TCG_COND_GTU, false, v0, v1, v2);
break;
default:
return i;
}
-/* Perform the tlb comparison operation. The complete host address is
- placed in BASE. Clobbers TMP0, TMP1, TMP2, A0. */
+/* We expect tlb_mask to be before tlb_table. */
+QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table) <
+ offsetof(CPUArchState, tlb_mask));
+
+/* We expect tlb_mask to be "near" tlb_table. */
+QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table) -
+ offsetof(CPUArchState, tlb_mask) >= 0x8000);
+
+/*
+ * Perform the tlb comparison operation.
+ * The complete host address is placed in BASE.
+ * Clobbers TMP0, TMP1, TMP2, TMP3.
+ */
static void tcg_out_tlb_load(TCGContext *s, TCGReg base, TCGReg addrl,
TCGReg addrh, TCGMemOpIdx oi,
tcg_insn_unit *label_ptr[2], bool is_load)
TCGMemOp opc = get_memop(oi);
unsigned s_bits = opc & MO_SIZE;
unsigned a_bits = get_alignment_bits(opc);
- target_ulong mask;
int mem_index = get_mmuidx(oi);
- int cmp_off
- = (is_load
- ? offsetof(CPUArchState, tlb_table[mem_index][0].addr_read)
- : offsetof(CPUArchState, tlb_table[mem_index][0].addr_write));
- int add_off = offsetof(CPUArchState, tlb_table[mem_index][0].addend);
+ int mask_off = offsetof(CPUArchState, tlb_mask[mem_index]);
+ int table_off = offsetof(CPUArchState, tlb_table[mem_index]);
+ int add_off = offsetof(CPUTLBEntry, addend);
+ int cmp_off = (is_load ? offsetof(CPUTLBEntry, addr_read)
+ : offsetof(CPUTLBEntry, addr_write));
+ TCGReg mask_base = TCG_AREG0, table_base = TCG_AREG0;
+ target_ulong mask;
+
+ if (table_off > 0x7fff) {
+ int mask_hi = mask_off - (int16_t)mask_off;
+ int table_hi = table_off - (int16_t)table_off;
+
+ table_base = TCG_TMP1;
+ if (likely(mask_hi == table_hi)) {
+ mask_base = table_base;
+ tcg_out_opc_imm(s, OPC_LUI, mask_base, TCG_REG_ZERO, mask_hi >> 16);
+ tcg_out_opc_reg(s, ALIAS_PADD, mask_base, mask_base, TCG_AREG0);
+ mask_off -= mask_hi;
+ table_off -= mask_hi;
+ } else {
+ if (mask_hi != 0) {
+ mask_base = TCG_TMP0;
+ tcg_out_opc_imm(s, OPC_LUI,
+ mask_base, TCG_REG_ZERO, mask_hi >> 16);
+ tcg_out_opc_reg(s, ALIAS_PADD,
+ mask_base, mask_base, TCG_AREG0);
+ }
+ table_off -= mask_off;
+ mask_off -= mask_hi;
+ tcg_out_opc_imm(s, ALIAS_PADDI, table_base, mask_base, mask_off);
+ }
+ }
- tcg_out_opc_sa(s, ALIAS_TSRL, TCG_REG_A0, addrl,
+ /* Load tlb_mask[mmu_idx] and tlb_table[mmu_idx]. */
+ tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP0, mask_base, mask_off);
+ tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP1, table_base, table_off);
+
+ /* Extract the TLB index from the address into TMP3. */
+ tcg_out_opc_sa(s, ALIAS_TSRL, TCG_TMP3, addrl,
TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
- tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_A0, TCG_REG_A0,
- (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
- tcg_out_opc_reg(s, ALIAS_PADD, TCG_REG_A0, TCG_REG_A0, TCG_AREG0);
+ tcg_out_opc_reg(s, OPC_AND, TCG_TMP3, TCG_TMP3, TCG_TMP0);
- /* Compensate for very large offsets. */
- while (add_off >= 0x8000) {
- /* Most target env are smaller than 32k, but a few are larger than 64k,
- * so handle an arbitrarily large offset.
- */
- tcg_out_opc_imm(s, ALIAS_PADDI, TCG_REG_A0, TCG_REG_A0, 0x7ff0);
- cmp_off -= 0x7ff0;
- add_off -= 0x7ff0;
- }
+ /* Add the tlb_table pointer, creating the CPUTLBEntry address in TMP3. */
+ tcg_out_opc_reg(s, ALIAS_PADD, TCG_TMP3, TCG_TMP3, TCG_TMP1);
/* We don't currently support unaligned accesses.
We could do so with mips32r6. */
a_bits = s_bits;
}
+ /* Mask the page bits, keeping the alignment bits to compare against. */
mask = (target_ulong)TARGET_PAGE_MASK | ((1 << a_bits) - 1);
- /* Load the (low half) tlb comparator. Mask the page bits, keeping the
- alignment bits to compare against. */
+ /* Load the (low-half) tlb comparator. */
if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
- tcg_out_ld(s, TCG_TYPE_I32, TCG_TMP0, TCG_REG_A0, cmp_off + LO_OFF);
+ tcg_out_ld(s, TCG_TYPE_I32, TCG_TMP0, TCG_TMP3, cmp_off + LO_OFF);
tcg_out_movi(s, TCG_TYPE_I32, TCG_TMP1, mask);
} else {
- tcg_out_ldst(s,
- (TARGET_LONG_BITS == 64 ? OPC_LD
- : TCG_TARGET_REG_BITS == 64 ? OPC_LWU : OPC_LW),
- TCG_TMP0, TCG_REG_A0, cmp_off);
+ tcg_out_ldst(s, (TARGET_LONG_BITS == 64 ? OPC_LD
+ : TCG_TARGET_REG_BITS == 64 ? OPC_LWU : OPC_LW),
+ TCG_TMP0, TCG_TMP3, cmp_off);
tcg_out_movi(s, TCG_TYPE_TL, TCG_TMP1, mask);
/* No second compare is required here;
load the tlb addend for the fast path. */
- tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP2, TCG_REG_A0, add_off);
+ tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP2, TCG_TMP3, add_off);
}
tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrl);
/* Load and test the high half tlb comparator. */
if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
/* delay slot */
- tcg_out_ld(s, TCG_TYPE_I32, TCG_TMP0, TCG_REG_A0, cmp_off + HI_OFF);
+ tcg_out_ld(s, TCG_TYPE_I32, TCG_TMP0, TCG_TMP3, cmp_off + HI_OFF);
/* Load the tlb addend for the fast path. */
- tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP2, TCG_REG_A0, add_off);
+ tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP2, TCG_TMP3, add_off);
label_ptr[1] = s->code_ptr;
tcg_out_opc_br(s, OPC_BNE, addrh, TCG_TMP0);
}
}
- reloc_pc16(s->code_ptr, l->raddr);
tcg_out_opc_br(s, OPC_BEQ, TCG_REG_ZERO, TCG_REG_ZERO);
+ reloc_pc16(s->code_ptr - 1, l->raddr);
+
/* delay slot */
if (TCG_TARGET_REG_BITS == 64 && l->type == TCG_TYPE_I32) {
/* we always sign-extend 32-bit loads */
#define LHZ OPCD( 40)
#define LHA OPCD( 42)
#define LWZ OPCD( 32)
+#define LWZUX XO31( 55)
#define STB OPCD( 38)
#define STH OPCD( 44)
#define STW OPCD( 36)
#define LD XO58( 0)
#define LDX XO31( 21)
#define LDU XO58( 1)
+#define LDUX XO31( 53)
#define LWA XO58( 2)
#define LWAX XO31(341)
[MO_BEQ] = helper_be_stq_mmu,
};
+/* We expect tlb_mask to be before tlb_table. */
+QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table) <
+ offsetof(CPUArchState, tlb_mask));
+
/* Perform the TLB load and compare. Places the result of the comparison
in CR7, loads the addend of the TLB into R3, and returns the register
containing the guest address (zero-extended into R4). Clobbers R0 and R2. */
{
int cmp_off
= (is_read
- ? offsetof(CPUArchState, tlb_table[mem_index][0].addr_read)
- : offsetof(CPUArchState, tlb_table[mem_index][0].addr_write));
- int add_off = offsetof(CPUArchState, tlb_table[mem_index][0].addend);
- TCGReg base = TCG_AREG0;
+ ? offsetof(CPUTLBEntry, addr_read)
+ : offsetof(CPUTLBEntry, addr_write));
+ int mask_off = offsetof(CPUArchState, tlb_mask[mem_index]);
+ int table_off = offsetof(CPUArchState, tlb_table[mem_index]);
+ TCGReg mask_base = TCG_AREG0, table_base = TCG_AREG0;
unsigned s_bits = opc & MO_SIZE;
unsigned a_bits = get_alignment_bits(opc);
+ if (table_off > 0x7fff) {
+ int mask_hi = mask_off - (int16_t)mask_off;
+ int table_hi = table_off - (int16_t)table_off;
+
+ table_base = TCG_REG_R4;
+ if (mask_hi == table_hi) {
+ mask_base = table_base;
+ } else if (mask_hi) {
+ mask_base = TCG_REG_R3;
+ tcg_out32(s, ADDIS | TAI(mask_base, TCG_AREG0, mask_hi >> 16));
+ }
+ tcg_out32(s, ADDIS | TAI(table_base, TCG_AREG0, table_hi >> 16));
+ mask_off -= mask_hi;
+ table_off -= table_hi;
+ }
+
+ /* Load tlb_mask[mmu_idx] and tlb_table[mmu_idx]. */
+ tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_R3, mask_base, mask_off);
+ tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_R4, table_base, table_off);
+
/* Extract the page index, shifted into place for tlb index. */
- if (TCG_TARGET_REG_BITS == 64) {
- if (TARGET_LONG_BITS == 32) {
- /* Zero-extend the address into a place helpful for further use. */
- tcg_out_ext32u(s, TCG_REG_R4, addrlo);
- addrlo = TCG_REG_R4;
- } else {
- tcg_out_rld(s, RLDICL, TCG_REG_R3, addrlo,
- 64 - TARGET_PAGE_BITS, 64 - CPU_TLB_BITS);
- }
- }
-
- /* Compensate for very large offsets. */
- if (add_off >= 0x8000) {
- int low = (int16_t)cmp_off;
- int high = cmp_off - low;
- assert((high & 0xffff) == 0);
- assert(cmp_off - high == (int16_t)(cmp_off - high));
- assert(add_off - high == (int16_t)(add_off - high));
- tcg_out32(s, ADDIS | TAI(TCG_REG_TMP1, base, high >> 16));
- base = TCG_REG_TMP1;
- cmp_off -= high;
- add_off -= high;
- }
-
- /* Extraction and shifting, part 2. */
- if (TCG_TARGET_REG_BITS == 32 || TARGET_LONG_BITS == 32) {
- tcg_out_rlw(s, RLWINM, TCG_REG_R3, addrlo,
- 32 - (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
- 32 - (CPU_TLB_BITS + CPU_TLB_ENTRY_BITS),
- 31 - CPU_TLB_ENTRY_BITS);
+ if (TCG_TARGET_REG_BITS == 32) {
+ tcg_out_shri32(s, TCG_REG_TMP1, addrlo,
+ TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
} else {
- tcg_out_shli64(s, TCG_REG_R3, TCG_REG_R3, CPU_TLB_ENTRY_BITS);
+ tcg_out_shri64(s, TCG_REG_TMP1, addrlo,
+ TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
}
+ tcg_out32(s, AND | SAB(TCG_REG_R3, TCG_REG_R3, TCG_REG_TMP1));
- tcg_out32(s, ADD | TAB(TCG_REG_R3, TCG_REG_R3, base));
-
- /* Load the tlb comparator. */
- if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
- tcg_out_ld(s, TCG_TYPE_I32, TCG_REG_R4, TCG_REG_R3, cmp_off);
- tcg_out_ld(s, TCG_TYPE_I32, TCG_REG_TMP1, TCG_REG_R3, cmp_off + 4);
+ /* Load the TLB comparator. */
+ if (cmp_off == 0 && TCG_TARGET_REG_BITS >= TARGET_LONG_BITS) {
+ uint32_t lxu = (TCG_TARGET_REG_BITS == 32 || TARGET_LONG_BITS == 32
+ ? LWZUX : LDUX);
+ tcg_out32(s, lxu | TAB(TCG_REG_TMP1, TCG_REG_R3, TCG_REG_R4));
} else {
- tcg_out_ld(s, TCG_TYPE_TL, TCG_REG_TMP1, TCG_REG_R3, cmp_off);
+ tcg_out32(s, ADD | TAB(TCG_REG_R3, TCG_REG_R3, TCG_REG_R4));
+ if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
+ tcg_out_ld(s, TCG_TYPE_I32, TCG_REG_TMP1, TCG_REG_R3, cmp_off + 4);
+ tcg_out_ld(s, TCG_TYPE_I32, TCG_REG_R4, TCG_REG_R3, cmp_off);
+ } else {
+ tcg_out_ld(s, TCG_TYPE_TL, TCG_REG_TMP1, TCG_REG_R3, cmp_off);
+ }
}
/* Load the TLB addend for use on the fast path. Do this asap
to minimize any load use delay. */
- tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_R3, TCG_REG_R3, add_off);
+ tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_R3, TCG_REG_R3,
+ offsetof(CPUTLBEntry, addend));
/* Clear the non-page, non-alignment bits from the address */
if (TCG_TARGET_REG_BITS == 32) {
if (TARGET_LONG_BITS == 32) {
tcg_out_rlw(s, RLWINM, TCG_REG_R0, t, 0,
(32 - a_bits) & 31, 31 - TARGET_PAGE_BITS);
+ /* Zero-extend the address for use in the final address. */
+ tcg_out_ext32u(s, TCG_REG_R4, addrlo);
+ addrlo = TCG_REG_R4;
} else if (a_bits == 0) {
tcg_out_rld(s, RLDICR, TCG_REG_R0, t, 0, 63 - TARGET_PAGE_BITS);
} else {
[MO_BEQ] = helper_be_stq_mmu,
};
+/* We don't support oversize guests */
+QEMU_BUILD_BUG_ON(TCG_TARGET_REG_BITS < TARGET_LONG_BITS);
+
+/* We expect tlb_mask to be before tlb_table. */
+QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table) <
+ offsetof(CPUArchState, tlb_mask));
+
+/* We expect tlb_mask to be "near" tlb_table. */
+QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table) -
+ offsetof(CPUArchState, tlb_mask) >= 0x800);
+
static void tcg_out_tlb_load(TCGContext *s, TCGReg addrl,
TCGReg addrh, TCGMemOpIdx oi,
tcg_insn_unit **label_ptr, bool is_load)
TCGMemOp opc = get_memop(oi);
unsigned s_bits = opc & MO_SIZE;
unsigned a_bits = get_alignment_bits(opc);
- target_ulong mask;
+ tcg_target_long compare_mask;
int mem_index = get_mmuidx(oi);
- int cmp_off
- = (is_load
- ? offsetof(CPUArchState, tlb_table[mem_index][0].addr_read)
- : offsetof(CPUArchState, tlb_table[mem_index][0].addr_write));
- int add_off = offsetof(CPUArchState, tlb_table[mem_index][0].addend);
- RISCVInsn load_cmp_op = (TARGET_LONG_BITS == 64 ? OPC_LD :
- TCG_TARGET_REG_BITS == 64 ? OPC_LWU : OPC_LW);
- RISCVInsn load_add_op = TCG_TARGET_REG_BITS == 64 ? OPC_LD : OPC_LW;
- TCGReg base = TCG_AREG0;
-
- /* We don't support oversize guests */
- if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
- g_assert_not_reached();
- }
-
- /* We don't support unaligned accesses. */
- if (a_bits < s_bits) {
- a_bits = s_bits;
- }
- mask = (target_ulong)TARGET_PAGE_MASK | ((1 << a_bits) - 1);
-
-
- /* Compensate for very large offsets. */
- if (add_off >= 0x1000) {
- int adj;
- base = TCG_REG_TMP2;
- if (cmp_off <= 2 * 0xfff) {
- adj = 0xfff;
- tcg_out_opc_imm(s, OPC_ADDI, base, TCG_AREG0, adj);
+ int mask_off, table_off;
+ TCGReg mask_base = TCG_AREG0, table_base = TCG_AREG0;
+
+ mask_off = offsetof(CPUArchState, tlb_mask[mem_index]);
+ table_off = offsetof(CPUArchState, tlb_table[mem_index]);
+ if (table_off > 0x7ff) {
+ int mask_hi = mask_off - sextreg(mask_off, 0, 12);
+ int table_hi = table_off - sextreg(table_off, 0, 12);
+
+ if (likely(mask_hi == table_hi)) {
+ mask_base = table_base = TCG_REG_TMP1;
+ tcg_out_opc_upper(s, OPC_LUI, mask_base, mask_hi);
+ tcg_out_opc_reg(s, OPC_ADD, mask_base, mask_base, TCG_AREG0);
+ mask_off -= mask_hi;
+ table_off -= mask_hi;
} else {
- adj = cmp_off - sextreg(cmp_off, 0, 12);
- tcg_debug_assert(add_off - adj >= -0x1000
- && add_off - adj < 0x1000);
-
- tcg_out_opc_upper(s, OPC_LUI, base, adj);
- tcg_out_opc_reg(s, OPC_ADD, base, base, TCG_AREG0);
+ mask_base = TCG_REG_TMP0;
+ table_base = TCG_REG_TMP1;
+ tcg_out_opc_upper(s, OPC_LUI, mask_base, mask_hi);
+ tcg_out_opc_reg(s, OPC_ADD, mask_base, mask_base, TCG_AREG0);
+ table_off -= mask_off;
+ mask_off -= mask_hi;
+ tcg_out_opc_imm(s, OPC_ADDI, table_base, mask_base, mask_off);
}
- add_off -= adj;
- cmp_off -= adj;
}
- /* Extract the page index. */
- if (CPU_TLB_BITS + CPU_TLB_ENTRY_BITS < 12) {
- tcg_out_opc_imm(s, OPC_SRLI, TCG_REG_TMP0, addrl,
- TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
- tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_TMP0, TCG_REG_TMP0,
- MAKE_64BIT_MASK(CPU_TLB_ENTRY_BITS, CPU_TLB_BITS));
- } else if (TARGET_PAGE_BITS >= 12) {
- tcg_out_opc_upper(s, OPC_LUI, TCG_REG_TMP0,
- MAKE_64BIT_MASK(TARGET_PAGE_BITS, CPU_TLB_BITS));
- tcg_out_opc_reg(s, OPC_AND, TCG_REG_TMP0, TCG_REG_TMP0, addrl);
- tcg_out_opc_imm(s, OPC_SRLI, TCG_REG_TMP0, TCG_REG_TMP0,
- CPU_TLB_BITS - CPU_TLB_ENTRY_BITS);
- } else {
- tcg_out_opc_imm(s, OPC_SRLI, TCG_REG_TMP0, addrl, TARGET_PAGE_BITS);
- tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_TMP0, TCG_REG_TMP0,
- MAKE_64BIT_MASK(0, CPU_TLB_BITS));
- tcg_out_opc_imm(s, OPC_SLLI, TCG_REG_TMP0, TCG_REG_TMP0,
- CPU_TLB_ENTRY_BITS);
- }
+ tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, mask_base, mask_off);
+ tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, table_base, table_off);
- /* Add that to the base address to index the tlb. */
- tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP2, base, TCG_REG_TMP0);
- base = TCG_REG_TMP2;
+ tcg_out_opc_imm(s, OPC_SRLI, TCG_REG_TMP2, addrl,
+ TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
+ tcg_out_opc_reg(s, OPC_AND, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP0);
+ tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP1);
/* Load the tlb comparator and the addend. */
- tcg_out_ldst(s, load_cmp_op, TCG_REG_TMP0, base, cmp_off);
- tcg_out_ldst(s, load_add_op, TCG_REG_TMP2, base, add_off);
+ tcg_out_ld(s, TCG_TYPE_TL, TCG_REG_TMP0, TCG_REG_TMP2,
+ is_load ? offsetof(CPUTLBEntry, addr_read)
+ : offsetof(CPUTLBEntry, addr_write));
+ tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP2, TCG_REG_TMP2,
+ offsetof(CPUTLBEntry, addend));
+ /* We don't support unaligned accesses. */
+ if (a_bits < s_bits) {
+ a_bits = s_bits;
+ }
/* Clear the non-page, non-alignment bits from the address. */
- if (mask == sextreg(mask, 0, 12)) {
- tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_TMP1, addrl, mask);
+ compare_mask = (tcg_target_long)TARGET_PAGE_MASK | ((1 << a_bits) - 1);
+ if (compare_mask == sextreg(compare_mask, 0, 12)) {
+ tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_TMP1, addrl, compare_mask);
} else {
- tcg_out_movi(s, TCG_TYPE_REG, TCG_REG_TMP1, mask);
+ tcg_out_movi(s, TCG_TYPE_TL, TCG_REG_TMP1, compare_mask);
tcg_out_opc_reg(s, OPC_AND, TCG_REG_TMP1, TCG_REG_TMP1, addrl);
- }
+ }
/* Compare masked address with the TLB entry. */
label_ptr[0] = s->code_ptr;
tcg_out_opc_branch(s, OPC_BNE, TCG_REG_TMP0, TCG_REG_TMP1, 0);
/* NOP to allow patching later */
tcg_out_opc_imm(s, OPC_ADDI, TCG_REG_ZERO, TCG_REG_ZERO, 0);
- /* TODO: Move this out of line
- * see:
- * https://lists.nongnu.org/archive/html/qemu-devel/2018-11/msg02234.html
- */
/* TLB Hit - translate address using addend. */
if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
#if defined(CONFIG_SOFTMMU)
#include "tcg-ldst.inc.c"
-/* We're expecting to use a 20-bit signed offset on the tlb memory ops.
- Using the offset of the second entry in the last tlb table ensures
- that we can index all of the elements of the first entry. */
-QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table[NB_MMU_MODES - 1][1])
+/* We're expecting to use a 20-bit signed offset on the tlb memory ops. */
+QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_mask[NB_MMU_MODES - 1])
+ > 0x7ffff);
+QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table[NB_MMU_MODES - 1])
> 0x7ffff);
/* Load and compare a TLB entry, leaving the flags set. Loads the TLB
unsigned a_bits = get_alignment_bits(opc);
unsigned s_mask = (1 << s_bits) - 1;
unsigned a_mask = (1 << a_bits) - 1;
+ int mask_off = offsetof(CPUArchState, tlb_mask[mem_index]);
+ int table_off = offsetof(CPUArchState, tlb_table[mem_index]);
int ofs, a_off;
uint64_t tlb_mask;
+ tcg_out_sh64(s, RSY_SRLG, TCG_REG_R2, addr_reg, TCG_REG_NONE,
+ TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
+ tcg_out_insn(s, RXY, NG, TCG_REG_R2, TCG_AREG0, TCG_REG_NONE, mask_off);
+ tcg_out_insn(s, RXY, AG, TCG_REG_R2, TCG_AREG0, TCG_REG_NONE, table_off);
+
/* For aligned accesses, we check the first byte and include the alignment
bits within the address. For unaligned access, we check that we don't
cross pages using the address of the last byte of the access. */
a_off = (a_bits >= s_bits ? 0 : s_mask - a_mask);
tlb_mask = (uint64_t)TARGET_PAGE_MASK | a_mask;
-
- if (s390_facilities & FACILITY_GEN_INST_EXT) {
- tcg_out_risbg(s, TCG_REG_R2, addr_reg,
- 64 - CPU_TLB_BITS - CPU_TLB_ENTRY_BITS,
- 63 - CPU_TLB_ENTRY_BITS,
- 64 + CPU_TLB_ENTRY_BITS - TARGET_PAGE_BITS, 1);
- if (a_off) {
- tcg_out_insn(s, RX, LA, TCG_REG_R3, addr_reg, TCG_REG_NONE, a_off);
- tgen_andi(s, TCG_TYPE_TL, TCG_REG_R3, tlb_mask);
- } else {
- tgen_andi_risbg(s, TCG_REG_R3, addr_reg, tlb_mask);
- }
+ if ((s390_facilities & FACILITY_GEN_INST_EXT) && a_off == 0) {
+ tgen_andi_risbg(s, TCG_REG_R3, addr_reg, tlb_mask);
} else {
- tcg_out_sh64(s, RSY_SRLG, TCG_REG_R2, addr_reg, TCG_REG_NONE,
- TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
tcg_out_insn(s, RX, LA, TCG_REG_R3, addr_reg, TCG_REG_NONE, a_off);
- tgen_andi(s, TCG_TYPE_I64, TCG_REG_R2,
- (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
tgen_andi(s, TCG_TYPE_TL, TCG_REG_R3, tlb_mask);
}
if (is_ld) {
- ofs = offsetof(CPUArchState, tlb_table[mem_index][0].addr_read);
+ ofs = offsetof(CPUTLBEntry, addr_read);
} else {
- ofs = offsetof(CPUArchState, tlb_table[mem_index][0].addr_write);
+ ofs = offsetof(CPUTLBEntry, addr_write);
}
if (TARGET_LONG_BITS == 32) {
- tcg_out_mem(s, RX_C, RXY_CY, TCG_REG_R3, TCG_REG_R2, TCG_AREG0, ofs);
+ tcg_out_insn(s, RX, C, TCG_REG_R3, TCG_REG_R2, TCG_REG_NONE, ofs);
} else {
- tcg_out_mem(s, 0, RXY_CG, TCG_REG_R3, TCG_REG_R2, TCG_AREG0, ofs);
+ tcg_out_insn(s, RXY, CG, TCG_REG_R3, TCG_REG_R2, TCG_REG_NONE, ofs);
}
- ofs = offsetof(CPUArchState, tlb_table[mem_index][0].addend);
- tcg_out_mem(s, 0, RXY_LG, TCG_REG_R2, TCG_REG_R2, TCG_AREG0, ofs);
+ tcg_out_insn(s, RXY, LG, TCG_REG_R2, TCG_REG_R2, TCG_REG_NONE,
+ offsetof(CPUTLBEntry, addend));
if (TARGET_LONG_BITS == 32) {
tgen_ext32u(s, TCG_REG_R3, addr_reg);
The result of the TLB comparison is in %[ix]cc. The sanitized address
is in the returned register, maybe %o0. The TLB addend is in %o1. */
+/* We expect tlb_mask to be before tlb_table. */
+QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table) <
+ offsetof(CPUArchState, tlb_mask));
+
+/* We expect tlb_mask to be "near" tlb_table. */
+QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table) -
+ offsetof(CPUArchState, tlb_mask) >= (1 << 13));
+
static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addr, int mem_index,
TCGMemOp opc, int which)
{
+ int mask_off = offsetof(CPUArchState, tlb_mask[mem_index]);
+ int table_off = offsetof(CPUArchState, tlb_table[mem_index]);
+ TCGReg base = TCG_AREG0;
const TCGReg r0 = TCG_REG_O0;
const TCGReg r1 = TCG_REG_O1;
const TCGReg r2 = TCG_REG_O2;
unsigned s_bits = opc & MO_SIZE;
unsigned a_bits = get_alignment_bits(opc);
- int tlb_ofs;
+ tcg_target_long compare_mask;
+
+ if (!check_fit_i32(table_off, 13)) {
+ int table_hi;
+
+ base = r1;
+ if (table_off <= 2 * 0xfff) {
+ table_hi = 0xfff;
+ tcg_out_arithi(s, base, TCG_AREG0, table_hi, ARITH_ADD);
+ } else {
+ table_hi = table_off & ~0x3ff;
+ tcg_out_sethi(s, base, table_hi);
+ tcg_out_arith(s, base, TCG_AREG0, base, ARITH_ADD);
+ }
+ mask_off -= table_hi;
+ table_off -= table_hi;
+ tcg_debug_assert(check_fit_i32(mask_off, 13));
+ }
+
+ /* Load tlb_mask[mmu_idx] and tlb_table[mmu_idx]. */
+ tcg_out_ld(s, TCG_TYPE_PTR, r0, base, mask_off);
+ tcg_out_ld(s, TCG_TYPE_PTR, r1, base, table_off);
- /* Shift the page number down. */
- tcg_out_arithi(s, r1, addr, TARGET_PAGE_BITS, SHIFT_SRL);
+ /* Extract the page index, shifted into place for tlb index. */
+ tcg_out_arithi(s, r2, addr, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS,
+ SHIFT_SRL);
+ tcg_out_arith(s, r2, r2, r0, ARITH_AND);
+
+ /* Add the tlb_table pointer, creating the CPUTLBEntry address into R2. */
+ tcg_out_arith(s, r2, r2, r1, ARITH_ADD);
+
+ /* Load the tlb comparator and the addend. */
+ tcg_out_ld(s, TCG_TYPE_TL, r0, r2, which);
+ tcg_out_ld(s, TCG_TYPE_PTR, r1, r2, offsetof(CPUTLBEntry, addend));
/* Mask out the page offset, except for the required alignment.
We don't support unaligned accesses. */
if (a_bits < s_bits) {
a_bits = s_bits;
}
- tcg_out_movi(s, TCG_TYPE_TL, TCG_REG_T1,
- TARGET_PAGE_MASK | ((1 << a_bits) - 1));
-
- /* Mask the tlb index. */
- tcg_out_arithi(s, r1, r1, CPU_TLB_SIZE - 1, ARITH_AND);
-
- /* Mask page, part 2. */
- tcg_out_arith(s, r0, addr, TCG_REG_T1, ARITH_AND);
-
- /* Shift the tlb index into place. */
- tcg_out_arithi(s, r1, r1, CPU_TLB_ENTRY_BITS, SHIFT_SLL);
-
- /* Relative to the current ENV. */
- tcg_out_arith(s, r1, TCG_AREG0, r1, ARITH_ADD);
-
- /* Find a base address that can load both tlb comparator and addend. */
- tlb_ofs = offsetof(CPUArchState, tlb_table[mem_index][0]);
- if (!check_fit_ptr(tlb_ofs + sizeof(CPUTLBEntry), 13)) {
- if (tlb_ofs & ~0x3ff) {
- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_T1, tlb_ofs & ~0x3ff);
- tcg_out_arith(s, r1, r1, TCG_REG_T1, ARITH_ADD);
- }
- tlb_ofs &= 0x3ff;
+ compare_mask = (tcg_target_ulong)TARGET_PAGE_MASK | ((1 << a_bits) - 1);
+ if (check_fit_tl(compare_mask, 13)) {
+ tcg_out_arithi(s, r2, addr, compare_mask, ARITH_AND);
+ } else {
+ tcg_out_movi(s, TCG_TYPE_TL, r2, compare_mask);
+ tcg_out_arith(s, r2, addr, r2, ARITH_AND);
}
-
- /* Load the tlb comparator and the addend. */
- tcg_out_ld(s, TCG_TYPE_TL, r2, r1, tlb_ofs + which);
- tcg_out_ld(s, TCG_TYPE_PTR, r1, r1, tlb_ofs+offsetof(CPUTLBEntry, addend));
-
- /* subcc arg0, arg2, %g0 */
tcg_out_cmp(s, r0, r2, 0);
/* If the guest address must be zero-extended, do so now. */
/* Expand OPSZ bytes worth of three-operand operations using i32 elements. */
static void expand_4_i32(uint32_t dofs, uint32_t aofs, uint32_t bofs,
- uint32_t cofs, uint32_t oprsz,
+ uint32_t cofs, uint32_t oprsz, bool write_aofs,
void (*fni)(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32))
{
TCGv_i32 t0 = tcg_temp_new_i32();
tcg_gen_ld_i32(t3, cpu_env, cofs + i);
fni(t0, t1, t2, t3);
tcg_gen_st_i32(t0, cpu_env, dofs + i);
+ if (write_aofs) {
+ tcg_gen_st_i32(t1, cpu_env, aofs + i);
+ }
}
tcg_temp_free_i32(t3);
tcg_temp_free_i32(t2);
/* Expand OPSZ bytes worth of three-operand operations using i64 elements. */
static void expand_4_i64(uint32_t dofs, uint32_t aofs, uint32_t bofs,
- uint32_t cofs, uint32_t oprsz,
+ uint32_t cofs, uint32_t oprsz, bool write_aofs,
void (*fni)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64))
{
TCGv_i64 t0 = tcg_temp_new_i64();
tcg_gen_ld_i64(t3, cpu_env, cofs + i);
fni(t0, t1, t2, t3);
tcg_gen_st_i64(t0, cpu_env, dofs + i);
+ if (write_aofs) {
+ tcg_gen_st_i64(t1, cpu_env, aofs + i);
+ }
}
tcg_temp_free_i64(t3);
tcg_temp_free_i64(t2);
/* Expand OPSZ bytes worth of four-operand operations using host vectors. */
static void expand_4_vec(unsigned vece, uint32_t dofs, uint32_t aofs,
uint32_t bofs, uint32_t cofs, uint32_t oprsz,
- uint32_t tysz, TCGType type,
+ uint32_t tysz, TCGType type, bool write_aofs,
void (*fni)(unsigned, TCGv_vec, TCGv_vec,
TCGv_vec, TCGv_vec))
{
tcg_gen_ld_vec(t3, cpu_env, cofs + i);
fni(vece, t0, t1, t2, t3);
tcg_gen_st_vec(t0, cpu_env, dofs + i);
+ if (write_aofs) {
+ tcg_gen_st_vec(t1, cpu_env, aofs + i);
+ }
}
tcg_temp_free_vec(t3);
tcg_temp_free_vec(t2);
*/
some = QEMU_ALIGN_DOWN(oprsz, 32);
expand_4_vec(g->vece, dofs, aofs, bofs, cofs, some,
- 32, TCG_TYPE_V256, g->fniv);
+ 32, TCG_TYPE_V256, g->write_aofs, g->fniv);
if (some == oprsz) {
break;
}
/* fallthru */
case TCG_TYPE_V128:
expand_4_vec(g->vece, dofs, aofs, bofs, cofs, oprsz,
- 16, TCG_TYPE_V128, g->fniv);
+ 16, TCG_TYPE_V128, g->write_aofs, g->fniv);
break;
case TCG_TYPE_V64:
expand_4_vec(g->vece, dofs, aofs, bofs, cofs, oprsz,
- 8, TCG_TYPE_V64, g->fniv);
+ 8, TCG_TYPE_V64, g->write_aofs, g->fniv);
break;
case 0:
if (g->fni8 && check_size_impl(oprsz, 8)) {
- expand_4_i64(dofs, aofs, bofs, cofs, oprsz, g->fni8);
+ expand_4_i64(dofs, aofs, bofs, cofs, oprsz,
+ g->write_aofs, g->fni8);
} else if (g->fni4 && check_size_impl(oprsz, 4)) {
- expand_4_i32(dofs, aofs, bofs, cofs, oprsz, g->fni4);
+ expand_4_i32(dofs, aofs, bofs, cofs, oprsz,
+ g->write_aofs, g->fni4);
} else {
assert(g->fno != NULL);
tcg_gen_gvec_4_ool(dofs, aofs, bofs, cofs,
uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
{
static const GVecGen3 g[4] = {
- { .fno = gen_helper_gvec_ssadd8, .vece = MO_8 },
- { .fno = gen_helper_gvec_ssadd16, .vece = MO_16 },
- { .fno = gen_helper_gvec_ssadd32, .vece = MO_32 },
- { .fno = gen_helper_gvec_ssadd64, .vece = MO_64 }
+ { .fniv = tcg_gen_ssadd_vec,
+ .fno = gen_helper_gvec_ssadd8,
+ .opc = INDEX_op_ssadd_vec,
+ .vece = MO_8 },
+ { .fniv = tcg_gen_ssadd_vec,
+ .fno = gen_helper_gvec_ssadd16,
+ .opc = INDEX_op_ssadd_vec,
+ .vece = MO_16 },
+ { .fniv = tcg_gen_ssadd_vec,
+ .fno = gen_helper_gvec_ssadd32,
+ .opc = INDEX_op_ssadd_vec,
+ .vece = MO_32 },
+ { .fniv = tcg_gen_ssadd_vec,
+ .fno = gen_helper_gvec_ssadd64,
+ .opc = INDEX_op_ssadd_vec,
+ .vece = MO_64 },
};
tcg_debug_assert(vece <= MO_64);
tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g[vece]);
uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
{
static const GVecGen3 g[4] = {
- { .fno = gen_helper_gvec_sssub8, .vece = MO_8 },
- { .fno = gen_helper_gvec_sssub16, .vece = MO_16 },
- { .fno = gen_helper_gvec_sssub32, .vece = MO_32 },
- { .fno = gen_helper_gvec_sssub64, .vece = MO_64 }
+ { .fniv = tcg_gen_sssub_vec,
+ .fno = gen_helper_gvec_sssub8,
+ .opc = INDEX_op_sssub_vec,
+ .vece = MO_8 },
+ { .fniv = tcg_gen_sssub_vec,
+ .fno = gen_helper_gvec_sssub16,
+ .opc = INDEX_op_sssub_vec,
+ .vece = MO_16 },
+ { .fniv = tcg_gen_sssub_vec,
+ .fno = gen_helper_gvec_sssub32,
+ .opc = INDEX_op_sssub_vec,
+ .vece = MO_32 },
+ { .fniv = tcg_gen_sssub_vec,
+ .fno = gen_helper_gvec_sssub64,
+ .opc = INDEX_op_sssub_vec,
+ .vece = MO_64 },
};
tcg_debug_assert(vece <= MO_64);
tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g[vece]);
}
-static void tcg_gen_vec_usadd32_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
+static void tcg_gen_usadd_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
{
TCGv_i32 max = tcg_const_i32(-1);
tcg_gen_add_i32(d, a, b);
tcg_temp_free_i32(max);
}
-static void tcg_gen_vec_usadd32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
+static void tcg_gen_usadd_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
{
TCGv_i64 max = tcg_const_i64(-1);
tcg_gen_add_i64(d, a, b);
uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
{
static const GVecGen3 g[4] = {
- { .fno = gen_helper_gvec_usadd8, .vece = MO_8 },
- { .fno = gen_helper_gvec_usadd16, .vece = MO_16 },
- { .fni4 = tcg_gen_vec_usadd32_i32,
+ { .fniv = tcg_gen_usadd_vec,
+ .fno = gen_helper_gvec_usadd8,
+ .opc = INDEX_op_usadd_vec,
+ .vece = MO_8 },
+ { .fniv = tcg_gen_usadd_vec,
+ .fno = gen_helper_gvec_usadd16,
+ .opc = INDEX_op_usadd_vec,
+ .vece = MO_16 },
+ { .fni4 = tcg_gen_usadd_i32,
+ .fniv = tcg_gen_usadd_vec,
.fno = gen_helper_gvec_usadd32,
+ .opc = INDEX_op_usadd_vec,
.vece = MO_32 },
- { .fni8 = tcg_gen_vec_usadd32_i64,
+ { .fni8 = tcg_gen_usadd_i64,
+ .fniv = tcg_gen_usadd_vec,
.fno = gen_helper_gvec_usadd64,
+ .opc = INDEX_op_usadd_vec,
.vece = MO_64 }
};
tcg_debug_assert(vece <= MO_64);
tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g[vece]);
}
-static void tcg_gen_vec_ussub32_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
+static void tcg_gen_ussub_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
{
TCGv_i32 min = tcg_const_i32(0);
tcg_gen_sub_i32(d, a, b);
tcg_temp_free_i32(min);
}
-static void tcg_gen_vec_ussub32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
+static void tcg_gen_ussub_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
{
TCGv_i64 min = tcg_const_i64(0);
tcg_gen_sub_i64(d, a, b);
uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
{
static const GVecGen3 g[4] = {
- { .fno = gen_helper_gvec_ussub8, .vece = MO_8 },
- { .fno = gen_helper_gvec_ussub16, .vece = MO_16 },
- { .fni4 = tcg_gen_vec_ussub32_i32,
+ { .fniv = tcg_gen_ussub_vec,
+ .fno = gen_helper_gvec_ussub8,
+ .opc = INDEX_op_ussub_vec,
+ .vece = MO_8 },
+ { .fniv = tcg_gen_ussub_vec,
+ .fno = gen_helper_gvec_ussub16,
+ .opc = INDEX_op_ussub_vec,
+ .vece = MO_16 },
+ { .fni4 = tcg_gen_ussub_i32,
+ .fniv = tcg_gen_ussub_vec,
.fno = gen_helper_gvec_ussub32,
+ .opc = INDEX_op_ussub_vec,
.vece = MO_32 },
- { .fni8 = tcg_gen_vec_ussub32_i64,
+ { .fni8 = tcg_gen_ussub_i64,
+ .fniv = tcg_gen_ussub_vec,
.fno = gen_helper_gvec_ussub64,
+ .opc = INDEX_op_ussub_vec,
+ .vece = MO_64 }
+ };
+ tcg_debug_assert(vece <= MO_64);
+ tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g[vece]);
+}
+
+void tcg_gen_gvec_smin(unsigned vece, uint32_t dofs, uint32_t aofs,
+ uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
+{
+ static const GVecGen3 g[4] = {
+ { .fniv = tcg_gen_smin_vec,
+ .fno = gen_helper_gvec_smin8,
+ .opc = INDEX_op_smin_vec,
+ .vece = MO_8 },
+ { .fniv = tcg_gen_smin_vec,
+ .fno = gen_helper_gvec_smin16,
+ .opc = INDEX_op_smin_vec,
+ .vece = MO_16 },
+ { .fni4 = tcg_gen_smin_i32,
+ .fniv = tcg_gen_smin_vec,
+ .fno = gen_helper_gvec_smin32,
+ .opc = INDEX_op_smin_vec,
+ .vece = MO_32 },
+ { .fni8 = tcg_gen_smin_i64,
+ .fniv = tcg_gen_smin_vec,
+ .fno = gen_helper_gvec_smin64,
+ .opc = INDEX_op_smin_vec,
+ .vece = MO_64 }
+ };
+ tcg_debug_assert(vece <= MO_64);
+ tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g[vece]);
+}
+
+void tcg_gen_gvec_umin(unsigned vece, uint32_t dofs, uint32_t aofs,
+ uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
+{
+ static const GVecGen3 g[4] = {
+ { .fniv = tcg_gen_umin_vec,
+ .fno = gen_helper_gvec_umin8,
+ .opc = INDEX_op_umin_vec,
+ .vece = MO_8 },
+ { .fniv = tcg_gen_umin_vec,
+ .fno = gen_helper_gvec_umin16,
+ .opc = INDEX_op_umin_vec,
+ .vece = MO_16 },
+ { .fni4 = tcg_gen_umin_i32,
+ .fniv = tcg_gen_umin_vec,
+ .fno = gen_helper_gvec_umin32,
+ .opc = INDEX_op_umin_vec,
+ .vece = MO_32 },
+ { .fni8 = tcg_gen_umin_i64,
+ .fniv = tcg_gen_umin_vec,
+ .fno = gen_helper_gvec_umin64,
+ .opc = INDEX_op_umin_vec,
+ .vece = MO_64 }
+ };
+ tcg_debug_assert(vece <= MO_64);
+ tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g[vece]);
+}
+
+void tcg_gen_gvec_smax(unsigned vece, uint32_t dofs, uint32_t aofs,
+ uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
+{
+ static const GVecGen3 g[4] = {
+ { .fniv = tcg_gen_smax_vec,
+ .fno = gen_helper_gvec_smax8,
+ .opc = INDEX_op_smax_vec,
+ .vece = MO_8 },
+ { .fniv = tcg_gen_smax_vec,
+ .fno = gen_helper_gvec_smax16,
+ .opc = INDEX_op_smax_vec,
+ .vece = MO_16 },
+ { .fni4 = tcg_gen_smax_i32,
+ .fniv = tcg_gen_smax_vec,
+ .fno = gen_helper_gvec_smax32,
+ .opc = INDEX_op_smax_vec,
+ .vece = MO_32 },
+ { .fni8 = tcg_gen_smax_i64,
+ .fniv = tcg_gen_smax_vec,
+ .fno = gen_helper_gvec_smax64,
+ .opc = INDEX_op_smax_vec,
+ .vece = MO_64 }
+ };
+ tcg_debug_assert(vece <= MO_64);
+ tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g[vece]);
+}
+
+void tcg_gen_gvec_umax(unsigned vece, uint32_t dofs, uint32_t aofs,
+ uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
+{
+ static const GVecGen3 g[4] = {
+ { .fniv = tcg_gen_umax_vec,
+ .fno = gen_helper_gvec_umax8,
+ .opc = INDEX_op_umax_vec,
+ .vece = MO_8 },
+ { .fniv = tcg_gen_umax_vec,
+ .fno = gen_helper_gvec_umax16,
+ .opc = INDEX_op_umax_vec,
+ .vece = MO_16 },
+ { .fni4 = tcg_gen_umax_i32,
+ .fniv = tcg_gen_umax_vec,
+ .fno = gen_helper_gvec_umax32,
+ .opc = INDEX_op_umax_vec,
+ .vece = MO_32 },
+ { .fni8 = tcg_gen_umax_i64,
+ .fniv = tcg_gen_umax_vec,
+ .fno = gen_helper_gvec_umax64,
+ .opc = INDEX_op_umax_vec,
.vece = MO_64 }
};
tcg_debug_assert(vece <= MO_64);
.opc = INDEX_op_and_vec,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
};
- tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
+
+ if (aofs == bofs) {
+ tcg_gen_gvec_mov(vece, dofs, aofs, oprsz, maxsz);
+ } else {
+ tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
+ }
}
void tcg_gen_gvec_or(unsigned vece, uint32_t dofs, uint32_t aofs,
.opc = INDEX_op_or_vec,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
};
- tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
+
+ if (aofs == bofs) {
+ tcg_gen_gvec_mov(vece, dofs, aofs, oprsz, maxsz);
+ } else {
+ tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
+ }
}
void tcg_gen_gvec_xor(unsigned vece, uint32_t dofs, uint32_t aofs,
.opc = INDEX_op_xor_vec,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
};
- tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
+
+ if (aofs == bofs) {
+ tcg_gen_gvec_dup8i(dofs, oprsz, maxsz, 0);
+ } else {
+ tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
+ }
}
void tcg_gen_gvec_andc(unsigned vece, uint32_t dofs, uint32_t aofs,
.opc = INDEX_op_andc_vec,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
};
- tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
+
+ if (aofs == bofs) {
+ tcg_gen_gvec_dup8i(dofs, oprsz, maxsz, 0);
+ } else {
+ tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
+ }
}
void tcg_gen_gvec_orc(unsigned vece, uint32_t dofs, uint32_t aofs,
.opc = INDEX_op_orc_vec,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
};
- tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
+
+ if (aofs == bofs) {
+ tcg_gen_gvec_dup8i(dofs, oprsz, maxsz, -1);
+ } else {
+ tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
+ }
+}
+
+void tcg_gen_gvec_nand(unsigned vece, uint32_t dofs, uint32_t aofs,
+ uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
+{
+ static const GVecGen3 g = {
+ .fni8 = tcg_gen_nand_i64,
+ .fniv = tcg_gen_nand_vec,
+ .fno = gen_helper_gvec_nand,
+ .prefer_i64 = TCG_TARGET_REG_BITS == 64,
+ };
+
+ if (aofs == bofs) {
+ tcg_gen_gvec_not(vece, dofs, aofs, oprsz, maxsz);
+ } else {
+ tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
+ }
+}
+
+void tcg_gen_gvec_nor(unsigned vece, uint32_t dofs, uint32_t aofs,
+ uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
+{
+ static const GVecGen3 g = {
+ .fni8 = tcg_gen_nor_i64,
+ .fniv = tcg_gen_nor_vec,
+ .fno = gen_helper_gvec_nor,
+ .prefer_i64 = TCG_TARGET_REG_BITS == 64,
+ };
+
+ if (aofs == bofs) {
+ tcg_gen_gvec_not(vece, dofs, aofs, oprsz, maxsz);
+ } else {
+ tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
+ }
+}
+
+void tcg_gen_gvec_eqv(unsigned vece, uint32_t dofs, uint32_t aofs,
+ uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
+{
+ static const GVecGen3 g = {
+ .fni8 = tcg_gen_eqv_i64,
+ .fniv = tcg_gen_eqv_vec,
+ .fno = gen_helper_gvec_eqv,
+ .prefer_i64 = TCG_TARGET_REG_BITS == 64,
+ };
+
+ if (aofs == bofs) {
+ tcg_gen_gvec_dup8i(dofs, oprsz, maxsz, -1);
+ } else {
+ tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);
+ }
}
static const GVecGen2s gop_ands = {
uint8_t vece;
/* Prefer i64 to v64. */
bool prefer_i64;
+ /* Write aofs as a 2nd dest operand. */
+ bool write_aofs;
} GVecGen4;
void tcg_gen_gvec_2(uint32_t dofs, uint32_t aofs,
void tcg_gen_gvec_ussub(unsigned vece, uint32_t dofs, uint32_t aofs,
uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
+/* Min/max. */
+void tcg_gen_gvec_smin(unsigned vece, uint32_t dofs, uint32_t aofs,
+ uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
+void tcg_gen_gvec_umin(unsigned vece, uint32_t dofs, uint32_t aofs,
+ uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
+void tcg_gen_gvec_smax(unsigned vece, uint32_t dofs, uint32_t aofs,
+ uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
+void tcg_gen_gvec_umax(unsigned vece, uint32_t dofs, uint32_t aofs,
+ uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
+
void tcg_gen_gvec_and(unsigned vece, uint32_t dofs, uint32_t aofs,
uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_or(unsigned vece, uint32_t dofs, uint32_t aofs,
uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_orc(unsigned vece, uint32_t dofs, uint32_t aofs,
uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
+void tcg_gen_gvec_nand(unsigned vece, uint32_t dofs, uint32_t aofs,
+ uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
+void tcg_gen_gvec_nor(unsigned vece, uint32_t dofs, uint32_t aofs,
+ uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
+void tcg_gen_gvec_eqv(unsigned vece, uint32_t dofs, uint32_t aofs,
+ uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
void tcg_gen_gvec_andi(unsigned vece, uint32_t dofs, uint32_t aofs,
int64_t c, uint32_t oprsz, uint32_t maxsz);
}
}
+void tcg_gen_nand_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
+{
+ /* TODO: Add TCG_TARGET_HAS_nand_vec when adding a backend supports it. */
+ tcg_gen_and_vec(0, r, a, b);
+ tcg_gen_not_vec(0, r, r);
+}
+
+void tcg_gen_nor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
+{
+ /* TODO: Add TCG_TARGET_HAS_nor_vec when adding a backend supports it. */
+ tcg_gen_or_vec(0, r, a, b);
+ tcg_gen_not_vec(0, r, r);
+}
+
+void tcg_gen_eqv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
+{
+ /* TODO: Add TCG_TARGET_HAS_eqv_vec when adding a backend supports it. */
+ tcg_gen_xor_vec(0, r, a, b);
+ tcg_gen_not_vec(0, r, r);
+}
+
void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a)
{
if (TCG_TARGET_HAS_not_vec) {
}
}
-void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
+static void do_op3(unsigned vece, TCGv_vec r, TCGv_vec a,
+ TCGv_vec b, TCGOpcode opc)
{
TCGTemp *rt = tcgv_vec_temp(r);
TCGTemp *at = tcgv_vec_temp(a);
tcg_debug_assert(at->base_type >= type);
tcg_debug_assert(bt->base_type >= type);
- can = tcg_can_emit_vec_op(INDEX_op_mul_vec, type, vece);
+ can = tcg_can_emit_vec_op(opc, type, vece);
if (can > 0) {
- vec_gen_3(INDEX_op_mul_vec, type, vece, ri, ai, bi);
+ vec_gen_3(opc, type, vece, ri, ai, bi);
} else {
tcg_debug_assert(can < 0);
- tcg_expand_vec_op(INDEX_op_mul_vec, type, vece, ri, ai, bi);
+ tcg_expand_vec_op(opc, type, vece, ri, ai, bi);
}
}
+
+void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
+{
+ do_op3(vece, r, a, b, INDEX_op_mul_vec);
+}
+
+void tcg_gen_ssadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
+{
+ do_op3(vece, r, a, b, INDEX_op_ssadd_vec);
+}
+
+void tcg_gen_usadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
+{
+ do_op3(vece, r, a, b, INDEX_op_usadd_vec);
+}
+
+void tcg_gen_sssub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
+{
+ do_op3(vece, r, a, b, INDEX_op_sssub_vec);
+}
+
+void tcg_gen_ussub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
+{
+ do_op3(vece, r, a, b, INDEX_op_ussub_vec);
+}
+
+void tcg_gen_smin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
+{
+ do_op3(vece, r, a, b, INDEX_op_smin_vec);
+}
+
+void tcg_gen_umin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
+{
+ do_op3(vece, r, a, b, INDEX_op_umin_vec);
+}
+
+void tcg_gen_smax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
+{
+ do_op3(vece, r, a, b, INDEX_op_smax_vec);
+}
+
+void tcg_gen_umax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
+{
+ do_op3(vece, r, a, b, INDEX_op_umax_vec);
+}
void tcg_gen_xor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
void tcg_gen_andc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
void tcg_gen_orc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
+void tcg_gen_nand_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
+void tcg_gen_nor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
+void tcg_gen_eqv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
void tcg_gen_neg_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
+void tcg_gen_ssadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
+void tcg_gen_usadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
+void tcg_gen_sssub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
+void tcg_gen_ussub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
+void tcg_gen_smin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
+void tcg_gen_umin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
+void tcg_gen_smax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
+void tcg_gen_umax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
void tcg_gen_shli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
void tcg_gen_shri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
DEF(sub_vec, 1, 2, 0, IMPLVEC)
DEF(mul_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_mul_vec))
DEF(neg_vec, 1, 1, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_neg_vec))
+DEF(ssadd_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_sat_vec))
+DEF(usadd_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_sat_vec))
+DEF(sssub_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_sat_vec))
+DEF(ussub_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_sat_vec))
+DEF(smin_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_minmax_vec))
+DEF(umin_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_minmax_vec))
+DEF(smax_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_minmax_vec))
+DEF(umax_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_minmax_vec))
DEF(and_vec, 1, 2, 0, IMPLVEC)
DEF(or_vec, 1, 2, 0, IMPLVEC)
case INDEX_op_shrv_vec:
case INDEX_op_sarv_vec:
return have_vec && TCG_TARGET_HAS_shv_vec;
+ case INDEX_op_ssadd_vec:
+ case INDEX_op_usadd_vec:
+ case INDEX_op_sssub_vec:
+ case INDEX_op_ussub_vec:
+ return have_vec && TCG_TARGET_HAS_sat_vec;
+ case INDEX_op_smin_vec:
+ case INDEX_op_umin_vec:
+ case INDEX_op_smax_vec:
+ case INDEX_op_umax_vec:
+ return have_vec && TCG_TARGET_HAS_minmax_vec;
default:
tcg_debug_assert(op > INDEX_op_last_generic && op < NB_OPS);
#define TCG_TARGET_HAS_shs_vec 0
#define TCG_TARGET_HAS_shv_vec 0
#define TCG_TARGET_HAS_mul_vec 0
+#define TCG_TARGET_HAS_sat_vec 0
+#define TCG_TARGET_HAS_minmax_vec 0
#else
#define TCG_TARGET_MAYBE_vec 1
#endif
@echo " $(MAKE) check-qapi-schema Run QAPI schema tests"
@echo " $(MAKE) check-block Run block tests"
@echo " $(MAKE) check-tcg Run TCG tests"
+ @echo " $(MAKE) check-softfloat Run FPU emulation tests"
@echo " $(MAKE) check-acceptance Run all acceptance (functional) tests"
@echo
@echo " $(MAKE) check-report.html Generates an HTML test report"
test-util-obj-y = libqemuutil.a
test-qom-obj-y = $(qom-obj-y) $(test-util-obj-y)
test-qapi-obj-y = tests/test-qapi-visit.o tests/test-qapi-types.o \
- tests/test-qapi-events.o tests/test-qapi-introspect.o \
+ tests/test-qapi-introspect.o \
$(test-qom-obj-y)
benchmark-crypto-obj-y = $(crypto-obj-y) $(test-qom-obj-y)
test-crypto-obj-y = $(crypto-obj-y) $(test-qom-obj-y)
tests/test-string-output-visitor$(EXESUF): tests/test-string-output-visitor.o $(test-qapi-obj-y)
tests/test-string-input-visitor$(EXESUF): tests/test-string-input-visitor.o $(test-qapi-obj-y)
-tests/test-qmp-event$(EXESUF): tests/test-qmp-event.o $(test-qapi-obj-y)
+tests/test-qmp-event$(EXESUF): tests/test-qmp-event.o $(test-qapi-obj-y) tests/test-qapi-events.o
tests/test-qobject-output-visitor$(EXESUF): tests/test-qobject-output-visitor.o $(test-qapi-obj-y)
tests/test-clone-visitor$(EXESUF): tests/test-clone-visitor.o $(test-qapi-obj-y)
tests/test-qobject-input-visitor$(EXESUF): tests/test-qobject-input-visitor.o $(test-qapi-obj-y)
check-report.tap: $(patsubst %,check-report-qtest-%.tap, $(QTEST_TARGETS)) check-report-unit.tap
$(call quiet-command,./scripts/tap-merge.py $^ > $@,"GEN","$@")
+# FPU Emulation tests (aka softfloat)
+#
+# As we still have some places that need fixing the rules are a little
+# more complex than they need to be and have to override some of the
+# generic Makefile expansions. Once we are cleanly passing all
+# the tests we can simplify the make syntax.
+
+FP_TEST_BIN=$(BUILD_DIR)/tests/fp/fp-test
+
+# the build dir is created by configure
+.PHONY: $(FP_TEST_BIN)
+$(FP_TEST_BIN):
+ $(call quiet-command, \
+ $(MAKE) $(SUBDIR_MAKEFLAGS) -C $(dir $@) V="$(V)" $(notdir $@), \
+ "BUILD", "$(notdir $@)")
+
+# The full test suite can take a bit of time, default to a quick run
+ifeq ($(SPEED), quick)
+FP_TL=-l 1
+else
+FP_TL=-l 2 -r all
+endif
+
+# $1 = tests, $2 = description
+test-softfloat = $(call quiet-command, \
+ cd $(BUILD_DIR)/tests/fp && \
+ ./fp-test -s $(FP_TL) $1 > $2.out 2>&1 || \
+ (cat $2.out && exit 1;), \
+ "FLOAT TEST", $2)
+
+# Conversion Routines:
+# FIXME: i32_to_extF80 (broken), i64_to_extF80 (broken)
+# ui32_to_f128 (not implemented), f128_to_ui32 (not implemented)
+# extF80_roundToInt (broken)
+#
+check-softfloat-conv: $(FP_TEST_BIN)
+ $(call test-softfloat, \
+ i32_to_f16 i64_to_f16 \
+ i32_to_f32 i64_to_f32 \
+ i32_to_f64 i64_to_f64 \
+ i32_to_f128 i64_to_f128, int-to-float)
+ $(call test-softfloat, \
+ ui32_to_f16 ui64_to_f16 \
+ ui32_to_f32 ui64_to_f32 \
+ ui32_to_f64 ui64_to_f64 \
+ ui64_to_f128, uint-to-float)
+ $(call test-softfloat, \
+ f16_to_i32 f16_to_i32_r_minMag \
+ f32_to_i32 f32_to_i32_r_minMag \
+ f64_to_i32 f64_to_i32_r_minMag \
+ extF80_to_i32 extF80_to_i32_r_minMag \
+ f128_to_i32 f128_to_i32_r_minMag \
+ f16_to_i64 f16_to_i64_r_minMag \
+ f32_to_i64 f32_to_i64_r_minMag \
+ f64_to_i64 f64_to_i64_r_minMag \
+ extF80_to_i64 extF80_to_i64_r_minMag \
+ f128_to_i64 f128_to_i64_r_minMag, \
+ float-to-int)
+ $(call test-softfloat, \
+ f16_to_ui32 f16_to_ui32_r_minMag \
+ f32_to_ui32 f32_to_ui32_r_minMag \
+ f64_to_ui32 f64_to_ui32_r_minMag \
+ f16_to_ui64 f16_to_ui64_r_minMag \
+ f32_to_ui64 f32_to_ui64_r_minMag \
+ f64_to_ui64 f64_to_ui64_r_minMag, \
+ float-to-uint)
+ $(call test-softfloat, \
+ f16_roundToInt f32_roundToInt \
+ f64_roundToInt f128_roundToInt, \
+ round-to-integer)
+
+# Generic rule for all float operations
+#
+# Some patterns are overidden due to broken or missing tests.
+# Hopefully these can be removed over time.
+
+check-softfloat-%: $(FP_TEST_BIN)
+ $(call test-softfloat, f16_$* f32_$* f64_$* extF80_$* f128_$*, $*)
+
+# Float Compare routines
+SF_COMPARE_OPS=eq eq_signaling le le_quiet lt_quiet
+SF_COMPARE_RULES=$(patsubst %,check-softfloat-%, $(SF_COMPARE_OPS))
+
+# FIXME: extF80_le_quiet (broken)
+check-softfloat-le_quiet: $(FP_TEST_BIN)
+ $(call test-softfloat, \
+ f16_le_quiet f32_le_quiet f64_le_quiet \
+ f128_le_quiet, \
+ le_quiet)
+
+# FIXME: extF80_lt_quiet (broken)
+check-softfloat-lt_quiet: $(FP_TEST_BIN)
+ $(call test-softfloat, \
+ f16_lt_quiet f32_lt_quiet f64_lt_quiet \
+ f128_lt_quiet, \
+ lt_quiet)
+
+.PHONY: check-softfloat-compare
+check-softfloat-compare: $(SF_COMPARE_RULES)
+
+# Math Operations
+
+# FIXME: extF80_mulAdd (missing)
+check-softfloat-mulAdd: $(FP_TEST_BIN)
+ $(call test-softfloat, \
+ f16_mulAdd f32_mulAdd f64_mulAdd f128_mulAdd, \
+ mulAdd)
+
+# FIXME: extF80_rem (broken)
+check-softfloat-rem: $(FP_TEST_BIN)
+ $(call test-softfloat, \
+ f16_rem f32_rem f64_rem f128_rem, \
+ rem)
+
+SF_MATH_OPS=add sub mul mulAdd div rem sqrt
+SF_MATH_RULES=$(patsubst %,check-softfloat-%, $(SF_MATH_OPS))
+
+.PHONY: check-softfloat-ops
+check-softfloat-ops: $(SF_MATH_RULES)
+
+# Finally a generic rule to test all of softfoat. If TCG isnt't
+# enabled we define a null operation which skips the tests.
+
+.PHONY: check-softfloat
+ifeq ($(CONFIG_TCG),y)
+check-softfloat: check-softfloat-conv check-softfloat-compare check-softfloat-ops
+else
+check-softfloat:
+ $(call quiet-command, /bin/true, "FLOAT TEST", \
+ "SKIPPED for non-TCG builds")
+endif
+
# Per guest TCG tests
LINUX_USER_TARGETS=$(filter %-linux-user,$(TARGET_DIRS))
build-tcg: $(BUILD_TCG_TARGET_RULES)
.PHONY: check-tcg
-check-tcg: $(RUN_TCG_TARGET_RULES)
+check-tcg: check-softfloat $(RUN_TCG_TARGET_RULES)
.PHONY: clean-tcg
clean-tcg: $(CLEAN_TCG_TARGET_RULES)
check-qapi-schema: $(patsubst %,check-%, $(check-qapi-schema-y)) check-tests/qapi-schema/doc-good.texi
check-qtest: $(patsubst %,check-qtest-%, $(QTEST_TARGETS))
check-block: $(patsubst %,check-%, $(check-block-y))
-check: check-qapi-schema check-unit check-qtest check-decodetree
+check: check-qapi-schema check-unit check-softfloat check-qtest check-decodetree
check-clean:
rm -rf $(check-unit-y) tests/*.o $(QEMU_IOTESTS_HELPERS-y)
rm -rf $(sort $(foreach target,$(SYSEMU_TARGET_LIST), $(check-qtest-$(target)-y)) $(check-qtest-generic-y))
"\xCE\xBA\xE1\xBD\xB9\xCF\x83\xCE\xBC\xCE\xB5",
"\xCE\xBA\xE1\xBD\xB9\xCF\x83\xCE\xBC\xCE\xB5",
"\\u03BA\\u1F79\\u03C3\\u03BC\\u03B5",
+ },
+ /* '%' character when not interpolating */
+ {
+ "100%",
+ "100%",
},
/* 2 Boundary condition test cases */
/* 2.1 First possible sequence of a certain length */
TF_CFLAGS :=
TF_CFLAGS += -Wno-strict-prototypes
TF_CFLAGS += -Wno-unknown-pragmas
-TF_CFLAGS += -Wno-discarded-qualifiers
-TF_CFLAGS += -Wno-maybe-uninitialized
+TF_CFLAGS += -Wno-uninitialized
TF_CFLAGS += -Wno-missing-prototypes
TF_CFLAGS += -Wno-return-type
TF_CFLAGS += -Wno-unused-function
-Subproject commit ca9fa2ba05625ba929958f163b01747e07dd39cc
+Subproject commit 5a59dcec19327396a011a17fd924aed4fec416b3
for (i = 0; i < n_ops; i++) {
uint64_t r = random_ops[i];
- if (prec == PREC_SINGLE || PREC_FLOAT32) {
+ switch (prec) {
+ case PREC_SINGLE:
+ case PREC_FLOAT32:
do {
r = xorshift64star(r);
} while (!float32_is_normal(r));
- } else if (prec == PREC_DOUBLE || PREC_FLOAT64) {
+ break;
+ case PREC_DOUBLE:
+ case PREC_FLOAT64:
do {
r = xorshift64star(r);
} while (!float64_is_normal(r));
- } else {
+ break;
+ default:
g_assert_not_reached();
}
random_ops[i] = r;
if (no_neg && float32_is_neg(ops[i].f32)) {
ops[i].f32 = float32_chs(ops[i].f32);
}
- /* raise the exponent to limit the frequency of denormal results */
- ops[i].f32 |= 0x40000000;
break;
case PREC_DOUBLE:
case PREC_FLOAT64:
if (no_neg && float64_is_neg(ops[i].f64)) {
ops[i].f64 = float64_chs(ops[i].f64);
}
- /* raise the exponent to limit the frequency of denormal results */
- ops[i].f64 |= LIT64(0x4000000000000000);
break;
default:
g_assert_not_reached();
return 0;
}
-static uint8_t slow_clear_flags(void)
+static uint_fast8_t slow_clear_flags(void)
{
uint8_t prev = slowfloat_exceptionFlags;
return prev;
}
-static uint8_t qemu_clear_flags(void)
+static uint_fast8_t qemu_clear_flags(void)
{
uint8_t prev = qemu_flags_to_sf(qsf.float_exception_flags);
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "config-host.h"
#ifndef HOST_WORDS_BIGENDIAN
#define LITTLEENDIAN 1
return s;
}
+QTestState *qtest_init_with_serial(const char *extra_args, int *sock_fd)
+{
+ int sock_fd_init;
+ char *sock_path, sock_dir[] = "/tmp/qtest-serial-XXXXXX";
+ QTestState *qts;
+
+ g_assert_true(mkdtemp(sock_dir) != NULL);
+ sock_path = g_strdup_printf("%s/sock", sock_dir);
+
+ sock_fd_init = init_socket(sock_path);
+
+ qts = qtest_initf("-chardev socket,id=s0,path=%s -serial chardev:s0 %s",
+ sock_path, extra_args);
+
+ *sock_fd = socket_accept(sock_fd_init);
+
+ unlink(sock_path);
+ g_free(sock_path);
+ rmdir(sock_dir);
+
+ g_assert_true(*sock_fd >= 0);
+
+ return qts;
+}
+
void qtest_quit(QTestState *s)
{
g_hook_destroy_link(&abrt_hooks, g_hook_find_data(&abrt_hooks, TRUE, s));
*/
QTestState *qtest_init_without_qmp_handshake(const char *extra_args);
+/**
+ * qtest_init_with_serial:
+ * @extra_args: other arguments to pass to QEMU. CAUTION: these
+ * arguments are subject to word splitting and shell evaluation.
+ * @sock_fd: pointer to store the socket file descriptor for
+ * connection with serial.
+ *
+ * Returns: #QTestState instance.
+ */
+QTestState *qtest_init_with_serial(const char *extra_args, int *sock_fd);
+
/**
* qtest_quit:
* @s: #QTestState instance to operate on.
#include "libqtest.h"
#include "hw/arm/nrf51.h"
+#include "hw/char/nrf51_uart.h"
#include "hw/gpio/nrf51_gpio.h"
#include "hw/timer/nrf51_timer.h"
+#include "hw/i2c/microbit_i2c.h"
+
+static bool uart_wait_for_event(QTestState *qts, uint32_t event_addr)
+{
+ time_t now, start = time(NULL);
+
+ while (true) {
+ if (qtest_readl(qts, event_addr) == 1) {
+ qtest_writel(qts, event_addr, 0x00);
+ return true;
+ }
+
+ /* Wait at most 10 minutes */
+ now = time(NULL);
+ if (now - start > 600) {
+ break;
+ }
+ g_usleep(10000);
+ }
+
+ return false;
+}
+
+static void uart_rw_to_rxd(QTestState *qts, int sock_fd, const char *in,
+ char *out)
+{
+ int i, in_len = strlen(in);
+
+ g_assert_true(write(sock_fd, in, in_len) == in_len);
+ for (i = 0; i < in_len; i++) {
+ g_assert_true(uart_wait_for_event(qts, NRF51_UART_BASE +
+ A_UART_RXDRDY));
+ out[i] = qtest_readl(qts, NRF51_UART_BASE + A_UART_RXD);
+ }
+ out[i] = '\0';
+}
+
+static void uart_w_to_txd(QTestState *qts, const char *in)
+{
+ int i, in_len = strlen(in);
+
+ for (i = 0; i < in_len; i++) {
+ qtest_writel(qts, NRF51_UART_BASE + A_UART_TXD, in[i]);
+ g_assert_true(uart_wait_for_event(qts, NRF51_UART_BASE +
+ A_UART_TXDRDY));
+ }
+}
+
+static void test_nrf51_uart(void)
+{
+ int sock_fd;
+ char s[10];
+ QTestState *qts = qtest_init_with_serial("-M microbit", &sock_fd);
+
+ g_assert_true(write(sock_fd, "c", 1) == 1);
+ g_assert_cmphex(qtest_readl(qts, NRF51_UART_BASE + A_UART_RXD), ==, 0x00);
+
+ qtest_writel(qts, NRF51_UART_BASE + A_UART_ENABLE, 0x04);
+ qtest_writel(qts, NRF51_UART_BASE + A_UART_STARTRX, 0x01);
+
+ g_assert_true(uart_wait_for_event(qts, NRF51_UART_BASE + A_UART_RXDRDY));
+ qtest_writel(qts, NRF51_UART_BASE + A_UART_RXDRDY, 0x00);
+ g_assert_cmphex(qtest_readl(qts, NRF51_UART_BASE + A_UART_RXD), ==, 'c');
+
+ qtest_writel(qts, NRF51_UART_BASE + A_UART_INTENSET, 0x04);
+ g_assert_cmphex(qtest_readl(qts, NRF51_UART_BASE + A_UART_INTEN), ==, 0x04);
+ qtest_writel(qts, NRF51_UART_BASE + A_UART_INTENCLR, 0x04);
+ g_assert_cmphex(qtest_readl(qts, NRF51_UART_BASE + A_UART_INTEN), ==, 0x00);
+
+ uart_rw_to_rxd(qts, sock_fd, "hello", s);
+ g_assert_true(memcmp(s, "hello", 5) == 0);
+
+ qtest_writel(qts, NRF51_UART_BASE + A_UART_STARTTX, 0x01);
+ uart_w_to_txd(qts, "d");
+ g_assert_true(read(sock_fd, s, 10) == 1);
+ g_assert_cmphex(s[0], ==, 'd');
+
+ qtest_writel(qts, NRF51_UART_BASE + A_UART_SUSPEND, 0x01);
+ qtest_writel(qts, NRF51_UART_BASE + A_UART_TXD, 'h');
+ qtest_writel(qts, NRF51_UART_BASE + A_UART_STARTTX, 0x01);
+ uart_w_to_txd(qts, "world");
+ g_assert_true(read(sock_fd, s, 10) == 5);
+ g_assert_true(memcmp(s, "world", 5) == 0);
+
+ close(sock_fd);
+
+ qtest_quit(qts);
+}
+
+/* Read a byte from I2C device at @addr from register @reg */
+static uint32_t i2c_read_byte(QTestState *qts, uint32_t addr, uint32_t reg)
+{
+ uint32_t val;
+
+ qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ADDRESS, addr);
+ qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STARTTX, 1);
+ qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_TXD, reg);
+ val = qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_EVENT_TXDSENT);
+ g_assert_cmpuint(val, ==, 1);
+ qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1);
+
+ qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STARTRX, 1);
+ val = qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_EVENT_RXDREADY);
+ g_assert_cmpuint(val, ==, 1);
+ val = qtest_readl(qts, NRF51_TWI_BASE + NRF51_TWI_REG_RXD);
+ qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1);
+
+ return val;
+}
+
+static void test_microbit_i2c(void)
+{
+ uint32_t val;
+ QTestState *qts = qtest_init("-M microbit");
+
+ /* We don't program pins/irqs but at least enable the device */
+ qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 5);
+
+ /* MMA8653 magnetometer detection */
+ val = i2c_read_byte(qts, 0x3A, 0x0D);
+ g_assert_cmpuint(val, ==, 0x5A);
+
+ val = i2c_read_byte(qts, 0x3A, 0x0D);
+ g_assert_cmpuint(val, ==, 0x5A);
+
+ /* LSM303 accelerometer detection */
+ val = i2c_read_byte(qts, 0x3C, 0x4F);
+ g_assert_cmpuint(val, ==, 0x40);
+
+ qtest_writel(qts, NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 0);
+
+ qtest_quit(qts);
+}
static void test_nrf51_gpio(void)
{
{NRF51_GPIO_REG_DIRCLR, 0x00000000}
};
+ QTestState *qts = qtest_init("-M microbit");
+
/* Check reset state */
for (i = 0; i < ARRAY_SIZE(reset_state); i++) {
expected = reset_state[i].expected;
- actual = readl(NRF51_GPIO_BASE + reset_state[i].addr);
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + reset_state[i].addr);
g_assert_cmpuint(actual, ==, expected);
}
for (i = 0; i < NRF51_GPIO_PINS; i++) {
expected = 0x00000002;
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START + i * 4);
+ actual = qtest_readl(qts, NRF51_GPIO_BASE +
+ NRF51_GPIO_REG_CNF_START + i * 4);
g_assert_cmpuint(actual, ==, expected);
}
/* Check dir bit consistency between dir and cnf */
/* Check set via DIRSET */
expected = 0x80000001;
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRSET, expected);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRSET, expected);
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
g_assert_cmpuint(actual, ==, expected);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01;
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START)
+ & 0x01;
g_assert_cmpuint(actual, ==, 0x01);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
g_assert_cmpuint(actual, ==, 0x01);
/* Check clear via DIRCLR */
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRCLR, 0x80000001);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRCLR, 0x80000001);
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
g_assert_cmpuint(actual, ==, 0x00000000);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01;
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START)
+ & 0x01;
g_assert_cmpuint(actual, ==, 0x00);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
g_assert_cmpuint(actual, ==, 0x00);
/* Check set via DIR */
expected = 0x80000001;
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, expected);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, expected);
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
g_assert_cmpuint(actual, ==, expected);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01;
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START)
+ & 0x01;
g_assert_cmpuint(actual, ==, 0x01);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
g_assert_cmpuint(actual, ==, 0x01);
/* Reset DIR */
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, 0x00000000);
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, 0x00000000);
/* Check Input propagates */
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x00);
- qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x00);
+ qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
g_assert_cmpuint(actual, ==, 0x00);
- qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 1);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
+ qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 1);
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
g_assert_cmpuint(actual, ==, 0x01);
- qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, -1);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
+ qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, -1);
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
g_assert_cmpuint(actual, ==, 0x01);
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
/* Check pull-up working */
- qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
+ qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000);
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
g_assert_cmpuint(actual, ==, 0x00);
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b1110);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b1110);
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
g_assert_cmpuint(actual, ==, 0x01);
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
/* Check pull-down working */
- qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 1);
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
+ qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 1);
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000);
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
g_assert_cmpuint(actual, ==, 0x01);
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0110);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0110);
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
g_assert_cmpuint(actual, ==, 0x00);
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
- qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, -1);
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
+ qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, -1);
/* Check Output propagates */
- irq_intercept_out("/machine/nrf51");
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0011);
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
- g_assert_true(get_irq(0));
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01);
- g_assert_false(get_irq(0));
+ qtest_irq_intercept_out(qts, "/machine/nrf51");
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0011);
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
+ g_assert_true(qtest_get_irq(qts, 0));
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01);
+ g_assert_false(qtest_get_irq(qts, 0));
/* Check self-stimulation */
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01);
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01);
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
g_assert_cmpuint(actual, ==, 0x01);
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01);
- actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01);
+ actual = qtest_readl(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
g_assert_cmpuint(actual, ==, 0x00);
/*
* Check short-circuit - generates an guest_error which must be checked
* manually as long as qtest can not scan qemu_log messages
*/
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01);
- writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
- qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01);
+ qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
+ qtest_set_irq_in(qts, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
+
+ qtest_quit(qts);
}
-static void timer_task(hwaddr task)
+static void timer_task(QTestState *qts, hwaddr task)
{
- writel(NRF51_TIMER_BASE + task, NRF51_TRIGGER_TASK);
+ qtest_writel(qts, NRF51_TIMER_BASE + task, NRF51_TRIGGER_TASK);
}
-static void timer_clear_event(hwaddr event)
+static void timer_clear_event(QTestState *qts, hwaddr event)
{
- writel(NRF51_TIMER_BASE + event, NRF51_EVENT_CLEAR);
+ qtest_writel(qts, NRF51_TIMER_BASE + event, NRF51_EVENT_CLEAR);
}
-static void timer_set_bitmode(uint8_t mode)
+static void timer_set_bitmode(QTestState *qts, uint8_t mode)
{
- writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_BITMODE, mode);
+ qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_BITMODE, mode);
}
-static void timer_set_prescaler(uint8_t prescaler)
+static void timer_set_prescaler(QTestState *qts, uint8_t prescaler)
{
- writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_PRESCALER, prescaler);
+ qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_PRESCALER, prescaler);
}
-static void timer_set_cc(size_t idx, uint32_t value)
+static void timer_set_cc(QTestState *qts, size_t idx, uint32_t value)
{
- writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_CC0 + idx * 4, value);
+ qtest_writel(qts, NRF51_TIMER_BASE + NRF51_TIMER_REG_CC0 + idx * 4, value);
}
-static void timer_assert_events(uint32_t ev0, uint32_t ev1, uint32_t ev2,
- uint32_t ev3)
+static void timer_assert_events(QTestState *qts, uint32_t ev0, uint32_t ev1,
+ uint32_t ev2, uint32_t ev3)
{
- g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_0) == ev0);
- g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_1) == ev1);
- g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_2) == ev2);
- g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_3) == ev3);
+ g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_0)
+ == ev0);
+ g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_1)
+ == ev1);
+ g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_2)
+ == ev2);
+ g_assert(qtest_readl(qts, NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_3)
+ == ev3);
}
static void test_nrf51_timer(void)
{
uint32_t steps_to_overflow = 408;
+ QTestState *qts = qtest_init("-M microbit");
/* Compare Match */
- timer_task(NRF51_TIMER_TASK_STOP);
- timer_task(NRF51_TIMER_TASK_CLEAR);
+ timer_task(qts, NRF51_TIMER_TASK_STOP);
+ timer_task(qts, NRF51_TIMER_TASK_CLEAR);
- timer_clear_event(NRF51_TIMER_EVENT_COMPARE_0);
- timer_clear_event(NRF51_TIMER_EVENT_COMPARE_1);
- timer_clear_event(NRF51_TIMER_EVENT_COMPARE_2);
- timer_clear_event(NRF51_TIMER_EVENT_COMPARE_3);
+ timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_0);
+ timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_1);
+ timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_2);
+ timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_3);
- timer_set_bitmode(NRF51_TIMER_WIDTH_16); /* 16 MHz Timer */
- timer_set_prescaler(0);
+ timer_set_bitmode(qts, NRF51_TIMER_WIDTH_16); /* 16 MHz Timer */
+ timer_set_prescaler(qts, 0);
/* Swept over in first step */
- timer_set_cc(0, 2);
+ timer_set_cc(qts, 0, 2);
/* Barely miss on first step */
- timer_set_cc(1, 162);
+ timer_set_cc(qts, 1, 162);
/* Spot on on third step */
- timer_set_cc(2, 480);
+ timer_set_cc(qts, 2, 480);
- timer_assert_events(0, 0, 0, 0);
+ timer_assert_events(qts, 0, 0, 0, 0);
- timer_task(NRF51_TIMER_TASK_START);
- clock_step(10000);
- timer_assert_events(1, 0, 0, 0);
+ timer_task(qts, NRF51_TIMER_TASK_START);
+ qtest_clock_step(qts, 10000);
+ timer_assert_events(qts, 1, 0, 0, 0);
/* Swept over on first overflow */
- timer_set_cc(3, 114);
+ timer_set_cc(qts, 3, 114);
- clock_step(10000);
- timer_assert_events(1, 1, 0, 0);
+ qtest_clock_step(qts, 10000);
+ timer_assert_events(qts, 1, 1, 0, 0);
- clock_step(10000);
- timer_assert_events(1, 1, 1, 0);
+ qtest_clock_step(qts, 10000);
+ timer_assert_events(qts, 1, 1, 1, 0);
/* Wrap time until internal counter overflows */
while (steps_to_overflow--) {
- timer_assert_events(1, 1, 1, 0);
- clock_step(10000);
+ timer_assert_events(qts, 1, 1, 1, 0);
+ qtest_clock_step(qts, 10000);
}
- timer_assert_events(1, 1, 1, 1);
+ timer_assert_events(qts, 1, 1, 1, 1);
- timer_clear_event(NRF51_TIMER_EVENT_COMPARE_0);
- timer_clear_event(NRF51_TIMER_EVENT_COMPARE_1);
- timer_clear_event(NRF51_TIMER_EVENT_COMPARE_2);
- timer_clear_event(NRF51_TIMER_EVENT_COMPARE_3);
- timer_assert_events(0, 0, 0, 0);
+ timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_0);
+ timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_1);
+ timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_2);
+ timer_clear_event(qts, NRF51_TIMER_EVENT_COMPARE_3);
+ timer_assert_events(qts, 0, 0, 0, 0);
- timer_task(NRF51_TIMER_TASK_STOP);
+ timer_task(qts, NRF51_TIMER_TASK_STOP);
/* Test Proposal: Stop/Shutdown */
/* Test Proposal: Shortcut Compare -> Clear */
/* Test Proposal: Shortcut Compare -> Stop */
/* Test Proposal: Counter Mode */
+
+ qtest_quit(qts);
}
int main(int argc, char **argv)
{
- int ret;
-
g_test_init(&argc, &argv, NULL);
- global_qtest = qtest_initf("-machine microbit");
-
+ qtest_add_func("/microbit/nrf51/uart", test_nrf51_uart);
qtest_add_func("/microbit/nrf51/gpio", test_nrf51_gpio);
qtest_add_func("/microbit/nrf51/timer", test_nrf51_timer);
+ qtest_add_func("/microbit/microbit/i2c", test_microbit_i2c);
- ret = g_test_run();
-
- qtest_quit(global_qtest);
- return ret;
+ return g_test_run();
}
--- /dev/null
+#!/usr/bin/env python
+#
+# Regression test for throttle group member unregister segfault with iothread
+#
+# Copyright (c) 2019 Red Hat, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+import sys
+import os
+import iotests
+from iotests import log
+
+sys.path.append(os.path.join(os.path.dirname(__file__), '..', '..', 'scripts'))
+
+from qemu import QEMUMachine
+
+if iotests.qemu_default_machine == 's390-ccw-virtio':
+ virtio_scsi_device = 'virtio-scsi-ccw'
+else:
+ virtio_scsi_device = 'virtio-scsi-pci'
+
+vm = QEMUMachine(iotests.qemu_prog)
+vm.add_args('-machine', 'accel=kvm')
+vm.launch()
+
+log(vm.qmp('blockdev-add', node_name='hd0', driver='null-co'))
+log(vm.qmp('object-add', qom_type='iothread', id='iothread0'))
+log(vm.qmp('device_add', id='scsi0', driver=virtio_scsi_device, iothread='iothread0'))
+log(vm.qmp('device_add', id='scsi-hd0', driver='scsi-hd', drive='hd0'))
+log(vm.qmp('block_set_io_throttle', id='scsi-hd0', bps=0, bps_rd=0, bps_wr=0,
+ iops=1000, iops_rd=0, iops_wr=0, conv_keys=False))
+log(vm.qmp('device_del', id='scsi-hd0'))
+
+vm.shutdown()
--- /dev/null
+{"return": {}}
+{"return": {}}
+{"return": {}}
+{"return": {}}
+{"return": {}}
+{"return": {}}
234 auto quick migration
235 auto quick
236 auto quick
+238 auto quick
+++ /dev/null
--include ../../config-host.mak
-
-CROSS=mips64el-unknown-linux-gnu-
-
-SIM=qemu-mipsel
-SIM_FLAGS=-cpu 74Kf
-
-CC = $(CROSS)gcc
-CFLAGS = -mabi=32 -march=mips32r2 -mgp32 -mdsp -static
-
-TESTCASES = absq_s_ph.tst
-TESTCASES += absq_s_w.tst
-TESTCASES += addq_ph.tst
-TESTCASES += addq_s_ph.tst
-TESTCASES += addq_s_w.tst
-TESTCASES += addsc.tst
-TESTCASES += addu_qb.tst
-TESTCASES += addu_s_qb.tst
-TESTCASES += addwc.tst
-TESTCASES += bitrev.tst
-TESTCASES += bposge32.tst
-TESTCASES += cmp_eq_ph.tst
-TESTCASES += cmpgu_eq_qb.tst
-TESTCASES += cmpgu_le_qb.tst
-TESTCASES += cmpgu_lt_qb.tst
-TESTCASES += cmp_le_ph.tst
-TESTCASES += cmp_lt_ph.tst
-TESTCASES += cmpu_eq_qb.tst
-TESTCASES += cmpu_le_qb.tst
-TESTCASES += cmpu_lt_qb.tst
-TESTCASES += dpaq_sa_l_w.tst
-TESTCASES += dpaq_s_w_ph.tst
-TESTCASES += dpau_h_qbl.tst
-TESTCASES += dpau_h_qbr.tst
-TESTCASES += dpsq_sa_l_w.tst
-TESTCASES += dpsq_s_w_ph.tst
-TESTCASES += dpsu_h_qbl.tst
-TESTCASES += dpsu_h_qbr.tst
-TESTCASES += extp.tst
-TESTCASES += extpdp.tst
-TESTCASES += extpdpv.tst
-TESTCASES += extpv.tst
-TESTCASES += extr_rs_w.tst
-TESTCASES += extr_r_w.tst
-TESTCASES += extr_s_h.tst
-TESTCASES += extrv_rs_w.tst
-TESTCASES += extrv_r_w.tst
-TESTCASES += extrv_s_h.tst
-TESTCASES += extrv_w.tst
-TESTCASES += extr_w.tst
-TESTCASES += insv.tst
-TESTCASES += lbux.tst
-TESTCASES += lhx.tst
-TESTCASES += lwx.tst
-TESTCASES += madd.tst
-TESTCASES += maddu.tst
-TESTCASES += maq_sa_w_phl.tst
-TESTCASES += maq_sa_w_phr.tst
-TESTCASES += maq_s_w_phl.tst
-TESTCASES += maq_s_w_phr.tst
-TESTCASES += mfhi.tst
-TESTCASES += mflo.tst
-TESTCASES += modsub.tst
-TESTCASES += msub.tst
-TESTCASES += msubu.tst
-TESTCASES += mthi.tst
-TESTCASES += mthlip.tst
-TESTCASES += mtlo.tst
-TESTCASES += muleq_s_w_phl.tst
-TESTCASES += muleq_s_w_phr.tst
-TESTCASES += muleu_s_ph_qbl.tst
-TESTCASES += muleu_s_ph_qbr.tst
-TESTCASES += mulq_rs_ph.tst
-TESTCASES += mult.tst
-TESTCASES += multu.tst
-TESTCASES += packrl_ph.tst
-TESTCASES += pick_ph.tst
-TESTCASES += pick_qb.tst
-TESTCASES += precequ_ph_qbla.tst
-TESTCASES += precequ_ph_qbl.tst
-TESTCASES += precequ_ph_qbra.tst
-TESTCASES += precequ_ph_qbr.tst
-TESTCASES += preceq_w_phl.tst
-TESTCASES += preceq_w_phr.tst
-TESTCASES += preceu_ph_qbla.tst
-TESTCASES += preceu_ph_qbl.tst
-TESTCASES += preceu_ph_qbra.tst
-TESTCASES += preceu_ph_qbr.tst
-TESTCASES += precrq_ph_w.tst
-TESTCASES += precrq_qb_ph.tst
-TESTCASES += precrq_rs_ph_w.tst
-TESTCASES += precrqu_s_qb_ph.tst
-TESTCASES += raddu_w_qb.tst
-TESTCASES += rddsp.tst
-TESTCASES += repl_ph.tst
-TESTCASES += repl_qb.tst
-TESTCASES += replv_ph.tst
-TESTCASES += replv_qb.tst
-TESTCASES += shilo.tst
-TESTCASES += shilov.tst
-TESTCASES += shll_ph.tst
-TESTCASES += shll_qb.tst
-TESTCASES += shll_s_ph.tst
-TESTCASES += shll_s_w.tst
-TESTCASES += shllv_ph.tst
-TESTCASES += shllv_qb.tst
-TESTCASES += shllv_s_ph.tst
-TESTCASES += shllv_s_w.tst
-TESTCASES += shra_ph.tst
-TESTCASES += shra_r_ph.tst
-TESTCASES += shra_r_w.tst
-TESTCASES += shrav_ph.tst
-TESTCASES += shrav_r_ph.tst
-TESTCASES += shrav_r_w.tst
-TESTCASES += shrl_qb.tst
-TESTCASES += shrlv_qb.tst
-TESTCASES += subq_ph.tst
-TESTCASES += subq_s_ph.tst
-TESTCASES += subq_s_w.tst
-TESTCASES += subu_qb.tst
-TESTCASES += subu_s_qb.tst
-TESTCASES += wrdsp.tst
-
-all: $(TESTCASES)
-
-%.tst: %.c
- $(CC) $(CFLAGS) $< -o $@
-
-check: $(TESTCASES)
- @for case in $(TESTCASES); do \
- echo $(SIM) $(SIM_FLAGS) ./$$case;\
- $(SIM) $(SIM_FLAGS) ./$$case; \
- done
-
-clean:
- $(RM) -rf $(TESTCASES)
+++ /dev/null
--include ../../config-host.mak
-
-CROSS=mips64el-unknown-linux-gnu-
-
-SIM=qemu-mipsel
-SIM_FLAGS=-cpu 74Kf
-
-CC = $(CROSS)gcc
-CFLAGS = -mabi=32 -march=mips32r2 -mgp32 -mdspr2 -static
-
-TESTCASES = absq_s_qb.tst
-TESTCASES += addqh_ph.tst
-TESTCASES += addqh_r_ph.tst
-TESTCASES += addqh_r_w.tst
-TESTCASES += addqh_w.tst
-TESTCASES += adduh_qb.tst
-TESTCASES += adduh_r_qb.tst
-TESTCASES += addu_ph.tst
-TESTCASES += addu_s_ph.tst
-TESTCASES += append.tst
-TESTCASES += balign.tst
-TESTCASES += cmpgdu_eq_qb.tst
-TESTCASES += cmpgdu_le_qb.tst
-TESTCASES += cmpgdu_lt_qb.tst
-TESTCASES += dpaqx_sa_w_ph.tst
-TESTCASES += dpa_w_ph.tst
-TESTCASES += dpax_w_ph.tst
-TESTCASES += dpaqx_s_w_ph.tst
-TESTCASES += dpsqx_sa_w_ph.tst
-TESTCASES += dpsqx_s_w_ph.tst
-TESTCASES += dps_w_ph.tst
-TESTCASES += dpsx_w_ph.tst
-TESTCASES += mul_ph.tst
-TESTCASES += mulq_rs_w.tst
-TESTCASES += mulq_s_ph.tst
-TESTCASES += mulq_s_w.tst
-TESTCASES += mulsaq_s_w_ph.tst
-TESTCASES += mulsa_w_ph.tst
-TESTCASES += mul_s_ph.tst
-TESTCASES += precr_qb_ph.tst
-TESTCASES += precr_sra_ph_w.tst
-TESTCASES += precr_sra_r_ph_w.tst
-TESTCASES += prepend.tst
-TESTCASES += shra_qb.tst
-TESTCASES += shra_r_qb.tst
-TESTCASES += shrav_qb.tst
-TESTCASES += shrav_r_qb.tst
-TESTCASES += shrl_ph.tst
-TESTCASES += shrlv_ph.tst
-TESTCASES += subqh_ph.tst
-TESTCASES += subqh_r_ph.tst
-TESTCASES += subqh_r_w.tst
-TESTCASES += subqh_w.tst
-TESTCASES += subuh_qb.tst
-TESTCASES += subuh_r_qb.tst
-TESTCASES += subu_ph.tst
-TESTCASES += subu_s_ph.tst
-
-all: $(TESTCASES)
-
-%.tst: %.c
- $(CC) $(CFLAGS) $< -o $@
-
-check: $(TESTCASES)
- @for case in $(TESTCASES); do \
- echo $(SIM) $(SIM_FLAGS) ./$$case;\
- $(SIM) $(SIM_FLAGS) ./$$case; \
- done
-
-clean:
- $(RM) -rf $(TESTCASES)
+++ /dev/null
-
-CROSS_COMPILE ?= mips64el-unknown-linux-gnu-
-
-SIM = qemu-system-mips64el
-SIMFLAGS = -nographic -cpu mips64dspr2 -kernel
-
-AS = $(CROSS_COMPILE)as
-LD = $(CROSS_COMPILE)ld
-CC = $(CROSS_COMPILE)gcc
-AR = $(CROSS_COMPILE)ar
-NM = $(CROSS_COMPILE)nm
-STRIP = $(CROSS_COMPILE)strip
-RANLIB = $(CROSS_COMPILE)ranlib
-OBJCOPY = $(CROSS_COMPILE)objcopy
-OBJDUMP = $(CROSS_COMPILE)objdump
-
-VECTORS_OBJ ?= ./head.o ./printf.o
-
-HEAD_FLAGS ?= -nostdinc -mabi=64 -G 0 -mno-abicalls -fno-pic -pipe \
- -msoft-float -march=mips64 -Wa,-mips64 -Wa,--trap \
- -msym32 -DKBUILD_64BIT_SYM32 -I./
-
-CFLAGS ?= -nostdinc -mabi=64 -G 0 -mno-abicalls -fno-pic -fno-builtin \
- -pipe -march=mips64r2 -mgp64 -mdsp -static -Wa,--trap -msym32 \
- -DKBUILD_64BIT_SYM32 -I./
-
-LDFLAGS = -T./mips_boot.lds -L./
-FLAGS = -nostdlib -mabi=64 -march=mips64r2 -mgp64 -mdsp
-
-
-#TESTCASES = absq_s_ob.tst
-TESTCASES = absq_s_ph.tst
-TESTCASES += absq_s_pw.tst
-TESTCASES += absq_s_qh.tst
-TESTCASES += absq_s_w.tst
-TESTCASES += addq_ph.tst
-TESTCASES += addq_pw.tst
-TESTCASES += addq_qh.tst
-TESTCASES += addq_s_ph.tst
-TESTCASES += addq_s_pw.tst
-TESTCASES += addq_s_qh.tst
-TESTCASES += addq_s_w.tst
-TESTCASES += addsc.tst
-TESTCASES += addu_ob.tst
-TESTCASES += addu_qb.tst
-TESTCASES += addu_s_ob.tst
-TESTCASES += addu_s_qb.tst
-TESTCASES += addwc.tst
-TESTCASES += bitrev.tst
-TESTCASES += bposge32.tst
-TESTCASES += bposge64.tst
-TESTCASES += cmp_eq_ph.tst
-TESTCASES += cmp_eq_pw.tst
-TESTCASES += cmp_eq_qh.tst
-TESTCASES += cmpgu_eq_ob.tst
-TESTCASES += cmpgu_eq_qb.tst
-TESTCASES += cmpgu_le_ob.tst
-TESTCASES += cmpgu_le_qb.tst
-TESTCASES += cmpgu_lt_ob.tst
-TESTCASES += cmpgu_lt_qb.tst
-TESTCASES += cmp_le_ph.tst
-TESTCASES += cmp_le_pw.tst
-TESTCASES += cmp_le_qh.tst
-TESTCASES += cmp_lt_ph.tst
-TESTCASES += cmp_lt_pw.tst
-TESTCASES += cmp_lt_qh.tst
-TESTCASES += cmpu_eq_ob.tst
-TESTCASES += cmpu_eq_qb.tst
-TESTCASES += cmpu_le_ob.tst
-TESTCASES += cmpu_le_qb.tst
-TESTCASES += cmpu_lt_ob.tst
-TESTCASES += cmpu_lt_qb.tst
-#TESTCASES += dappend.tst
-TESTCASES += dextp.tst
-TESTCASES += dextpdp.tst
-TESTCASES += dextpdpv.tst
-TESTCASES += dextpv.tst
-TESTCASES += dextr_l.tst
-TESTCASES += dextr_r_l.tst
-TESTCASES += dextr_rs_l.tst
-TESTCASES += dextr_rs_w.tst
-TESTCASES += dextr_r_w.tst
-TESTCASES += dextr_s_h.tst
-TESTCASES += dextrv_l.tst
-TESTCASES += dextrv_r_l.tst
-TESTCASES += dextrv_rs_l.tst
-TESTCASES += dextrv_rs_w.tst
-TESTCASES += dextrv_r_w.tst
-TESTCASES += dextrv_s_h.tst
-TESTCASES += dextrv_w.tst
-TESTCASES += dextr_w.tst
-TESTCASES += dinsv.tst
-TESTCASES += dmadd.tst
-TESTCASES += dmaddu.tst
-TESTCASES += dmsub.tst
-TESTCASES += dmsubu.tst
-TESTCASES += dmthlip.tst
-TESTCASES += dpaq_sa_l_pw.tst
-TESTCASES += dpaq_sa_l_w.tst
-TESTCASES += dpaq_s_w_ph.tst
-TESTCASES += dpaq_s_w_qh.tst
-TESTCASES += dpau_h_obl.tst
-TESTCASES += dpau_h_obr.tst
-TESTCASES += dpau_h_qbl.tst
-TESTCASES += dpau_h_qbr.tst
-TESTCASES += dpsq_sa_l_pw.tst
-TESTCASES += dpsq_sa_l_w.tst
-TESTCASES += dpsq_s_w_ph.tst
-TESTCASES += dpsq_s_w_qh.tst
-TESTCASES += dpsu_h_obl.tst
-TESTCASES += dpsu_h_obr.tst
-TESTCASES += dpsu_h_qbl.tst
-TESTCASES += dpsu_h_qbr.tst
-TESTCASES += dshilo.tst
-TESTCASES += dshilov.tst
-TESTCASES += extp.tst
-TESTCASES += extpdp.tst
-TESTCASES += extpdpv.tst
-TESTCASES += extpv.tst
-TESTCASES += extr_rs_w.tst
-TESTCASES += extr_r_w.tst
-TESTCASES += extr_s_h.tst
-TESTCASES += extrv_rs_w.tst
-TESTCASES += extrv_r_w.tst
-TESTCASES += extrv_s_h.tst
-TESTCASES += extrv_w.tst
-TESTCASES += extr_w.tst
-TESTCASES += insv.tst
-TESTCASES += lbux.tst
-TESTCASES += lhx.tst
-TESTCASES += lwx.tst
-TESTCASES += ldx.tst
-TESTCASES += madd.tst
-TESTCASES += maddu.tst
-TESTCASES += maq_sa_w_phl.tst
-TESTCASES += maq_sa_w_phr.tst
-TESTCASES += maq_sa_w_qhll.tst
-TESTCASES += maq_sa_w_qhlr.tst
-TESTCASES += maq_sa_w_qhrl.tst
-TESTCASES += maq_sa_w_qhrr.tst
-TESTCASES += maq_s_l_pwl.tst
-TESTCASES += maq_s_l_pwr.tst
-TESTCASES += maq_s_w_phl.tst
-TESTCASES += maq_s_w_phr.tst
-TESTCASES += maq_s_w_qhll.tst
-TESTCASES += maq_s_w_qhlr.tst
-TESTCASES += maq_s_w_qhrl.tst
-TESTCASES += maq_s_w_qhrr.tst
-TESTCASES += mfhi.tst
-TESTCASES += mflo.tst
-TESTCASES += modsub.tst
-TESTCASES += msub.tst
-TESTCASES += msubu.tst
-TESTCASES += mthi.tst
-TESTCASES += mthlip.tst
-TESTCASES += mtlo.tst
-TESTCASES += muleq_s_pw_qhl.tst
-TESTCASES += muleq_s_pw_qhr.tst
-TESTCASES += muleq_s_w_phl.tst
-TESTCASES += muleq_s_w_phr.tst
-TESTCASES += muleu_s_ph_qbl.tst
-TESTCASES += muleu_s_ph_qbr.tst
-TESTCASES += muleu_s_qh_obl.tst
-TESTCASES += muleu_s_qh_obr.tst
-TESTCASES += mulq_rs_ph.tst
-TESTCASES += mulq_rs_qh.tst
-TESTCASES += mulsaq_s_l_pw.tst
-TESTCASES += mulsaq_s_w_qh.tst
-TESTCASES += mult.tst
-TESTCASES += multu.tst
-TESTCASES += packrl_ph.tst
-TESTCASES += packrl_pw.tst
-TESTCASES += pick_ob.tst
-TESTCASES += pick_ph.tst
-TESTCASES += pick_pw.tst
-TESTCASES += pick_qb.tst
-TESTCASES += pick_qh.tst
-#TESTCASES += preceq_l_pwl.tst
-#TESTCASES += preceq_l_pwr.tst
-TESTCASES += preceq_pw_qhla.tst
-TESTCASES += preceq_pw_qhl.tst
-TESTCASES += preceq_pw_qhra.tst
-TESTCASES += preceq_pw_qhr.tst
-TESTCASES += precequ_ph_qbla.tst
-TESTCASES += precequ_ph_qbl.tst
-TESTCASES += precequ_ph_qbra.tst
-TESTCASES += precequ_ph_qbr.tst
-#TESTCASES += precequ_qh_obla.tst
-#TESTCASES += precequ_qh_obl.tst
-#TESTCASES += precequ_qh_obra.tst
-#TESTCASES += precequ_qh_obr.tst
-TESTCASES += preceq_w_phl.tst
-TESTCASES += preceq_w_phr.tst
-TESTCASES += preceu_ph_qbla.tst
-TESTCASES += preceu_ph_qbl.tst
-TESTCASES += preceu_ph_qbra.tst
-TESTCASES += preceu_ph_qbr.tst
-TESTCASES += preceu_qh_obla.tst
-TESTCASES += preceu_qh_obl.tst
-TESTCASES += preceu_qh_obra.tst
-TESTCASES += preceu_qh_obr.tst
-#TESTCASES += precr_ob_qh.tst
-TESTCASES += precrq_ob_qh.tst
-TESTCASES += precrq_ph_w.tst
-TESTCASES += precrq_pw_l.tst
-TESTCASES += precrq_qb_ph.tst
-TESTCASES += precrq_qh_pw.tst
-TESTCASES += precrq_rs_ph_w.tst
-TESTCASES += precrq_rs_qh_pw.tst
-TESTCASES += precrqu_s_ob_qh.tst
-TESTCASES += precrqu_s_qb_ph.tst
-#TESTCASES += precr_sra_qh_pw.tst
-#TESTCASES += precr_sra_r_qh_pw.tst
-#TESTCASES += prependd.tst
-#TESTCASES += prependw.tst
-#TESTCASES += raddu_l_ob.tst
-TESTCASES += raddu_w_qb.tst
-TESTCASES += rddsp.tst
-TESTCASES += repl_ob.tst
-TESTCASES += repl_ph.tst
-TESTCASES += repl_pw.tst
-TESTCASES += repl_qb.tst
-TESTCASES += repl_qh.tst
-TESTCASES += replv_ob.tst
-TESTCASES += replv_ph.tst
-TESTCASES += replv_pw.tst
-TESTCASES += replv_qb.tst
-TESTCASES += shilo.tst
-TESTCASES += shilov.tst
-TESTCASES += shll_ob.tst
-TESTCASES += shll_ph.tst
-TESTCASES += shll_pw.tst
-TESTCASES += shll_qb.tst
-TESTCASES += shll_qh.tst
-TESTCASES += shll_s_ph.tst
-TESTCASES += shll_s_pw.tst
-TESTCASES += shll_s_qh.tst
-TESTCASES += shll_s_w.tst
-TESTCASES += shllv_ob.tst
-TESTCASES += shllv_ph.tst
-TESTCASES += shllv_pw.tst
-TESTCASES += shllv_qb.tst
-TESTCASES += shllv_qh.tst
-TESTCASES += shllv_s_ph.tst
-TESTCASES += shllv_s_pw.tst
-TESTCASES += shllv_s_qh.tst
-TESTCASES += shllv_s_w.tst
-#TESTCASES += shra_ob.tst
-TESTCASES += shra_ph.tst
-TESTCASES += shra_pw.tst
-TESTCASES += shra_qh.tst
-#TESTCASES += shra_r_ob.tst
-TESTCASES += shra_r_ph.tst
-TESTCASES += shra_r_pw.tst
-TESTCASES += shra_r_qh.tst
-TESTCASES += shra_r_w.tst
-TESTCASES += shrav_ph.tst
-TESTCASES += shrav_pw.tst
-TESTCASES += shrav_qh.tst
-TESTCASES += shrav_r_ph.tst
-TESTCASES += shrav_r_pw.tst
-TESTCASES += shrav_r_qh.tst
-TESTCASES += shrav_r_w.tst
-TESTCASES += shrl_ob.tst
-TESTCASES += shrl_qb.tst
-#TESTCASES += shrl_qh.tst
-TESTCASES += shrlv_ob.tst
-TESTCASES += shrlv_qb.tst
-#TESTCASES += shrlv_qh.tst
-TESTCASES += subq_ph.tst
-TESTCASES += subq_pw.tst
-TESTCASES += subq_qh.tst
-TESTCASES += subq_s_ph.tst
-TESTCASES += subq_s_pw.tst
-TESTCASES += subq_s_qh.tst
-TESTCASES += subq_s_w.tst
-TESTCASES += subu_ob.tst
-TESTCASES += subu_qb.tst
-TESTCASES += subu_s_ob.tst
-TESTCASES += subu_s_qb.tst
-TESTCASES += wrdsp.tst
-
-all: build
-
-head.o : head.S
- $(Q)$(CC) $(HEAD_FLAGS) -D"STACK_TOP=0xffffffff80200000" -c $< -o $@
-
-%.o : %.S
- $(CC) $(CFLAGS) -c $< -o $@
-
-%.o : %.c
- $(CC) $(CFLAGS) -c $< -o $@
-
-%.tst: %.o $(VECTORS_OBJ)
- $(CC) $(VECTORS_OBJ) $(FLAGS) $(LDFLAGS) $< -o $@
-
-build: $(VECTORS_OBJ) $(MIPSSOC_LIB) $(TESTCASES)
-
-check: $(VECTORS_OBJ) $(MIPSSOC_LIB) $(TESTCASES)
- @for case in $(TESTCASES); do \
- echo $(SIM) $(SIMFLAGS) ./$$case; \
- $(SIM) $(SIMFLAGS) ./$$case & (sleep 1; killall $(SIM)); \
- done
-
-clean:
- $(Q)rm -f *.o *.tst *.a
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result, dspcontrol;
- rt = 0x7F7F7F7F7F7F7F7F;
- result = 0x7F7F7F7F7F7F7F7F;
-
-
- __asm
- (".set mips64\n\t"
- "absq_s.ob %0 %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("absq_s.ob test 1 error\n");
-
- return -1;
- }
-
- __asm
- ("rddsp %0\n\t"
- : "=r"(rd)
- );
- rd >> 20;
- rd = rd & 0x1;
- if (rd != 0) {
- printf("absq_s.ob test 1 dspcontrol overflow flag error\n");
-
- return -1;
- }
-
- rt = 0x80FFFFFFFFFFFFFF;
- result = 0x7F01010101010101;
-
- __asm
- ("absq_s.ob %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("absq_s.ob test 2 error\n");
-
- return -1;
- }
-
- __asm
- ("rddsp %0\n\t"
- : "=r"(rd)
- );
- rd = rd >> 20;
- rd = rd & 0x1;
- if (rd != 1) {
- printf("absq_s.ob test 2 dspcontrol overflow flag error\n");
-
- return -1;
- }
-
- return 0;
-}
-
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x10017EFD;
- result = 0x10017EFD;
-
- __asm
- ("absq_s.ph %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("absq_s.ph wrong\n");
-
- return -1;
- }
-
- rt = 0x8000A536;
- result = 0x7FFF5ACA;
-
- __asm
- ("absq_s.ph %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("absq_s.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result, dspcontrol;
- rd = 0;
- rt = 0x7F7F7F7F7F7F7F7F;
- result = 0x7F7F7F7F7F7F7F7F;
-
-
- __asm
- ("absq_s.pw %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("absq_s.pw test 1 error\n");
-
- return -1;
- }
-
- rd = 0;
- __asm
- ("rddsp %0\n\t"
- : "=r"(rd)
- );
- rd >> 20;
- rd = rd & 0x1;
- if (rd != 0) {
- printf("absq_s.pw test 1 dspcontrol overflow flag error\n");
-
- return -1;
- }
-
- rd = 0;
- rt = 0x80000000FFFFFFFF;
- result = 0x7FFFFFFF00000001;
-
- __asm
- ("absq_s.pw %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("absq_s.pw test 2 error\n");
-
- return -1;
- }
-
- rd = 0;
- __asm
- ("rddsp %0\n\t"
- : "=r"(rd)
- );
- rd = rd >> 20;
- rd = rd & 0x1;
- if (rd != 1) {
- printf("absq_s.pw test 2 dspcontrol overflow flag error\n");
-
- return -1;
- }
-
- return 0;
-}
-
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result, dspcontrol;
- rd = 0;
- rt = 0x7F7F7F7F7F7F7F7F;
- result = 0x7F7F7F7F7F7F7F7F;
-
-
- __asm
- ("absq_s.qh %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("absq_s.qh test 1 error\n");
-
- return -1;
- }
-
- rd = 0;
- rt = 0x8000FFFFFFFFFFFF;
- result = 0x7FFF000100000001;
-
- __asm
- ("absq_s.pw %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("absq_s.rw test 2 error\n");
-
- return -1;
- }
-
- return 0;
-}
-
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x80000000;
- result = 0x7FFFFFFF;
- __asm
- ("absq_s.w %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("absq_s_w.ph wrong\n");
-
- return -1;
- }
-
- rt = 0x80030000;
- result = 0x7FFD0000;
- __asm
- ("absq_s.w %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("absq_s_w.ph wrong\n");
-
- return -1;
- }
-
- rt = 0x31036080;
- result = 0x31036080;
- __asm
- ("absq_s.w %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("absq_s_w.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long result;
-
- rs = 0xFFFFFFFF;
- rt = 0x10101010;
- result = 0x100F100F;
- __asm
- ("addq.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("1 addq.ph wrong\n");
-
- return -1;
- }
-
- rs = 0x3712847D;
- rt = 0x0031AF2D;
- result = 0x374333AA;
- __asm
- ("addq.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("2 addq.ph wrong\n");
-
- return -1;
- }
-
- rs = 0x7fff847D;
- rt = 0x0031AF2D;
- result = 0xffffffff803033AA;
- __asm
- ("addq.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- __asm("rddsp %0\n\t"
- : "=r"(dsp)
- );
-
- if (rd != result || (((dsp >> 20) & 0x01) != 1)) {
- printf("3 addq.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dspreg, dspresult;
-
- rs = 0x123456787FFFFFFF;
- rt = 0x1111111100000101;
- result = 0x2345678980000100;
- dspresult = 0x1;
-
- __asm
- ("addq.pw %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
- if ((rd != result) || (dspreg != dspresult)) {
- printf("addq.pw error\n");
-
- return -1;
- }
-
- rs = 0x1234567880FFFFFF;
- rt = 0x1111111180000001;
- result = 0x2345678901000000;
- dspresult = 0x1;
-
- __asm
- ("addq.pw %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
- if ((rd != result) || (dspreg != dspresult)) {
- printf("addq.pw error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dspreg, dspresult;
-
- rs = 0x123456787FFF8010;
- rt = 0x1111111100018000;
- result = 0x2345678980000010;
- dspresult = 0x1;
-
- __asm
- ("addq.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
-
- if ((rd != result) || (dspreg != dspresult)) {
- printf("addq.qh error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long result;
-
- rs = 0xFFFFFFFF;
- rt = 0x10101010;
- result = 0x100F100F;
- __asm
- ("addq_s.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("1 addq_s.ph wrong\n");
-
- return -1;
- }
-
- rs = 0x3712847D;
- rt = 0x0031AF2D;
- result = 0x37438000;
- __asm
- ("addq_s.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- __asm
- ("rddsp %0\n\t"
- : "=r"(dsp)
- );
-
- if ((rd != result) || (((dsp >> 20) & 0x01) != 1)) {
- printf("2 addq_s.ph wrong\n");
-
- return -1;
- }
-
- rs = 0x7fff847D;
- rt = 0x0031AF2D;
- result = 0x7fff8000;
- __asm
- ("addq_s.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- __asm
- ("rddsp %0\n\t"
- : "=r"(dsp)
- );
-
- if ((rd != result) || (((dsp >> 20) & 0x01) != 1)) {
- printf("3 addq_s.ph wrong\n");
-
- return -1;
- }
-
- rs = 0x8030847D;
- rt = 0x8a00AF2D;
- result = 0xffffffff80008000;
- __asm
- ("addq_s.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- __asm
- ("rddsp %0\n\t"
- : "=r"(dsp)
- );
-
- if ((rd != result) || (((dsp >> 20) & 0x01) != 1)) {
- printf("4 addq_s.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dspreg, dspresult;
- rs = 0x123456787FFFFFFF;
- rt = 0x1111111100000001;
- result = 0x234567897FFFFFFF;
- dspresult = 0x1;
-
- __asm
- ("addq_s.pw %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
- if ((rd != result) || (dspreg != dspresult)) {
- printf("addq_s.pw error\n");
-
- return -1;
- }
-
- rs = 0x80FFFFFFE00000FF;
- rt = 0x80000001200000DD;
- result = 0x80000000000001DC;
- dspresult = 0x01;
-
- __asm
- ("addq_s.pw %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
- if ((rd != result) || (dspreg != dspresult)) {
- printf("addq_s.pw error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dspreg, dspresult;
- rs = 0x123456787FFF8000;
- rt = 0x1111111100028000;
- result = 0x234567897FFF8000;
- dspresult = 0x1;
-
- __asm
- ("addq_s.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
- if ((rd != result) || (dspreg != dspresult)) {
- printf("addq_s.qh error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main()
-{
- long long rd, rs, rt;
- long long result;
-
- rt = 0x10017EFD;
- rs = 0x11111111;
- result = 0x2112900e;
-
- __asm
- ("addq_s.w %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("addq_s.w error\n");
- }
-
- rt = 0x80017EFD;
- rs = 0x81111111;
- result = 0xffffffff80000000;
-
- __asm
- ("addq_s.w %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("addq_s.w error\n");
- }
-
- rt = 0x7fffffff;
- rs = 0x01111111;
- result = 0x7fffffff;
-
- __asm
- ("addq_s.w %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("addq_s.w error\n");
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long result;
-
- rs = 0x0000000F;
- rt = 0x00000001;
- result = 0x00000010;
- __asm
- ("addsc %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("1 addsc wrong\n");
-
- return -1;
- }
-
- rs = 0xFFFF0FFF;
- rt = 0x00010111;
- result = 0x00001110;
- __asm
- ("addsc %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- if ((rd != result) || (((dsp >> 13) & 0x01) != 1)) {
- printf("2 addsc wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dspreg, dspresult;
-
- rs = 0x123456789ABCDEF0;
- rt = 0x3456123498DEF390;
- result = 0x468A68AC329AD180;
- dspresult = 0x01;
-
- __asm
- ("addu.ob %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
-
- if ((rd != result) || (dspreg != dspresult)) {
- printf("addu.ob error\n\t");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long result;
-
- rs = 0x00FF00FF;
- rt = 0x00010001;
- result = 0x00000000;
- __asm
- ("addu.qb %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- if ((rd != result) || (((dsp >> 20) & 0x01) != 1)) {
- printf("1 addu.qb wrong\n");
-
- return -1;
- }
-
- rs = 0xFFFF1111;
- rt = 0x00020001;
- result = 0xFFFFFFFFFF011112;
- __asm
- ("addu.qb %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- if ((rd != result) || (((dsp >> 20) & 0x01) != 1)) {
- printf("2 addu.qb wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dspreg, dspresult;
- rs = 0x123456789ABCDEF0;
- rt = 0x3456123498DEF390;
- result = 0x468A68ACFFFFFFFF;
- dspresult = 0x01;
-
- __asm
- ("addu_s.ob %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
-
- if ((rd != result) || (dspreg != dspresult)) {
- printf("addu_s.ob error\n\t");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long result;
-
- rs = 0x10FF01FF;
- rt = 0x10010001;
- result = 0x20FF01FF;
- __asm
- ("addu_s.qb %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- if ((rd != result) || (((dsp >> 20) & 0x1) != 1)) {
- printf("1 addu_s.qb error 1\n");
-
- return -1;
- }
-
- rs = 0xFFFFFFFFFFFF1111;
- rt = 0x00020001;
- result = 0xFFFFFFFFFFFF1112;
- __asm
- ("addu_s.qb %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- if ((rd != result) || (((dsp >> 20) & 0x1) != 1)) {
- printf("2 addu_s.qb error 2\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dspi, dspo;
- long long result;
-
- rs = 0x10FF01FF;
- rt = 0x10010001;
- dspi = 0x00002000;
- result = 0x21000201;
- __asm
- ("wrdsp %3\n"
- "addwc %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt), "r"(dspi)
- );
- if (rd != result) {
- printf("1 addwc wrong\n");
-
- return -1;
- }
-
- rs = 0xFFFF1111;
- rt = 0x00020001;
- dspi = 0x00;
- result = 0x00011112;
- __asm
- ("wrdsp %3\n"
- "addwc %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt), "r"(dspi)
- );
- if (rd != result) {
- printf("2 addwc wrong\n");
-
- return -1;
- }
-
- rs = 0x8FFF1111;
- rt = 0x80020001;
- dspi = 0x00;
- result = 0x10011112;
- __asm
- ("wrdsp %4\n"
- "addwc %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspo)
- : "r"(rs), "r"(rt), "r"(dspi)
- );
- if ((rd != result) || (((dspo >> 20) & 0x01) != 1)) {
- printf("3 addwc wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x12345678;
- result = 0x00001E6A;
-
- __asm
- ("bitrev %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("bitrev wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long dsp, sum;
- long long result;
-
- dsp = 0x20;
- sum = 0x01;
- result = 0x02;
-
- __asm
- ("wrdsp %1\n\t"
- "bposge32 test1\n\t"
- "nop\n\t"
- "addi %0, 0xA2\n\t"
- "nop\n\t"
- "test1:\n\t"
- "addi %0, 0x01\n\t"
- : "+r"(sum)
- : "r"(dsp)
- );
- if (sum != result) {
- printf("bposge32 wrong\n");
-
- return -1;
- }
-
- dsp = 0x10;
- sum = 0x01;
- result = 0xA4;
-
- __asm
- ("wrdsp %1\n\t"
- "bposge32 test2\n\t"
- "nop\n\t"
- "addi %0, 0xA2\n\t"
- "nop\n\t"
- "test2:\n\t"
- "addi %0, 0x01\n\t"
- : "+r"(sum)
- : "r"(dsp)
- );
- if (sum != result) {
- printf("bposge32 wrong\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long dsp, sum;
- long long result;
-
- dsp = 0x40;
- sum = 0x01;
- result = 0x02;
-
- __asm
- ("wrdsp %1\n\t"
- "bposge64 test1\n\t"
- "nop\n\t"
- "addi %0, 0xA2\n\t"
- "nop\n\t"
- "test1:\n\t"
- "addi %0, 0x01\n\t"
- : "+r"(sum)
- : "r"(dsp)
- );
- if (sum != result) {
- printf("bposge64 wrong\n");
-
- return -1;
- }
-
- dsp = 0x10;
- sum = 0x01;
- result = 0xA4;
-
- __asm
- ("wrdsp %1\n\t"
- "bposge64 test2\n\t"
- "nop\n\t"
- "addi %0, 0xA2\n\t"
- "nop\n\t"
- "test2:\n\t"
- "addi %0, 0x01\n\t"
- : "+r"(sum)
- : "r"(dsp)
- );
- if (sum != result) {
- printf("bposge64 wrong\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x11777066;
- rt = 0x55AA33FF;
- result = 0x00;
- __asm
- ("cmp.eq.ph %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- rd = (rd >> 24) & 0x03;
- if (rd != result) {
- printf("cmp.eq.ph wrong\n");
-
- return -1;
- }
-
- rs = 0x11777066;
- rt = 0x11777066;
- result = 0x03;
- __asm
- ("cmp.eq.ph %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- rd = (rd >> 24) & 0x03;
- if (rd != result) {
- printf("cmp.eq.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dspreg, dspresult;
-
- rs = 0x123456789ABCDEFF;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x03;
-
- __asm
- ("cmp.eq.pw %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0x03);
-
- if (dspreg != dspresult) {
- printf("1 cmp.eq.pw error\n");
-
- return -1;
- }
-
- rs = 0x123456799ABCDEFe;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x00;
-
- __asm
- ("cmp.eq.pw %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0x03);
-
- if (dspreg != dspresult) {
- printf("2 cmp.eq.pw error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dspreg, dspresult;
-
- rs = 0x123456789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x0E;
-
- __asm
- ("cmp.eq.qh %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0x0F);
-
- if (dspreg != dspresult) {
- printf("cmp.eq.qh error\n");
-
- return -1;
- }
-
- rs = 0x12355a789A4CD3F0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x00;
-
- __asm
- ("cmp.eq.qh %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0x0F);
-
- if (dspreg != dspresult) {
- printf("cmp.eq.qh error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x11777066;
- rt = 0x55AA33FF;
- result = 0x02;
- __asm
- ("cmp.le.ph %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- rd = (rd >> 24) & 0x03;
- if (rd != result) {
- printf("cmp.le.ph wrong\n");
-
- return -1;
- }
- rs = 0x11777066;
- rt = 0x11777066;
- result = 0x03;
- __asm
- ("cmp.le.ph %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- rd = (rd >> 24) & 0x03;
- if (rd != result) {
- printf("cmp.le.ph wrong\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dspreg, dspresult;
-
- rs = 0x123456789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x03;
-
- __asm
- ("cmp.le.pw %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0x03);
-
- if (dspreg != dspresult) {
- printf("1 cmp.le.pw error\n");
-
- return -1;
- }
-
- rs = 0x123456799ABCEEFF;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x00;
-
- __asm
- ("cmp.le.pw %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0x03);
-
- if (dspreg != dspresult) {
- printf("2 cmp.le.pw error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dspreg, dspresult;
-
- rs = 0x123456789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x0F;
-
- __asm
- ("cmp.le.qh %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0x0F);
-
- if (dspreg != dspresult) {
- printf("cmp.le.qh error\n");
-
- return -1;
- }
-
- rs = 0x823456789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x0f;
-
- __asm
- ("cmp.le.qh %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0x0F);
-
- if (dspreg != dspresult) {
- printf("cmp.le.qh error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x11777066;
- rt = 0x55AA33FF;
- result = 0x02;
- __asm
- ("cmp.lt.ph %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- rd = (rd >> 24) & 0x03;
- if (rd != result) {
- printf("cmp.lt.ph wrong\n");
-
- return -1;
- }
- rs = 0x11777066;
- rt = 0x11777066;
- result = 0x00;
- __asm
- ("cmp.lt.ph %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- rd = (rd >> 24) & 0x03;
- if (rd != result) {
- printf("cmp.lt.ph2 wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dspreg, dspresult;
-
- rs = 0x123456789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x01;
-
- __asm
- ("cmp.lt.pw %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0x03);
-
- if (dspreg != dspresult) {
- printf("cmp.lt.pw error\n");
-
- return -1;
- }
-
- rs = 0x123456779ABCDEFf;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x02;
-
- __asm
- ("cmp.lt.pw %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0x03);
-
- if (dspreg != dspresult) {
- printf("cmp.lt.pw error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dspreg, dspresult;
-
- rs = 0x123558789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x01;
-
- __asm
- ("cmp.lt.qh %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0x0F);
-
- if (dspreg != dspresult) {
- printf("cmp.lt.qh error\n");
-
- return -1;
- }
-
- rs = 0x123356779ABbDEF0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x0f;
-
- __asm
- ("cmp.lt.qh %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0x0F);
-
- if (dspreg != dspresult) {
- printf("cmp.lt.qh error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result;
-
- rs = 0x123456789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- result = 0xFE;
-
- __asm
- ("cmpgu.eq.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("cmpgu.eq.ob error\n");
-
- return -1;
- }
-
- rs = 0x133456789ABCDEF0;
- rt = 0x123556789ABCDEFF;
- result = 0x3E;
-
- __asm
- ("cmpgu.eq.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("cmpgu.eq.ob error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x11777066;
- rt = 0x55AA70FF;
- result = 0x02;
- __asm
- ("cmpgu.eq.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("cmpgu.eq.ph wrong\n");
-
- return -1;
- }
-
- rs = 0x11777066;
- rt = 0x11777066;
- result = 0x0F;
- __asm
- ("cmpgu.eq.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("cmpgu.eq.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result;
-
- rs = 0x123456789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- result = 0xFF;
-
- __asm
- ("cmpgu.le.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("cmpgu.le.ob error\n");
-
- return -1;
- }
-
- rs = 0x823556789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- result = 0x3F;
-
- __asm
- ("cmpgu.le.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("cmpgu.le.ob error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x11777066;
- rt = 0x55AA70FF;
- result = 0x0F;
- __asm
- ("cmpgu.le.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("cmpgu.le.qb wrong\n");
-
- return -1;
- }
-
- rs = 0x11777066;
- rt = 0x11766066;
- result = 0x09;
- __asm
- ("cmpgu.le.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("cmpgu.le.qb wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result;
-
- rs = 0x123456789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- result = 0x01;
-
- __asm
- ("cmpgu.lt.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("cmpgu.lt.ob error\n");
-
- return -1;
- }
-
- rs = 0x823455789ABCDEF0;
- rt = 0x123356789ABCDEFF;
- result = 0x21;
-
- __asm
- ("cmpgu.lt.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("cmpgu.lt.ob error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x11777066;
- rt = 0x55AA70FF;
- result = 0x0D;
- __asm
- ("cmpgu.lt.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("cmpgu.lt.qb wrong\n");
-
- return -1;
- }
-
- rs = 0x11777066;
- rt = 0x11766066;
- result = 0x00;
- __asm
- ("cmpgu.lt.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("cmpgu.lt.qb wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dspreg, dspresult;
-
- rs = 0x123456789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0xFE;
-
- __asm
- ("cmpu.eq.ob %1, %2\n\t"
- "rddsp %0"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0xFF);
-
- if (dspreg != dspresult) {
- printf("cmpu.eq.ob error\n");
-
- return -1;
- }
-
- rs = 0x133516713A0CD1F0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x00;
-
- __asm
- ("cmpu.eq.ob %1, %2\n\t"
- "rddsp %0"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0xFF);
-
- if (dspreg != dspresult) {
- printf("cmpu.eq.ob error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long dsp;
- long long result;
-
- rs = 0x11777066;
- rt = 0x55AA70FF;
- result = 0x02;
- __asm
- ("cmpu.eq.qb %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 24) & 0x0F;
- if (dsp != result) {
- printf("cmpu.eq.qb wrong\n");
-
- return -1;
- }
-
- rs = 0x11777066;
- rt = 0x11777066;
- result = 0x0F;
- __asm
- ("cmpu.eq.qb %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 24) & 0x0F;
- if (dsp != result) {
- printf("cmpu.eq.qb wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dspreg, dspresult;
-
- rs = 0x123456789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0xFF;
-
- __asm
- ("cmpu.le.ob %1, %2\n\t"
- "rddsp %0"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = dspreg >> 24;
- if (dspreg != dspresult) {
- printf("cmpu.le.ob error\n");
-
- return -1;
- }
-
- rs = 0x823656789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x3F;
-
- __asm
- ("cmpu.le.ob %1, %2\n\t"
- "rddsp %0"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = dspreg >> 24;
- if (dspreg != dspresult) {
- printf("cmpu.le.ob error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long dsp;
- long long result;
-
- rs = 0x11777066;
- rt = 0x55AA70FF;
- result = 0x0F;
- __asm
- ("cmpu.le.qb %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 24) & 0x0F;
- if (dsp != result) {
- printf("cmpu.le.qb wrong\n");
-
- return -1;
- }
-
- rs = 0x11777066;
- rt = 0x11777066;
- result = 0x0F;
- __asm
- ("cmpu.le.qb %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 24) & 0x0F;
- if (dsp != result) {
- printf("cmpu.le.qb wrong\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dspreg, dspresult;
-
- rs = 0x123456789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x01;
-
- __asm
- ("cmpu.lt.ob %1, %2\n\t"
- "rddsp %0"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = dspreg >> 24;
- if (dspreg != dspresult) {
- printf("cmpu.lt.ob error\n");
-
- return -1;
- }
-
- rs = 0x823156789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x41;
-
- __asm
- ("cmpu.lt.ob %1, %2\n\t"
- "rddsp %0"
- : "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = dspreg >> 24;
- if (dspreg != dspresult) {
- printf("cmpu.lt.ob error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long dsp;
- long long result;
-
- rs = 0x11777066;
- rt = 0x55AA70FF;
- result = 0x0D;
- __asm
- ("cmpu.lt.qb %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 24) & 0x0F;
- if (dsp != result) {
- printf("cmpu.lt.qb wrong\n");
-
- return -1;
- }
-
- rs = 0x11777066;
- rt = 0x11777066;
- result = 0x00;
- __asm
- ("cmpu.lt.qb %1, %2\n\t"
- "rddsp %0\n\t"
- : "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 24) & 0x0F;
- if (dsp != result) {
- printf("cmpu.lt.qb wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long res;
- rt = 0x1234567887654321;
- rs = 0xabcd1234abcd8765;
-
- res = 0x1234567887654321;
- __asm
- ("dappend %0, %1, 0x0\n\t"
- : "=r"(rt)
- : "r"(rs)
- );
-
- if (rt != res) {
- printf("dappend error\n");
- return -1;
- }
-
- rt = 0x1234567887654321;
- rs = 0xabcd1234abcd8765;
-
- res = 0x2345678876543215;
- __asm
- ("dappend %0, %1, 0x4\n\t"
- : "=r"(rt)
- : "r"(rs)
- );
-
- if (rt != res) {
- printf("dappend error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, dsp;
- long long achi, acli;
- long long res, resdsp;
- int rs;
-
- rs = 0xabcd1234;
-
- achi = 0x12345678;
- acli = 0x87654321;
- res = 0xff;
- resdsp = 0x0;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "wrdsp %4\n\t"
- "dextp %0, $ac1, 0x7\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs)
- );
- dsp = (dsp >> 14) & 0x1;
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextp error\n");
- return -1;
- }
-
- rs = 0xabcd1200;
-
- achi = 0x12345678;
- acli = 0x87654321;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "wrdsp %4\n\t"
- "dextp %0, $ac1, 0x7\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs)
- );
- dsp = (dsp >> 14) & 0x1;
- if (dsp != resdsp) {
- printf("dextp error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, dsp;
- long long achi, acli;
- long long res, resdsp, resdsppos;
- int rs;
- int tmp1, tmp2;
-
- rs = 0xabcd1234;
-
- achi = 0x12345678;
- acli = 0x87654321;
- res = 0xff;
- resdsp = 0x0;
- resdsppos = 0x2c;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "wrdsp %4\n\t"
- "dextpdp %0, $ac1, 0x7\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs)
- );
- tmp1 = (dsp >> 14) & 0x1;
- tmp2 = dsp & 0x3f;
-
- if ((tmp1 != resdsp) || (rt != res) || (tmp2 != resdsppos)) {
- printf("dextpdp error\n");
- return -1;
- }
-
- rs = 0xabcd1200;
-
- achi = 0x12345678;
- acli = 0x87654321;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "wrdsp %4\n\t"
- "dextpdp %0, $ac1, 0x7\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs)
- );
- tmp1 = (dsp >> 14) & 0x1;
-
- if (tmp1 != resdsp) {
- printf("dextpdp error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long res, resdsp, resdsppos;
- int rsdsp;
- int tmp1, tmp2;
-
- rsdsp = 0xabcd1234;
- rs = 0x7;
- achi = 0x12345678;
- acli = 0x87654321;
- res = 0xff;
- resdsp = 0x0;
- resdsppos = 0x2c;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "wrdsp %4, 0x1\n\t"
- "wrdsp %4\n\t"
- "dextpdpv %0, $ac1, %5\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rsdsp), "r"(rs)
- );
-
- tmp1 = (dsp >> 14) & 0x1;
- tmp2 = dsp & 0x3f;
-
- if ((tmp1 != resdsp) || (rt != res) || (tmp2 != resdsppos)) {
- printf("dextpdpv error\n");
- return -1;
- }
-
- rsdsp = 0xabcd1200;
- rs = 0x7;
- achi = 0x12345678;
- acli = 0x87654321;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "wrdsp %4, 0x1\n\t"
- "wrdsp %4\n\t"
- "dextpdpv %0, $ac1, %5\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rsdsp), "r"(rs)
- );
-
- tmp1 = (dsp >> 14) & 0x1;
-
- if (tmp1 != resdsp) {
- printf("dextpdpv error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long res, resdsp;
- int rsdsp;
-
- rsdsp = 0xabcd1234;
- rs = 0x7;
-
- achi = 0x12345678;
- acli = 0x87654321;
- res = 0xff;
- resdsp = 0x0;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "wrdsp %4, 0x1\n\t"
- "wrdsp %4\n\t"
- "dextpv %0, $ac1, %5\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rsdsp), "r"(rs)
- );
- dsp = (dsp >> 14) & 0x1;
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextpv error\n");
- return -1;
- }
-
- rsdsp = 0xabcd1200;
- rs = 0x7;
-
- achi = 0x12345678;
- acli = 0x87654321;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "wrdsp %4, 0x1\n\t"
- "wrdsp %4\n\t"
- "dextpv %0, $ac1, %5\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rsdsp), "r"(rs)
- );
- dsp = (dsp >> 14) & 0x1;
- if (dsp != resdsp) {
- printf("dextpv error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt;
- long long achi, acli;
- long long res;
-
- achi = 0x87654321;
- acli = 0x12345678;
-
- res = 0x2100000000123456;
-
- __asm
- ("mthi %1, $ac1\n\t"
- "mtlo %2, $ac1\n\t"
- "dextr.l %0, $ac1, 0x8\n\t"
- : "=r"(rt)
- : "r"(achi), "r"(acli)
- );
- if (rt != res) {
- printf("dextr.l error\n");
- return -1;
- }
-
- achi = 0x87654321;
- acli = 0x12345678;
-
- res = 0x12345678;
-
- __asm
- ("mthi %1, $ac1\n\t"
- "mtlo %2, $ac1\n\t"
- "dextr.l %0, $ac1, 0x0\n\t"
- : "=r"(rt)
- : "r"(achi), "r"(acli)
- );
- if (rt != res) {
- printf("dextr.l error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, dsp;
- long long achi, acli;
- long long res, resdsp;
-
- achi = 0x87654321;
- acli = 0x12345678;
-
- res = 0x2100000000123456;
- resdsp = 0x01;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextr_r.l %0, $ac1, 0x8\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli)
- );
-
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextr_r.l error\n");
- return -1;
- }
-
- achi = 0x87654321;
- acli = 0x12345678;
-
- res = 0x12345678;
- resdsp = 0x01;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextr_r.l %0, $ac1, 0x0\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli)
- );
-
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextr_r.l error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, dsp;
- long long achi, acli;
- long long res, resdsp;
-
- achi = 0x87654321;
- acli = 0x12345678;
-
- res = 0x123456;
- resdsp = 0x01;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextr_r.w %0, $ac1, 0x8\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli)
- );
-
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextr_r.w error\n");
- return -1;
- }
-
- achi = 0x87654321;
- acli = 0x12345678;
-
- res = 0x12345678;
- resdsp = 0x01;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextr_r.w %0, $ac1, 0x0\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli)
- );
-
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextr_r.w error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, dsp;
- long long achi, acli;
- long long res, resdsp;
-
- achi = 0x87654321;
- acli = 0x12345678;
-
- res = 0x8000000000000000;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextr_rs.l %0, $ac1, 0x8\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli)
- );
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextr_rs.l error\n");
- return -1;
- }
-
- achi = 0x00;
- acli = 0x12345678;
-
- res = 0x12345678;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextr_rs.l %0, $ac1, 0x0\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli)
- );
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextr_rs.l error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, dsp;
- long long achi, acli;
- long long res, resdsp;
-
- achi = 0x87654321;
- acli = 0x12345678;
-
- res = 0xffffffff80000000;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextr_rs.w %0, $ac1, 0x8\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli)
- );
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextr_rs.w error\n");
- return -1;
- }
-
- achi = 0x00;
- acli = 0x12345678;
-
- res = 0x123456;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextr_rs.w %0, $ac1, 0x8\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli)
- );
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextr_rs.w error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, dsp;
- long long achi, acli;
- long long res, resdsp;
-
- achi = 0x87654321;
- acli = 0x12345678;
-
- res = 0xffffffffffff8000;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextr_s.h %0, $ac1, 0x8\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli)
- );
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("1 dextr_s.h error\n");
- return -1;
- }
-
- achi = 0x77654321;
- acli = 0x12345678;
-
- res = 0x7fff;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextr_s.h %0, $ac1, 0x8\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli)
- );
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("2 dextr_s.h error\n");
- return -1;
- }
-
- achi = 0x00;
- acli = 0x78;
-
- res = 0x7;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextr_s.h %0, $ac1, 0x4\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli)
- );
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("3 dextr_s.h error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt;
- long long achi, acli;
- long long res;
-
- achi = 0x87654321;
- acli = 0x12345678;
-
- res = 0x123456;
-
- __asm
- ("mthi %1, $ac1\n\t"
- "mtlo %2, $ac1\n\t"
- "dextr.w %0, $ac1, 0x8\n\t"
- : "=r"(rt)
- : "r"(achi), "r"(acli)
- );
- if (rt != res) {
- printf("dextr.w error\n");
- return -1;
- }
-
- achi = 0x87654321;
- acli = 0x12345678;
-
- res = 0x12345678;
-
- __asm
- ("mthi %1, $ac1\n\t"
- "mtlo %2, $ac1\n\t"
- "dextr.w %0, $ac1, 0x0\n\t"
- : "=r"(rt)
- : "r"(achi), "r"(acli)
- );
- if (rt != res) {
- printf("dextr.w error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long achi, acli;
- long long res;
-
- achi = 0x87654321;
- acli = 0x12345678;
- rs = 0x8;
-
- res = 0x2100000000123456;
-
- __asm
- ("mthi %1, $ac1\n\t"
- "mtlo %2, $ac1\n\t"
- "dextrv.l %0, $ac1, %3\n\t"
- : "=r"(rt)
- : "r"(achi), "r"(acli), "r"(rs)
- );
- if (rt != res) {
- printf("dextrv.l error\n");
- return -1;
- }
-
- achi = 0x87654321;
- acli = 0x12345678;
- rs = 0x0;
-
- res = 0x12345678;
-
- __asm
- ("mthi %1, $ac1\n\t"
- "mtlo %2, $ac1\n\t"
- "dextrv.l %0, $ac1, %3\n\t"
- : "=r"(rt)
- : "r"(achi), "r"(acli), "r"(rs)
- );
- if (rt != res) {
- printf("dextrv.l error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, dsp, rs;
- long long achi, acli;
- long long res, resdsp;
-
- achi = 0x87654321;
- acli = 0x12345678;
- rs = 0x8;
-
- res = 0x2100000000123456;
- resdsp = 0x01;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextrv_r.l %0, $ac1, %4\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs)
- );
-
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextrv_r.l error\n");
- return -1;
- }
-
- achi = 0x87654321;
- acli = 0x12345678;
- rs = 0x0;
-
- res = 0x12345678;
- resdsp = 0x01;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextrv_r.l %0, $ac1, %4\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs)
- );
-
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextrv_r.l error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long res, resdsp;
-
- achi = 0x87654321;
- acli = 0x12345678;
- rs = 0x8;
-
- res = 0x123456;
- resdsp = 0x01;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextrv_r.w %0, $ac1, %4\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs)
- );
-
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextrv_r.w error\n");
- return -1;
- }
-
- achi = 0x87654321;
- acli = 0x12345678;
- rs = 0x0;
-
- res = 0x12345678;
- resdsp = 0x01;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextrv_r.w %0, $ac1, %4\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs)
- );
-
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextrv_r.w error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long res, resdsp;
-
- achi = 0x87654321;
- acli = 0x12345678;
- rs = 0x8;
-
- res = 0x8000000000000000;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextrv_rs.l %0, $ac1, %4\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs)
- );
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextrv_rs.l error\n");
- return -1;
- }
-
- achi = 0x00;
- acli = 0x12345678;
- rs = 0x0;
-
- res = 0x12345678;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextrv_rs.l %0, $ac1, %4\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs)
- );
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextrv_rs.l error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long res, resdsp;
-
- achi = 0x87654321;
- acli = 0x12345678;
- rs = 0x8;
-
- res = 0xffffffff80000000;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextrv_rs.w %0, $ac1, %4\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs)
- );
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextrv_rs.w error\n");
- return -1;
- }
-
- achi = 0x00;
- acli = 0x12345678;
- rs = 0x8;
-
- res = 0x123456;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextrv_rs.w %0, $ac1, %4\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs)
- );
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextrv_rs.w error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long res, resdsp;
-
- achi = 0x87654321;
- acli = 0x12345678;
- rs = 0x8;
-
- res = 0xffffffffffff8000;
- resdsp = 0x1;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dextrv_s.h %0, $ac1, %4\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs)
- );
- dsp = (dsp >> 23) & 0x1;
-
- if ((dsp != resdsp) || (rt != res)) {
- printf("dextrv_s.h error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long achi, acli;
- long long res;
-
- achi = 0x87654321;
- acli = 0x12345678;
- rs = 0x8;
-
- res = 0x123456;
-
- __asm
- ("mthi %1, $ac1\n\t"
- "mtlo %2, $ac1\n\t"
- "dextrv.w %0, $ac1, %3\n\t"
- : "=r"(rt)
- : "r"(achi), "r"(acli), "r"(rs)
- );
- if (rt != res) {
- printf("dextrv.w error\n");
- return -1;
- }
-
- achi = 0x87654321;
- acli = 0x12345678;
- rs = 0x0;
-
- res = 0x12345678;
-
- __asm
- ("mthi %1, $ac1\n\t"
- "mtlo %2, $ac1\n\t"
- "dextrv.w %0, $ac1, %3\n\t"
- : "=r"(rt)
- : "r"(achi), "r"(acli), "r"(rs)
- );
- if (rt != res) {
- printf("dextrv.w error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dsp;
- long long res;
-
- rs = 0x1234567887654321;
- rt = 0x1234567812345678;
- dsp = 0x2222;
- res = 0x1234567812345678;
- __asm
- ("wrdsp %1, 0x3\n\t"
- "wrdsp %1\n\t"
- "dinsv %0, %2\n\t"
- : "+r"(rt)
- : "r"(dsp), "r"(rs)
- );
-
- if (rt != res) {
- printf("dinsv error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long achi, acli;
- long long acho, aclo;
- long long resh, resl;
-
- achi = 0x1;
- acli = 0x1;
-
- rs = 0x0000000100000001;
- rt = 0x0000000200000002;
-
- resh = 0x1;
- resl = 0x5;
- __asm
- ("mthi %2, $ac1 \t\n"
- "mtlo %3, $ac1 \t\n"
- "dmadd $ac1, %4, %5\t\n"
- "mfhi %0, $ac1 \t\n"
- "mflo %1, $ac1 \t\n"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((acho != resh) || (aclo != resl)) {
- printf("1 dmadd error\n");
-
- return -1;
- }
-
- achi = 0x1;
- acli = 0x1;
-
- rs = 0xaaaabbbbccccdddd;
- rt = 0xaaaabbbbccccdddd;
-
- resh = 0x0000000000000000;
- resl = 0xffffffffca860b63;
-
- __asm
- ("mthi %2, $ac1 \t\n"
- "mtlo %3, $ac1 \t\n"
- "dmadd $ac1, %4, %5\t\n"
- "mfhi %0, $ac1 \t\n"
- "mflo %1, $ac1 \t\n"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((acho != resh) || (aclo != resl)) {
- printf("2 dmadd error\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long achi, acli;
- long long acho, aclo;
- long long resh, resl;
- achi = 0x1;
- acli = 0x2;
-
- rs = 0x0000000200000002;
- rt = 0x0000000200000002;
- resh = 0x1;
- resl = 0xa;
- __asm
- ("mthi %2, $ac1 \t\n"
- "mtlo %3, $ac1 \t\n"
- "dmaddu $ac1, %4, %5\t\n"
- "mfhi %0, $ac1 \t\n"
- "mflo %1, $ac1 \t\n"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((acho != resh) || (aclo != resl)) {
- printf("1 dmaddu error\n");
-
- return -1;
- }
-
- achi = 0x1;
- acli = 0x1;
-
- rs = 0xaaaabbbbccccdddd;
- rt = 0xaaaabbbbccccdddd;
-
- resh = 0x0000000000000002;
- resl = 0xffffffffca860b63;
-
- __asm
- ("mthi %2, $ac1 \t\n"
- "mtlo %3, $ac1 \t\n"
- "dmaddu $ac1, %4, %5\t\n"
- "mfhi %0, $ac1 \t\n"
- "mflo %1, $ac1 \t\n"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((acho != resh) || (aclo != resl)) {
- printf("2 dmaddu error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long achi, acli;
- long long acho, aclo;
- long long resh, resl;
- achi = 0x1;
- acli = 0x8;
-
- rs = 0x0000000100000001;
- rt = 0x0000000200000002;
-
- resh = 0x1;
- resl = 0x4;
-
- __asm
- ("mthi %2, $ac1 \t\n"
- "mtlo %3, $ac1 \t\n"
- "dmsub $ac1, %4, %5\t\n"
- "mfhi %0, $ac1 \t\n"
- "mflo %1, $ac1 \t\n"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((acho != resh) || (aclo != resl)) {
- printf("1 dmsub error\n");
-
- return -1;
- }
-
- achi = 0xfffffffF;
- acli = 0xfffffffF;
-
- rs = 0x8888999977776666;
- rt = 0x9999888877776666;
-
- resh = 0xffffffffffffffff;
- resl = 0x789aae13;
-
- __asm
- ("mthi %2, $ac1 \t\n"
- "mtlo %3, $ac1 \t\n"
- "dmsub $ac1, %4, %5\t\n"
- "mfhi %0, $ac1 \t\n"
- "mflo %1, $ac1 \t\n"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl)) {
- printf("2 dmsub error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long achi, acli;
- long long acho, aclo;
- long long resh, resl;
- achi = 0x1;
- acli = 0x8;
-
- rs = 0x0000000100000001;
- rt = 0x0000000200000002;
-
- resh = 0x1;
- resl = 0x4;
-
- __asm
- ("mthi %2, $ac1 \t\n"
- "mtlo %3, $ac1 \t\n"
- "dmsubu $ac1, %4, %5\t\n"
- "mfhi %0, $ac1 \t\n"
- "mflo %1, $ac1 \t\n"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((acho != resh) || (aclo != resl)) {
- printf("1 dmsubu error\n");
-
- return -1;
- }
-
- achi = 0xfffffffF;
- acli = 0xfffffffF;
-
- rs = 0x8888999977776666;
- rt = 0x9999888877776666;
-
- resh = 0xffffffffffffffff;
- resl = 0x789aae13;
-
- __asm
- ("mthi %2, $ac1 \t\n"
- "mtlo %3, $ac1 \t\n"
- "dmsubu $ac1, %4, %5\t\n"
- "mfhi %0, $ac1 \t\n"
- "mflo %1, $ac1 \t\n"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl)) {
- printf("2 dmsubu error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, dsp;
- long long achi, acli;
-
- long long rsdsp;
- long long acho, aclo;
-
- long long res;
- long long reshi, reslo;
-
-
- rs = 0xaaaabbbbccccdddd;
- achi = 0x87654321;
- acli = 0x12345678;
- dsp = 0x22;
-
- res = 0x62;
- reshi = 0x12345678;
- reslo = 0xffffffffccccdddd;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "wrdsp %5\n\t"
- "dmthlip %6, $ac1\n\t"
- "rddsp %0\n\t"
- "mfhi %1, $ac1\n\t"
- "mflo %2, $ac1\n\t"
- : "=r"(rsdsp), "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(dsp), "r"(rs)
- );
- if ((rsdsp != res) || (acho != reshi) || (aclo != reslo)) {
- printf("dmthlip error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dsp;
- long long ach = 0, acl = 0;
- long long resulth, resultl, resultdsp;
-
- rs = 0x800000FF;
- rt = 0x80000002;
- resulth = 0x00;
- resultl = 0xFFFFFFFF800003FB;
- resultdsp = 0x01;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpaq_s.w.ph $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = dsp >> 17 & 0x01;
- if ((dsp != resultdsp) || (ach != resulth) || (acl != resultl)) {
- printf("dpaq_w.w.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-int main(void)
-{
- long long rt, rs;
- long long achi, acli;
- long long acho, aclo;
- long long resh, resl;
-
- achi = 0x1;
- acli = 0x1;
- rs = 0x0001000100010001;
- rt = 0x0002000200020002;
- resh = 0x1;
- resl = 0x11;
-
- __asm
- ("mthi %2, $ac1\t\n"
- "mtlo %3, $ac1\t\n"
- "dpaq_s.w.qh $ac1, %4, %5\t\n"
- "mfhi %0, $ac1\t\n"
- "mflo %1, $ac1\t\n"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((acho != resh) || (aclo != resl)) {
- printf("1 dpaq_s.w.qh error\n");
-
- return -1;
- }
-
- achi = 0xffffffff;
- acli = 0xaaaaaaaa;
-
- rs = 0x1111222233334444;
- rt = 0xffffeeeeddddcccc;
-
- resh = 0x00;
- resl = 0xffffffffd27ad82e;
-
- __asm
- ("mthi %2, $ac1\t\n"
- "mtlo %3, $ac1\t\n"
- "dpaq_s.w.qh $ac1, %4, %5\t\n"
- "mfhi %0, $ac1\t\n"
- "mflo %1, $ac1\t\n"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl)) {
- printf("2 dpaq_s.w.qh error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long achi, acli;
- long long acho, aclo;
- long long dsp;
- long long resh, resl;
- long long resdsp;
-
- rs = 0x0000000100000001;
- rt = 0x0000000200000002;
- achi = 0x1;
- acli = 0x1;
- resh = 0xffffffffffffffff;
- resl = 0x0;
- resdsp = 0x01;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "dpaq_sa.l.pw $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl) || ((dsp >> (16 + 1)) != resdsp)) {
- printf("1 dpaq_sa_l_pw error\n");
-
- return -1;
- }
-
- rs = 0xaaaabbbbccccdddd;
- rt = 0x3333444455556666;
- achi = 0x88888888;
- acli = 0x66666666;
-
- resh = 0xffffffff88888887;
- resl = 0xffffffff9e2661da;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dpaq_sa.l.pw $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl)) {
- printf("2 dpaq_sa_l_pw error\n");
-
- return -1;
- }
-
- rs = 0x8000000080000000;
- rt = 0x8000000080000000;
- achi = 0x88888888;
- acli = 0x66666666;
-
- resh = 0xffffffffffffffff;
- resl = 0x00;
- resdsp = 0x01;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "dpaq_sa.l.pw $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl) || ((dsp >> (16 + 1)) != resdsp)) {
- printf("2 dpaq_sa_l_pw error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dsp;
- long long ach = 0, acl = 0;
- long long resulth, resultl, resultdsp;
-
- rs = 0x80000000;
- rt = 0x80000000;
- resulth = 0x7FFFFFFF;
- resultl = 0xffffffffFFFFFFFF;
- resultdsp = 0x01;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %0, $ac1\n\t"
- "dpaq_sa.l.w $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x01;
- if ((dsp != resultdsp) || (ach != resulth) || (acl != resultl)) {
- printf("dpaq_sa.l.w error\n");
-
- return -1;
- }
-
- ach = 0x12;
- acl = 0x48;
- rs = 0x80000000;
- rt = 0x80000000;
-
- resulth = 0x7FFFFFFF;
- resultl = 0xffffffffFFFFFFFF;
- resultdsp = 0x01;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %0, $ac1\n\t"
- "dpaq_sa.l.w $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x01;
- if ((dsp != resultdsp) || (ach != resulth) || (acl != resultl)) {
- printf("dpaq_sa.l.w error\n");
-
- return -1;
- }
-
- ach = 0x741532A0;
- acl = 0xfceabb08;
- rs = 0x80000000;
- rt = 0x80000000;
-
- resulth = 0x7fffffff;
- resultl = 0xffffffffffffffff;
- resultdsp = 0x01;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %0, $ac1\n\t"
- "dpaq_sa.l.w $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x01;
- if ((dsp != resultdsp) || (ach != resulth) || (acl != resultl)) {
- printf("dpaq_sa.l.w error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long achi, acli;
- long long acho, aclo;
- long long resh, resl;
-
- rs = 0x0000000100000001;
- rt = 0x0000000200000002;
- achi = 0x1;
- acli = 0x1;
- resh = 0x1;
- resl = 0x3;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dpau.h.obl $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl)) {
- printf("1 dpau.h.obl error\n");
-
- return -1;
- }
-
- rs = 0xaaaabbbbccccdddd;
- rt = 0x3333444455556666;
- achi = 0x88888888;
- acli = 0x66666666;
-
- resh = 0xffffffff88888888;
- resl = 0x66670d7a;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dpau.h.obl $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl)) {
- printf("1 dpau.h.obl error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long achi, acli;
- long long acho, aclo;
- long long resh, resl;
-
- rs = 0x0000000100000001;
- rt = 0x0000000200000002;
- achi = 0x1;
- acli = 0x1;
- resh = 0x1;
- resl = 0x3;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dpau.h.obr $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl)) {
- printf("1 dpau.h.obr error\n");
-
- return -1;
- }
-
- rs = 0xccccddddaaaabbbb;
- rt = 0x5555666633334444;
- achi = 0x88888888;
- acli = 0x66666666;
-
- resh = 0xffffffff88888888;
- resl = 0x66670d7a;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dpau.h.obr $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl)) {
- printf("1 dpau.h.obr error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long ach = 5, acl = 3;
- long long resulth, resultl;
-
- rs = 0x800000FF;
- rt = 0x80000002;
- resulth = 0x05;
- resultl = 0x4003;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpau.h.qbl $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
- if ((ach != resulth) || (acl != resultl)) {
- printf("dpau.h.qbl wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long ach = 5, acl = 3;
- long long resulth, resultl;
-
- rs = 0x800000FF;
- rt = 0x80000002;
- resulth = 0x05;
- resultl = 0x0201;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpau.h.qbr $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
- if ((ach != resulth) || (acl != resultl)) {
- printf("dpau.h.qbr wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long ach = 5, acl = 5;
- long long resulth, resultl;
-
- rs = 0xBC0123AD;
- rt = 0x01643721;
- resulth = 0x04;
- resultl = 0xFFFFFFFFEE9794A3;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsq_s.w.ph $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
- if ((ach != resulth) || (acl != resultl)) {
- printf("1 dpsq_s.w.ph wrong\n");
-
- return -1;
- }
-
- ach = 0x1424Ef1f;
- acl = 0x1035219A;
- rs = 0x800083AD;
- rt = 0x80003721;
- resulth = 0x1424ef1e;
- resultl = 0x577ed901;
-
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsq_s.w.ph $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
- if ((ach != resulth) || (acl != resultl)) {
- printf("2 dpsq_s.w.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long achi, acli;
- long long acho, aclo;
- long long resh, resl;
-
- rs = 0xffffeeeeddddcccc;
- rt = 0x9999888877776666;
- achi = 0x67576;
- acli = 0x98878;
-
- resh = 0x67576;
- resl = 0x5b1682c4;
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dpsq_s.w.qh $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((acho != resh) || (aclo != resl)) {
- printf("1 dpsq_s.w.qh wrong\n");
-
- return -1;
- }
-
- rs = 0x8000800080008000;
- rt = 0x8000800080008000;
- achi = 0x67576;
- acli = 0x98878;
-
- resh = 0x67575;
- resl = 0x0009887c;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dpsq_s.w.qh $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((acho != resh) || (aclo != resl)) {
- printf("2 dpsq_s.w.qh wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dsp;
- long long achi, acli;
- long long resh, resl, resdsp;
-
- rs = 0x89789BC0123AD;
- rt = 0x5467591643721;
-
- achi = 0x98765437;
- acli = 0x65489709;
-
- resh = 0xffffffffffffffff;
- resl = 0x00;
-
- resdsp = 0x01;
-
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsq_sa.l.pw $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(achi), "+r"(acli), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 17) & 0x01;
- if ((dsp != resdsp) || (achi != resh) || (acli != resl)) {
- printf("1 dpsq_sa.l.pw wrong\n");
-
- return -1;
- }
-
- /* clear dspcontrol reg for next test use. */
- dsp = 0;
- __asm
- ("wrdsp %0"
- :
- : "r"(dsp)
- );
-
- rs = 0x8B78980000000;
- rt = 0x5867580000000;
-
- achi = 0x98765437;
- acli = 0x65489709;
-
- resh = 0xffffffff98765436;
- resl = 0x11d367d0;
-
- resdsp = 0x01;
-
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsq_sa.l.pw $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(achi), "+r"(acli), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 17) & 0x01;
- if ((dsp != resdsp) || (achi != resh) || (acli != resl)) {
- printf("2 dpsq_sa.l.pw wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dsp;
- long long ach = 5, acl = 5;
- long long resulth, resultl, resultdsp;
-
- rs = 0xBC0123AD;
- rt = 0x01643721;
-
- resulth = 0xfffffffffdf4cbe0;
- resultl = 0xFFFFFFFFd138776b;
- resultdsp = 0x00;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsq_sa.l.w $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x01;
- if ((dsp != resultdsp) || (ach != resulth) || (acl != resultl)) {
- printf("1 dpsq_sa.l.w wrong\n");
-
- return -1;
- }
-
- ach = 0x54321123;
- acl = 5;
- rs = 0x80000000;
- rt = 0x80000000;
-
- resulth = 0xffffffffd4321123;
- resultl = 0x06;
- resultdsp = 0x01;
-
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsq_sa.l.w $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x01;
- if ((dsp != resultdsp) || (ach != resulth) || (acl != resultl)) {
- printf("2 dpsq_sa.l.w wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long ach = 5, acl = 5;
- long long resulth, resultl;
-
- rs = 0x88886666BC0123AD;
- rt = 0x9999888801643721;
-
- resulth = 0x04;
- resultl = 0xFFFFFFFFFFFEF115;
-
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsu.h.obl $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
-
- if ((ach != resulth) || (acl != resultl)) {
- printf("dpsu.h.obl wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long ach = 5, acl = 5;
- long long resulth, resultl;
-
- rs = 0x7878878888886666;
- rt = 0x9865454399998888;
-
- resulth = 0x04;
- resultl = 0xFFFFFFFFFFFeF115;
-
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsu.h.obr $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
-
- if ((ach != resulth) || (acl != resultl)) {
- printf("dpsu.h.qbr wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long ach = 5, acl = 5;
- long long resulth, resultl;
-
- rs = 0xBC0123AD;
- rt = 0x01643721;
- resulth = 0x04;
- resultl = 0xFFFFFFFFFFFFFEE5;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsu.h.qbl $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
- if ((ach != resulth) || (acl != resultl)) {
- printf("dpsu.h.qbl wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long ach = 5, acl = 5;
- long long resulth, resultl;
-
- rs = 0xBC0123AD;
- rt = 0x01643721;
- resulth = 0x04;
- resultl = 0xFFFFFFFFFFFFE233;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsu.h.qbr $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
- if ((ach != resulth) || (acl != resultl)) {
- printf("dpsu.h.qbr wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long achi, acli;
- long long acho, aclo;
- long long reshi, reslo;
-
- achi = 0x87654321;
- acli = 0x12345678;
-
- reshi = 0xfffffffff8765432;
- reslo = 0x1234567;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dshilo $ac1, 0x4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli)
- );
-
- if ((acho != reshi) || (aclo != reslo)) {
- printf("1 dshilo error\n");
- return -1;
- }
-
- achi = 0x87654321;
- acli = 0x12345678;
-
- reshi = 0x1234567;
- reslo = 0x00;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dshilo $ac1, -60\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli)
- );
-
- if ((acho != reshi) || (aclo != reslo)) {
- printf("2 dshilo error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long achi, acli, rs;
- long long acho, aclo;
- long long reshi, reslo;
-
- achi = 0x87654321;
- acli = 0x12345678;
- rs = 0x4;
-
- reshi = 0xfffffffff8765432;
- reslo = 0x1234567;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dshilov $ac1, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs)
- );
-
- if ((acho != reshi) || (aclo != reslo)) {
- printf("dshilov error\n");
- return -1;
- }
-
- rs = 0x44;
- achi = 0x87654321;
- acli = 0x12345678;
-
- reshi = 0x1234567;
- reslo = 0x00;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "dshilov $ac1, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs)
- );
-
- if ((acho != reshi) || (aclo != reslo)) {
- printf("dshilov error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, ach, acl, dsp;
- long long result;
-
- ach = 0x05;
- acl = 0xB4CB;
- dsp = 0x07;
- result = 0x000C;
-
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extp %0, $ac1, 0x03\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 14) & 0x01;
- if ((dsp != 0) || (result != rt)) {
- printf("extp wrong\n");
-
- return -1;
- }
-
- ach = 0x05;
- acl = 0xB4CB;
- dsp = 0x01;
-
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extp %0, $ac1, 0x03\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 14) & 0x01;
- if (dsp != 1) {
- printf("extp wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, ach, acl, dsp, pos, efi;
- long long result;
-
- ach = 0x05;
- acl = 0xB4CB;
- dsp = 0x07;
- result = 0x000C;
-
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extpdp %0, $ac1, 0x03\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(ach), "r"(acl)
- );
- pos = dsp & 0x3F;
- efi = (dsp >> 14) & 0x01;
- if ((pos != 3) || (efi != 0) || (result != rt)) {
- printf("extpdp wrong\n");
-
- return -1;
- }
-
- ach = 0x05;
- acl = 0xB4CB;
- dsp = 0x01;
-
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extpdp %0, $ac1, 0x03\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(ach), "r"(acl)
- );
- efi = (dsp >> 14) & 0x01;
- if (efi != 1) {
- printf("extpdp wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, ach, acl, dsp, pos, efi;
- long long result;
-
- ach = 0x05;
- acl = 0xB4CB;
- dsp = 0x07;
- rs = 0x03;
- result = 0x000C;
-
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extpdpv %0, $ac1, %4\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(ach), "r"(acl), "r"(rs)
- );
- pos = dsp & 0x3F;
- efi = (dsp >> 14) & 0x01;
- if ((pos != 3) || (efi != 0) || (result != rt)) {
- printf("extpdpv wrong\n");
-
- return -1;
- }
-
- ach = 0x05;
- acl = 0xB4CB;
- dsp = 0x01;
-
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extpdpv %0, $ac1, %4\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(ach), "r"(acl), "r"(rs)
- );
- efi = (dsp >> 14) & 0x01;
- if (efi != 1) {
- printf("extpdpv wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, ac, ach, acl, dsp;
- long long result;
-
- ach = 0x05;
- acl = 0xB4CB;
- dsp = 0x07;
- ac = 0x03;
- result = 0x000C;
-
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extpv %0, $ac1, %4\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(ach), "r"(acl), "r"(ac)
- );
- dsp = (dsp >> 14) & 0x01;
- if ((dsp != 0) || (result != rt)) {
- printf("extpv wrong\n");
-
- return -1;
- }
-
- ach = 0x05;
- acl = 0xB4CB;
- dsp = 0x01;
-
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extpv %0, $ac1, %4\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(ach), "r"(acl), "r"(ac)
- );
- dsp = (dsp >> 14) & 0x01;
- if (dsp != 1) {
- printf("extpv wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, ach, acl, dsp;
- long long result;
-
- ach = 0x05;
- acl = 0xB4CB;
- result = 0xFFFFFFFFA0001699;
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extr_r.w %0, $ac1, 0x03\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 1) || (result != rt)) {
- printf("1 extr_r.w wrong\n");
-
- return -1;
- }
-
- /* Clear dspcontrol */
- dsp = 0;
- __asm
- ("wrdsp %0\n\t"
- :
- : "r"(dsp)
- );
-
- ach = 0x01;
- acl = 0xB4CB;
- result = 0x10000B4D;
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extr_r.w %0, $ac1, 0x04\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 0) || (result != rt)) {
- printf("2 extr_r.w wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, ach, acl, dsp;
- long long result;
-
- ach = 0x05;
- acl = 0xB4CB;
- result = 0x7FFFFFFF;
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extr_rs.w %0, $ac1, 0x03\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 1) || (result != rt)) {
- printf("1 extr_rs.w wrong\n");
-
- return -1;
- }
-
- /* Clear dspcontrol */
- dsp = 0;
- __asm
- ("wrdsp %0\n\t"
- :
- : "r"(dsp)
- );
-
- ach = 0x01;
- acl = 0xB4CB;
- result = 0x10000B4D;
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extr_rs.w %0, $ac1, 0x04\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 0) || (result != rt)) {
- printf("2 extr_rs.w wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, ach, acl, dsp;
- long long result;
-
- ach = 0x05;
- acl = 0xB4CB;
- result = 0x00007FFF;
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extr_s.h %0, $ac1, 0x03\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 1) || (result != rt)) {
- printf("extr_s.h wrong\n");
-
- return -1;
- }
-
- ach = 0xffffffff;
- acl = 0x12344321;
- result = 0xffffffffFFFF8000;
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extr_s.h %0, $ac1, 0x08\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 1) || (result != rt)) {
- printf("extr_s.h wrong\n");
-
- return -1;
- }
-
- /* Clear dsp */
- dsp = 0;
- __asm
- ("wrdsp %0\n\t"
- :
- : "r"(dsp)
- );
-
- ach = 0x00;
- acl = 0x4321;
- result = 0x432;
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extr_s.h %0, $ac1, 0x04\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 0) || (result != rt)) {
- printf("extr_s.h wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, ach, acl, dsp;
- long long result;
-
- ach = 0x05;
- acl = 0xB4CB;
- result = 0xFFFFFFFFA0001699;
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extr.w %0, $ac1, 0x03\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 1) || (result != rt)) {
- printf("extr.w wrong\n");
-
- return -1;
- }
-
- /* Clear dspcontrol */
- dsp = 0;
- __asm
- ("wrdsp %0\n\t"
- :
- : "r"(dsp)
- );
-
- ach = 0x01;
- acl = 0xB4CB;
- result = 0x10000B4C;
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "extr.w %0, $ac1, 0x04\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "=r"(dsp)
- : "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 0) || (result != rt)) {
- printf("extr.w wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, ach, acl, dsp;
- long long result;
-
- ach = 0x05;
- acl = 0xB4CB;
- dsp = 0x07;
- rs = 0x03;
- result = 0xFFFFFFFFA0001699;
-
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "extrv_r.w %0, $ac1, %2\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(rs), "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 1) || (result != rt)) {
- printf("extrv_r.w wrong\n");
-
- return -1;
- }
-
- /* Clear dspcontrol */
- dsp = 0;
- __asm
- ("wrdsp %0\n\t"
- :
- : "r"(dsp)
- );
-
- rs = 4;
- ach = 0x01;
- acl = 0xB4CB;
- result = 0x10000B4D;
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "extrv_r.w %0, $ac1, %2\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(rs), "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 0) || (result != rt)) {
- printf("extrv_r.w wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, ach, acl, dsp;
- long long result;
-
- ach = 0x05;
- acl = 0xB4CB;
- dsp = 0x07;
- rs = 0x03;
- result = 0x7FFFFFFF;
-
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "extrv_rs.w %0, $ac1, %2\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(rs), "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 1) || (result != rt)) {
- printf("1 extrv_rs.w wrong\n");
-
- return -1;
- }
-
- /* Clear dspcontrol */
- dsp = 0;
- __asm
- ("wrdsp %0\n\t"
- :
- : "r"(dsp)
- );
-
- rs = 4;
- ach = 0x01;
- acl = 0xB4CB;
- result = 0x10000B4D;
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "extrv_rs.w %0, $ac1, %2\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(rs), "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 0) || (result != rt)) {
- printf("2 extrv_rs.w wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, ach, acl, dsp;
- long long result;
-
- ach = 0x05;
- acl = 0xB4CB;
- dsp = 0x07;
- rs = 0x03;
- result = 0x00007FFF;
-
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "extrv_s.h %0, $ac1, %2\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(rs), "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 1) || (result != rt)) {
- printf("extrv_s.h wrong\n");
-
- return -1;
- }
-
- rs = 0x08;
- ach = 0xffffffff;
- acl = 0x12344321;
- result = 0xffffffffFFFF8000;
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "extrv_s.h %0, $ac1, %2\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(rs), "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 1) || (result != rt)) {
- printf("extrv_s.h wrong\n");
-
- return -1;
- }
-
- /* Clear dsp */
- dsp = 0;
- __asm
- ("wrdsp %0\n\t"
- :
- : "r"(dsp)
- );
-
- rs = 0x04;
- ach = 0x00;
- acl = 0x4321;
- result = 0x432;
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "extrv_s.h %0, $ac1, %2\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(rs), "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 0) || (result != rt)) {
- printf("extrv_s.h wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, ach, acl, dsp;
- long long result;
-
- ach = 0x05;
- acl = 0xB4CB;
- dsp = 0x07;
- rs = 0x03;
- result = 0xFFFFFFFFA0001699;
-
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "extrv.w %0, $ac1, %2\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(rs), "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 1) || (result != rt)) {
- printf("extrv.w wrong\n");
-
- return -1;
- }
-
- /* Clear dspcontrol */
- dsp = 0;
- __asm
- ("wrdsp %0\n\t"
- :
- : "r"(dsp)
- );
-
- rs = 4;
- ach = 0x01;
- acl = 0xB4CB;
- result = 0x10000B4C;
- __asm
- ("wrdsp %1, 0x01\n\t"
- "mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "extrv.w %0, $ac1, %2\n\t"
- "rddsp %1\n\t"
- : "=r"(rt), "+r"(dsp)
- : "r"(rs), "r"(ach), "r"(acl)
- );
- dsp = (dsp >> 23) & 0x01;
- if ((dsp != 0) || (result != rt)) {
- printf("extrv.w wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-/*
- * Startup Code for MIPS64 CPU-core
- *
- */
-.text
-.globl _start
-.align 4
-_start:
- ori $2, $2, 0xffff
- sll $2, $2, 16
- ori $2, $2, 0xffff
- mtc0 $2, $12, 0
- jal main
-
-end:
- b end
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long result;
-
- /* msb = 10, lsb = 5 */
- dsp = 0x305;
- rt = 0x12345678;
- rs = 0xffffffff87654321;
- result = 0x12345338;
- __asm
- ("wrdsp %2, 0x03\n\t"
- "insv %0, %1\n\t"
- : "+r"(rt)
- : "r"(rs), "r"(dsp)
- );
- if (rt != result) {
- printf("insv wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#ifndef _ASM_IO_H
-#define _ASM_IO_H
-extern int printf(const char *fmt, ...);
-extern unsigned long get_ticks(void);
-
-#define _read(source) \
-({ unsigned long __res; \
- __asm__ __volatile__( \
- "mfc0\t%0, " #source "\n\t" \
- : "=r" (__res)); \
- __res; \
-})
-
-#define __read(source) \
-({ unsigned long __res; \
- __asm__ __volatile__( \
- "move\t%0, " #source "\n\t" \
- : "=r" (__res)); \
- __res; \
-})
-
-#endif
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long value, rd;
- long long *p;
- unsigned long long addr, index;
- long long result;
-
- value = 0xBCDEF389;
- p = &value;
- addr = (unsigned long long)p;
- index = 0;
- result = value & 0xFF;
- __asm
- ("lbux %0, %1(%2)\n\t"
- : "=r"(rd)
- : "r"(index), "r"(addr)
- );
- if (rd != result) {
- printf("lbux wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long value, rd;
- long long *p;
- unsigned long long addr, index;
- long long result;
-
- value = 0xBCDEF389;
- p = &value;
- addr = (unsigned long long)p;
- index = 0;
- result = 0xBCDEF389;
- __asm
- ("ldx %0, %1(%2)\n\t"
- : "=r"(rd)
- : "r"(index), "r"(addr)
- );
- if (rd != result) {
- printf("lwx wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long value, rd;
- long long *p;
- unsigned long long addr, index;
- long long result;
-
- value = 0xBCDEF389;
- p = &value;
- addr = (unsigned long long)p;
- index = 0;
- result = 0xFFFFFFFFFFFFF389;
- __asm
- ("lhx %0, %1(%2)\n\t"
- : "=r"(rd)
- : "r"(index), "r"(addr)
- );
- if (rd != result) {
- printf("lhx wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long value, rd;
- long long *p;
- unsigned long long addr, index;
- long long result;
-
- value = 0xBCDEF389;
- p = &value;
- addr = (unsigned long long)p;
- index = 0;
- result = 0xFFFFFFFFBCDEF389;
- __asm
- ("lwx %0, %1(%2)\n\t"
- : "=r"(rd)
- : "r"(index), "r"(addr)
- );
- if (rd != result) {
- printf("lwx wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long achi, acli;
- long long acho, aclo;
- long long resulth, resultl;
-
- achi = 0x05;
- acli = 0xB4CB;
- rs = 0x01;
- rt = 0x01;
- resulth = 0x05;
- resultl = 0xB4CC;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "madd $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((resulth != acho) || (resultl != aclo)) {
- printf("madd wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long achi, acli;
- long long acho, aclo;
- long long resulth, resultl;
-
- achi = 0x05;
- acli = 0xB4CB;
- rs = 0x01;
- rt = 0x01;
- resulth = 0x05;
- resultl = 0xB4CC;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "madd $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((resulth != acho) || (resultl != aclo)) {
- printf("maddu wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long acho, aclo;
- long long resulth, resultl;
-
- achi = 0x05;
- acli = 0xB4CB;
- rs = 0x98765432FF060000;
- rt = 0xfdeca987CB000000;
- resulth = 0x05;
- resultl = 0x18278587;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "maq_s.l.pwl $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((resulth != acho) || (resultl != aclo)) {
- printf("maq_s_l.w.pwl wrong 1\n");
-
- return -1;
- }
-
- achi = 0x05;
- acli = 0xB4CB;
- rs = 0x80000000FF060000;
- rt = 0x80000000CB000000;
- resulth = 0x05;
- resultl = 0xb4ca;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_s.l.pwl $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
- printf("maq_s_l.w.pwl wrong 2\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long acho, aclo;
- long long resulth, resultl;
-
- achi = 0x05;
- acli = 0xB4CB;
- rs = 0x87898765432;
- rt = 0x7878fdeca987;
- resulth = 0x05;
- resultl = 0x18278587;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "maq_s.l.pwr $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((resulth != acho) || (resultl != aclo)) {
- printf("maq_s.w.pwr wrong\n");
-
- return -1;
- }
-
- achi = 0x05;
- acli = 0xB4CB;
- rs = 0x89899980000000;
- rt = 0x88780000000;
- resulth = 0x05;
- resultl = 0xb4ca;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_s.l.pwr $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
- printf("maq_s.w.pwr wrong\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long achi, acli;
- long long dsp;
- long long acho, aclo;
- long long resulth, resultl;
- long long resdsp;
-
- achi = 0x05;
- acli = 0xB4CB;
- rs = 0xFF060000;
- rt = 0xCB000000;
- resulth = 0x04;
- resultl = 0xffffffff947438CB;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "maq_s.w.phl $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((resulth != acho) || (resultl != aclo)) {
- printf("1 maq_s.w.phl error\n");
-
- return -1;
- }
-
- achi = 0x06;
- acli = 0xB4CB;
- rs = 0x80000000;
- rt = 0x80000000;
- resulth = 0x6;
- resultl = 0xffffffff8000b4ca;
- resdsp = 1;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_s.w.phl $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((resulth != acho) || (resultl != aclo) ||
- (((dsp >> 17) & 0x01) != resdsp)) {
- printf("2 maq_s.w.phl error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long achi, acli;
- long long dsp;
- long long acho, aclo;
- long long resulth, resultl;
- long long resdsp;
-
- achi = 0x05;
- acli = 0xB4CB;
- rs = 0xFF06;
- rt = 0xCB00;
- resulth = 0x04;
- resultl = 0xffffffff947438CB;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "maq_s.w.phr $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((resulth != acho) || (resultl != aclo)) {
- printf("1 maq_s.w.phr error\n");
-
- return -1;
- }
-
- achi = 0x06;
- acli = 0xB4CB;
- rs = 0x8000;
- rt = 0x8000;
- resulth = 0x6;
- resultl = 0xffffffff8000b4ca;
- resdsp = 1;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_s.w.phr $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((resulth != acho) || (resultl != aclo) ||
- (((dsp >> 17) & 0x01) != resdsp)) {
- printf("2 maq_s.w.phr error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long acho, aclo;
- long long resulth, resultl;
-
- achi = 0x05;
- acli = 0x05;
-
- rs = 0x1234888899990000;
- rt = 0x9876888899990000;
-
- resulth = 0x05;
- resultl = 0x15ae87f5;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "maq_s.w.qhll $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((resulth != acho) || (resultl != aclo)) {
- printf("maq_s.w.qhll wrong\n");
-
- return -1;
- }
-
-
- achi = 0x04;
- acli = 0x06;
- rs = 0x8000888899990000;
- rt = 0x8000888899990000;
-
- resulth = 0x04;
- resultl = 0xffffffff80000005;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_s.w.qhll $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
- printf("maq_s.w.qhll wrong\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long acho, aclo;
- long long resulth, resultl;
-
- achi = 0x05;
- acli = 0x05;
-
- rs = 0x1234123412340000;
- rt = 0x9876987698760000;
-
- resulth = 0x05;
- resultl = 0x15ae87f5;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "maq_s.w.qhlr $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((resulth != acho) || (resultl != aclo)) {
- printf("1 maq_s.w.qhlr wrong\n");
-
- return -1;
- }
-
-
- achi = 0x04;
- acli = 0x06;
- rs = 0x8000800080000000;
- rt = 0x8000800080000000;
-
- resulth = 0x04;
- resultl = 0xffffffff80000005;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_s.w.qhlr $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
- printf("2 maq_s.w.qhlr wrong\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long acho, aclo;
- long long resulth, resultl;
-
- achi = 0x05;
- acli = 0x05;
-
- rs = 0x1234888812340000;
- rt = 0x9876888898760000;
-
- resulth = 0x05;
- resultl = 0x15ae87f5;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "maq_s.w.qhrl $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((resulth != acho) || (resultl != aclo)) {
- printf("1 maq_s.w.qhrl wrong\n");
-
- return -1;
- }
-
-
- achi = 0x04;
- acli = 0x06;
- rs = 0x8888999980000000;
- rt = 0x8888999980000000;
-
- resulth = 0x04;
- resultl = 0xffffffff80000005;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_s.w.qhrl $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
- printf("2 maq_s.w.qhrl wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long acho, aclo;
- long long resulth, resultl;
-
- achi = 0x05;
- acli = 0x05;
-
- rs = 0x1234888812341234;
- rt = 0x9876888898769876;
-
- resulth = 0x05;
- resultl = 0x15ae87f5;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "maq_s.w.qhrr $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((resulth != acho) || (resultl != aclo)) {
- printf("1 maq_s.w.qhrr wrong\n");
-
- return -1;
- }
-
-
- achi = 0x04;
- acli = 0x06;
- rs = 0x8000888899998000;
- rt = 0x8000888899998000;
-
- resulth = 0x04;
- resultl = 0xffffffff80000005;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_s.w.qhrr $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
- printf("2 maq_s.w.qhrr wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long achi, acli;
- long long dsp;
- long long acho, aclo;
- long long resulth, resultl;
- long long resdsp;
-
- achi = 0x05;
- acli = 0xB4CB;
- rs = 0xFF060000;
- rt = 0xCB000000;
- resulth = 0xffffffffffffffff;
- resultl = 0xffffffff947438cb;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "maq_sa.w.phl $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((resulth != acho) || (resultl != aclo)) {
- printf("1 maq_sa.w.phl error\n");
-
- return -1;
- }
-
- achi = 0x06;
- acli = 0xB4CB;
- rs = 0x80000000;
- rt = 0x80000000;
- resulth = 0x00;
- resultl = 0x7fffffff;
- resdsp = 0x01;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_sa.w.phl $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((resulth != acho) || (resultl != aclo) ||
- (((dsp >> 17) & 0x01) != 0x01)) {
- printf("2 maq_sa.w.phl error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long achi, acli;
- long long dsp;
- long long acho, aclo;
- long long resulth, resultl;
- long long resdsp;
-
- achi = 0x05;
- acli = 0xB4CB;
- rs = 0xFF06;
- rt = 0xCB00;
- resulth = 0xffffffffffffffff;
- resultl = 0xffffffff947438cb;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "maq_sa.w.phr $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((resulth != acho) || (resultl != aclo)) {
- printf("1 maq_sa.w.phr error\n");
-
- return -1;
- }
-
- achi = 0x06;
- acli = 0xB4CB;
- rs = 0x8000;
- rt = 0x8000;
- resulth = 0x00;
- resultl = 0x7fffffff;
- resdsp = 0x01;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_sa.w.phr $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((resulth != acho) || (resultl != aclo) ||
- (((dsp >> 17) & 0x01) != 0x01)) {
- printf("2 maq_sa.w.phr error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long acho, aclo;
- long long resulth, resultl;
-
- achi = 0x05;
- acli = 0x05;
-
- rs = 0x1234888899990000;
- rt = 0x9876888899990000;
-
- resulth = 0x00;
- resultl = 0x15ae87f5;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "maq_sa.w.qhll $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((resulth != acho) || (resultl != aclo)) {
- printf("1 maq_sa.w.qhll wrong\n");
-
- return -1;
- }
-
-
- achi = 0x04;
- acli = 0x06;
- rs = 0x8000888899990000;
- rt = 0x8000888899990000;
-
- resulth = 0x00;
- resultl = 0x7fffffff;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_sa.w.qhll $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
- printf("2 maq_sa.w.qhll wrong\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long acho, aclo;
- long long resulth, resultl;
-
- achi = 0x05;
- acli = 0x05;
-
- rs = 0x1234123412340000;
- rt = 0x9876987699990000;
-
- resulth = 0x0;
- resultl = 0x15ae87f5;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_sa.w.qhlr $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x0) || (resulth != acho) || (resultl != aclo)) {
- printf("maq_sa.w.qhlr wrong\n");
-
- return -1;
- }
-
-
- achi = 0x04;
- acli = 0x06;
- rs = 0x8000800099990000;
- rt = 0x8000800099990000;
-
- resulth = 0x00;
- resultl = 0x7fffffff;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_sa.w.qhlr $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
- printf("maq_sa.w.qhlr wrong\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long acho, aclo;
- long long resulth, resultl;
-
- achi = 0x05;
- acli = 0x05;
-
- rs = 0x1234123412340000;
- rt = 0x9876987698760000;
-
- resulth = 0x0;
- resultl = 0x15ae87f5;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_sa.w.qhrl $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x0) || (resulth != acho) || (resultl != aclo)) {
- printf("1 maq_sa.w.qhrl wrong\n");
-
- return -1;
- }
-
-
- achi = 0x04;
- acli = 0x06;
- rs = 0x8000800080000000;
- rt = 0x8000800080000000;
-
- resulth = 0x00;
- resultl = 0x7fffffff;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_sa.w.qhrl $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
- printf("2 maq_sa.w.qhrl wrong\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs, dsp;
- long long achi, acli;
- long long acho, aclo;
- long long resulth, resultl;
-
- achi = 0x05;
- acli = 0x05;
-
- rs = 0x1234123412341234;
- rt = 0x9876987698769876;
-
- resulth = 0x0;
- resultl = 0x15ae87f5;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_sa.w.qhrr $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x0) || (resulth != acho) || (resultl != aclo)) {
- printf("1 maq_sa.w.qhrr wrong\n");
-
- return -1;
- }
-
-
- achi = 0x04;
- acli = 0x06;
- rs = 0x8000800080008000;
- rt = 0x8000800080008000;
-
- resulth = 0x00;
- resultl = 0x7fffffff;
-
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "maq_sa.w.qhrr $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
- printf("2 maq_sa.w.qhrr wrong\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long achi, acho;
- long long result;
-
- achi = 0x004433;
- result = 0x004433;
-
- __asm
- ("mthi %1, $ac1\n\t"
- "mfhi %0, $ac1\n\t"
- : "=r"(acho)
- : "r"(achi)
- );
- if (result != acho) {
- printf("mfhi wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long acli, aclo;
- long long result;
-
- acli = 0x004433;
- result = 0x004433;
-
- __asm
- ("mtlo %1, $ac1\n\t"
- "mflo %0, $ac1\n\t"
- : "=r"(aclo)
- : "r"(acli)
- );
- if (result != aclo) {
- printf("mflo wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-OUTPUT_ARCH(mips)
-SECTIONS
-{
- . = 0xffffffff80100000;
- . = ALIGN((1 << 13));
- .text :
- {
- *(.text)
- *(.rodata)
- *(.rodata.*)
- }
-
- __init_begin = .;
- . = ALIGN((1 << 12));
- .init.text : AT(ADDR(.init.text) - 0)
- {
- *(.init.text)
- }
- .init.data : AT(ADDR(.init.data) - 0)
- {
- *(.init.data)
- }
- . = ALIGN((1 << 12));
- __init_end = .;
-
- . = ALIGN((1 << 13));
- .data :
- {
- *(.data)
- }
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0xFFFFFFFF;
- rt = 0x000000FF;
- result = 0xFFFFFF00;
- __asm
- ("modsub %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (result != rd) {
- printf("modsub wrong\n");
-
- return -1;
- }
-
- rs = 0x00000000;
- rt = 0x00CD1FFF;
- result = 0x0000CD1F;
- __asm
- ("modsub %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (result != rd) {
- printf("modsub wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long achi, acli, rs, rt;
- long long acho, aclo;
- long long resulth, resultl;
-
- rs = 0x00BBAACC;
- rt = 0x0B1C3D2F;
- achi = 0x00004433;
- acli = 0xFFCC0011;
- resulth = 0xFFFFFFFFFFF81F29;
- resultl = 0xFFFFFFFFB355089D;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "msub $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((acho != resulth) || (aclo != resultl)) {
- printf("msub wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long achi, acli, rs, rt;
- long long acho, aclo;
- long long resulth, resultl;
-
- rs = 0x00BBAACC;
- rt = 0x0B1C3D2F;
- achi = 0x00004433;
- acli = 0xFFCC0011;
- resulth = 0xFFFFFFFFFFF81F29;
- resultl = 0xFFFFFFFFB355089D;
-
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "msubu $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((acho != resulth) || (aclo != resultl)) {
- printf("msubu wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long achi, acho;
- long long result;
-
- achi = 0x004433;
- result = 0x004433;
-
- __asm
- ("mthi %1, $ac1\n\t"
- "mfhi %0, $ac1\n\t"
- : "=r"(acho)
- : "r"(achi)
- );
- if (result != acho) {
- printf("mthi wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, ach, acl, dsp;
- long long result, resulth, resultl;
-
- dsp = 0x07;
- ach = 0x05;
- acl = 0xB4CB;
- rs = 0x00FFBBAA;
- resulth = 0xB4CB;
- resultl = 0x00FFBBAA;
- result = 0x27;
-
- __asm
- ("wrdsp %0, 0x01\n\t"
- "mthi %1, $ac1\n\t"
- "mtlo %2, $ac1\n\t"
- "mthlip %3, $ac1\n\t"
- "mfhi %1, $ac1\n\t"
- "mflo %2, $ac1\n\t"
- "rddsp %0\n\t"
- : "+r"(dsp), "+r"(ach), "+r"(acl)
- : "r"(rs)
- );
- dsp = dsp & 0x3F;
- if ((dsp != result) || (ach != resulth) || (acl != resultl)) {
- printf("mthlip wrong\n");
-
- return -1;
- }
-
- dsp = 0x3f;
- ach = 0x05;
- acl = 0xB4CB;
- rs = 0x00FFBBAA;
- resulth = 0xB4CB;
- resultl = 0x00FFBBAA;
- result = 0x3f;
-
- __asm
- ("wrdsp %0, 0x01\n\t"
- "mthi %1, $ac1\n\t"
- "mtlo %2, $ac1\n\t"
- "mthlip %3, $ac1\n\t"
- "mfhi %1, $ac1\n\t"
- "mflo %2, $ac1\n\t"
- "rddsp %0\n\t"
- : "+r"(dsp), "+r"(ach), "+r"(acl)
- : "r"(rs)
- );
- dsp = dsp & 0x3F;
- if ((dsp != result) || (ach != resulth) || (acl != resultl)) {
- printf("mthlip wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long acli, aclo;
- long long result;
-
- acli = 0x004433;
- result = 0x004433;
-
- __asm
- ("mthi %1, $ac1\n\t"
- "mfhi %0, $ac1\n\t"
- : "=r"(aclo)
- : "r"(acli)
- );
- if (result != aclo) {
- printf("mtlo wrong\n");
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result;
-
- rd = 0;
- rs = 0x45BCFFFF12345678;
- rt = 0x98529AD287654321;
- result = 0x52fbec7035a2ca5c;
-
- __asm
- ("muleq_s.pw.qhl %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (result != rd) {
- printf("1 muleq_s.pw.qhl error\n");
-
- return -1;
- }
-
- rd = 0;
- rs = 0x45BC800012345678;
- rt = 0x9852800087654321;
- result = 0x52fbec707FFFFFFF;
-
- __asm
- ("muleq_s.pw.qhl %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (result != rd) {
- printf("2 muleq_s.pw.qhl error\n");
-
- return -1;
- }
-
- rd = 0;
- __asm
- ("rddsp %0\n\t"
- : "=r"(rd)
- );
- rd = rd >> 21;
- rd = rd & 0x1;
-
- if (rd != 1) {
- printf("3 muleq_s.pw.qhl error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rd = 0;
- rs = 0x1234567845BCFFFF;
- rt = 0x8765432198529AD2;
- result = 0x52fbec7035a2ca5c;
-
- __asm
- ("muleq_s.pw.qhr %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (result != rd) {
- printf("1 muleq_s.pw.qhr error\n");
-
- return -1;
- }
-
- rd = 0;
- rs = 0x1234567845BC8000;
- rt = 0x8765432198528000;
- result = 0x52fbec707FFFFFFF;
-
- __asm
- ("muleq_s.pw.qhr %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (result != rd) {
- printf("2 muleq_s.pw.qhr error\n");
-
- return -1;
- }
-
- rd = 0;
- __asm
- ("rddsp %0\n\t"
- : "=r"(rd)
- );
- rd = rd >> 21;
- rd = rd & 0x1;
-
- if (rd != 1) {
- printf("3 muleq_s.pw.qhr error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x80009988;
- rt = 0x80009988;
- result = 0x7FFFFFFF;
- resultdsp = 1;
-
- __asm
- ("muleq_s.w.phl %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if ((rd != result) || (dsp != resultdsp)) {
- printf("muleq_s.w.phl wrong\n");
-
- return -1;
- }
-
- rs = 0x12343322;
- rt = 0x43213322;
- result = 0x98be968;
- resultdsp = 1;
-
- __asm
- ("muleq_s.w.phl %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if ((rd != result) || (dsp != resultdsp)) {
- printf("muleq_s.w.phl wrong\n");
-
- return -1;
- }
-
- return 0;
-}
-
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x8000;
- rt = 0x8000;
- result = 0x7FFFFFFF;
- resultdsp = 1;
-
- __asm
- ("muleq_s.w.phr %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if ((rd != result) || (dsp != resultdsp)) {
- printf("muleq_s.w.phr wrong\n");
-
- return -1;
- }
-
- rs = 0x1234;
- rt = 0x4321;
- result = 0x98be968;
- resultdsp = 1;
-
- __asm
- ("muleq_s.w.phr %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if ((rd != result) || (dsp != resultdsp)) {
- printf("muleq_s.w.phr wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x80001234;
- rt = 0x80004321;
- result = 0xFFFFFFFFFFFF0000;
- resultdsp = 1;
-
- __asm
- ("muleu_s.ph.qbl %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if ((rd != result) || (dsp != resultdsp)) {
- printf("muleu_s.ph.qbl wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x8000;
- rt = 0x80004321;
- result = 0xFFFFFFFFFFFF0000;
- resultdsp = 1;
-
- __asm
- ("muleu_s.ph.qbr %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if ((rd != result) || (dsp != resultdsp)) {
- printf("muleu_s.ph.qbr wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long resdsp, result;
-
- rd = 0;
- rs = 0x1234567802020202;
- rt = 0x0034432112344321;
- result = 0x03A8FFFFFFFFFFFF;
- resdsp = 0x01;
-
- __asm
- ("muleu_s.qh.obl %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 21) & 0x01;
- if ((rd != result) || (resdsp != dsp)) {
- printf("muleu_s.qh.obl error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long resdsp, result;
-
- rd = 0;
- rs = 0x0202020212345678;
-
- rt = 0x0034432112344321;
- result = 0x03A8FFFFFFFFFFFF;
- resdsp = 0x01;
-
- __asm
- ("muleu_s.qh.obr %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
-
- dsp = (dsp >> 21) & 0x01;
- if ((rd != result) || (resdsp != dsp)) {
- printf("muleu_s.qh.obr error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x80001234;
- rt = 0x80004321;
- result = 0x7FFF098C;
- resultdsp = 1;
-
- __asm
- ("mulq_rs.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if ((rd != result) || (dsp != resultdsp)) {
- printf("mulq_rs.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dsp, dspresult;
- rt = 0x80003698CE8F9201;
- rs = 0x800034634BCDE321;
- result = 0x7fff16587a530313;
-
- dspresult = 0x01;
-
- __asm
- ("mulq_rs.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
-
- if (rd != result) {
- printf("mulq_rs.qh error\n");
-
- return -1;
- }
-
- dsp = (dsp >> 21) & 0x01;
- if (dsp != dspresult) {
- printf("mulq_rs.qh DSPControl Reg ouflag error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dsp;
- long long achi, acli;
- long long acho, aclo;
- long long resl, resh;
-
- achi = 0x4;
- acli = 0x4;
-
- rs = 0x1234567887654321;
- rt = 0x8765432112345678;
-
- resh = 0x4;
- resl = 0x4;
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "mulsaq_s.l.pw $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl)) {
- printf("1 mulsaq_s.l.pw wrong\n");
-
- return -1;
- }
-
- achi = 0x4;
- acli = 0x4;
-
- rs = 0x8000000087654321;
- rt = 0x8000000012345678;
-
- resh = 0x4;
- resl = 0x1e8ee513;
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "mulsaq_s.l.pw $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x1) || (acho != resh) || (aclo != resl)) {
- printf("2 mulsaq_s.l.pw wrong\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, dsp;
- long long achi, acli;
- long long acho, aclo;
- long long resl, resh;
-
- achi = 0x4;
- acli = 0x4;
-
- rs = 0x5678123443218765;
- rt = 0x4321876556781234;
-
- resh = 0x4;
- resl = 0x342fcbd4;
- __asm
- ("mthi %2, $ac1\n\t"
- "mtlo %3, $ac1\n\t"
- "mulsaq_s.w.qh $ac1, %4, %5\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl)) {
- printf("1 mulsaq_s.w.qh wrong\n");
- return -1;
- }
-
- achi = 0x4;
- acli = 0x4;
-
- rs = 0x8000800087654321;
- rt = 0x8000800012345678;
-
- resh = 0x3;
- resl = 0xffffffffe5e81a1c;
- __asm
- ("mthi %3, $ac1\n\t"
- "mtlo %4, $ac1\n\t"
- "mulsaq_s.w.qh $ac1, %5, %6\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "=r"(acho), "=r"(aclo), "=r"(dsp)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x1;
- if ((dsp != 0x1) || (acho != resh) || (aclo != resl)) {
- printf("2 mulsaq_s.w.qh wrong\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, ach, acl;
- long long result, resulth, resultl;
-
- rs = 0x00FFBBAA;
- rt = 0x4B231000;
- resulth = 0x4b0f01;
- resultl = 0x71f8a000;
- __asm
- ("mult $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(ach), "=r"(acl)
- : "r"(rs), "r"(rt)
- );
- if ((ach != resulth) || (acl != resultl)) {
- printf("mult wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt, ach, acl;
- long long result, resulth, resultl;
-
- rs = 0x00FFBBAA;
- rt = 0x4B231000;
- resulth = 0x4b0f01;
- resultl = 0x71f8a000;
- __asm
- ("multu $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "=r"(ach), "=r"(acl)
- : "r"(rs), "r"(rt)
- );
- if ((ach != resulth) || (acl != resultl)) {
- printf("multu wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0x56788765;
-
- __asm
- ("packrl.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (result != rd) {
- printf("packrl.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long res;
-
- rs = 0x1234567887654321;
- rt = 0xabcdef9812345678;
-
- res = 0x87654321abcdef98;
-
- __asm
- ("packrl.pw %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != res) {
- printf("packrl.pw error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long res;
-
- dsp = 0xff000000;
-
- rs = 0x1234567812345678;
- rt = 0x8765432187654321;
-
- res = 0x1234567812345678;
-
- __asm
- ("wrdsp %1, 0x10\n\t"
- "pick.ob %0, %2, %3\n\t"
- : "=r"(rd)
- : "r"(dsp), "r"(rs), "r"(rt)
- );
-
- if (rd != res) {
- printf("1 pick.ob error\n");
- return -1;
- }
-
- dsp = 0x00000000;
-
- rs = 0x1234567812345678;
- rt = 0x8765432187654321;
-
- res = 0x8765432187654321;
-
- __asm
- ("wrdsp %1, 0x10\n\t"
- "pick.ob %0, %2, %3\n\t"
- : "=r"(rd)
- : "r"(dsp), "r"(rs), "r"(rt)
- );
-
- if (rd != res) {
- printf("2 pick.ob error\n");
- return -1;
- }
-
- dsp = 0x34000000;
-
- rs = 0x1234567812345678;
- rt = 0x8765432187654321;
-
- res = 0x8765567887344321;
-
- __asm
- ("wrdsp %1, 0x10\n\t"
- "pick.ob %0, %2, %3\n\t"
- : "=r"(rd)
- : "r"(dsp), "r"(rs), "r"(rt)
- );
-
- if (rd != res) {
- printf("3 pick.ob error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- dsp = 0x0A000000;
- result = 0x12344321;
-
- __asm
- ("wrdsp %3, 0x10\n\t"
- "pick.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt), "r"(dsp)
- );
- if (rd != result) {
- printf("1 pick.ph wrong\n");
-
- return -1;
- }
-
- rs = 0x12345678;
- rt = 0x87654321;
- dsp = 0x03000000;
- result = 0x12345678;
-
- __asm
- ("wrdsp %3, 0x10\n\t"
- "pick.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt), "r"(dsp)
- );
- if (rd != result) {
- printf("2 pick.ph wrong\n");
-
- return -1;
- }
-
- rs = 0x12345678;
- rt = 0x87654321;
- dsp = 0x00000000;
- result = 0xffffffff87654321;
-
- __asm
- ("wrdsp %3, 0x10\n\t"
- "pick.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt), "r"(dsp)
- );
- if (rd != result) {
- printf("3 pick.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long res;
- dsp = 0xff000000;
-
- rs = 0x1234567812345678;
- rt = 0x8765432187654321;
-
- res = 0x1234567812345678;
-
- __asm
- ("wrdsp %1, 0x10\n\t"
- "wrdsp %1\n\t"
- "pick.pw %0, %2, %3\n\t"
- : "=r"(rd), "+r"(dsp)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != res) {
- printf("pick.pw error\n");
- return -1;
- }
-
- dsp = 0x00000000;
-
- rs = 0x1234567812345678;
- rt = 0x8765432187654321;
-
- res = 0x8765432187654321;
-
- __asm
- ("wrdsp %1, 0x10\n\t"
- "wrdsp %1\n\t"
- "pick.pw %0, %2, %3\n\t"
- : "=r"(rd), "+r"(dsp)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != res) {
- printf("pick.pw error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- dsp = 0x0f000000;
- result = 0x12345678;
-
- __asm
- ("wrdsp %3, 0x10\n\t"
- "pick.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt), "r"(dsp)
- );
- if (rd != result) {
- printf("pick.qb wrong\n");
-
- return -1;
- }
-
- rs = 0x12345678;
- rt = 0x87654321;
- dsp = 0x00000000;
- result = 0xffffffff87654321;
-
- __asm
- ("wrdsp %3, 0x10\n\t"
- "pick.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt), "r"(dsp)
- );
- if (rd != result) {
- printf("pick.qb wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long res;
- dsp = 0xff000000;
-
- rs = 0x1234567812345678;
- rt = 0x8765432187654321;
-
- res = 0x1234567812345678;
-
- __asm
- ("wrdsp %1, 0x10\n\t"
- "wrdsp %1\n\t"
- "pick.qh %0, %2, %3\n\t"
- : "=r"(rd), "+r"(dsp)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != res) {
- printf("pick.qh error\n");
- return -1;
- }
-
- dsp = 0x00000000;
-
- rs = 0x1234567812345678;
- rt = 0x8765432187654321;
-
- res = 0x8765432187654321;
-
- __asm
- ("wrdsp %1, 0x10\n\t"
- "wrdsp %1\n\t"
- "pick.qh %0, %2, %3\n\t"
- : "=r"(rd), "+r"(dsp)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != res) {
- printf("pick.qh error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
- rt = 0xFFFFFFFF11111111;
- result = 0xFFFFFFFF00000000;
-
- __asm
- ("preceq.l.pwl %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("preceq.l.pwl wrong\n");
-
- return -1;
- }
-
- return 0;
-}
-
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
- rt = 0xFFFFFFFF11111111;
- result = 0x1111111100000000;
-
- __asm
- ("preceq.l.pwl %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("preceq.l.pwr wrong\n");
-
- return -1;
- }
-
- return 0;
-}
-
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result;
- rt = 0x0123456789ABCDEF;
- result = 0x0123000045670000;
-
- __asm
- ("preceq.pw.qhl %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("preceq.pw.qhl error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result;
-
- rt = 0x123456789ABCDEF0;
- result = 0x123400009ABC0000;
-
- __asm
- ("preceq.pw.qhla %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("preceq.pw.qhla error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result;
- rt = 0x0123456789ABCDEF;
- result = 0x89AB0000CDEF0000;
-
- __asm
- ("preceq.pw.qhr %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("preceq.pw.qhr error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result;
-
- rt = 0x123456789ABCDEF0;
- result = 0x56780000DEF00000;
-
- __asm
- ("preceq.pw.qhra %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("preceq.pw.qhra error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x87654321;
- result = 0xFFFFFFFF87650000;
-
- __asm
- ("preceq.w.phl %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("preceq.w.phl wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x87654321;
- result = 0x43210000;
-
- __asm
- ("preceq.w.phr %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("preceq.w.phr wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x87654321;
- result = 0x43803280;
-
- __asm
- ("precequ.ph.qbl %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("precequ.ph.qbl wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x87654321;
- result = 0x43802180;
-
- __asm
- ("precequ.ph.qbla %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("precequ.ph.qbla wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x87654321;
- result = 0x21801080;
-
- __asm
- ("precequ.ph.qbr %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("precequ.ph.qbr wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x87654321;
- result = 0x32801080;
-
- __asm
- ("precequ.ph.qbra %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("precequ.ph.qbra wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result;
- rt = 0x123456789ABCDEF0;
- result = 0x09001A002B003C00;
-
- __asm
- ("precequ.qh.obla %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("precequ.qh.obla error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result;
- rt = 0x123456789ABCDEF0;
- result = 0x09002B004D006F00;
-
- __asm
- ("precequ.qh.obla %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("precequ.qh.obla error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result;
-
- rt = 0x123456789ABCDEF0;
- result = 0x4D005E006F007000;
-
- __asm
- ("precequ.qh.obr %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("precequ.qh.obr error\n");
-
- return -1;
- }
-
- return 0;
-}
-
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result;
-
- rt = 0x123456789ABCDEF0;
- result = 0x1A003C005D007000;
-
- __asm
- ("precequ.qh.obra %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("precequ.qh.obra error\n");
-
- return -1;
- }
-
- return 0;
-}
-
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x87654321;
- result = 0x00870065;
-
- __asm
- ("preceu.ph.qbl %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("preceu.ph.qbl wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x87654321;
- result = 0x00870043;
-
- __asm
- ("preceu.ph.qbla %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("preceu.ph.qbla wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x87654321;
- result = 0x00430021;
-
- __asm
- ("preceu.ph.qbr %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("preceu.ph.qbr wrong");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x87654321;
- result = 0x00650021;
-
- __asm
- ("preceu.ph.qbra %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (result != rd) {
- printf("preceu.ph.qbra wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result;
- rt = 0x123456789ABCDEF0;
- result = 0x0012003400560078;
-
- __asm
- ("preceu.qh.obl %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("preceu.qh.obl error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result;
- rt = 0x123456789ABCDEF0;
- result = 0x00120056009A00DE;
-
- __asm
- ("preceu.qh.obla %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("preceu.qh.obla error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result;
-
- rt = 0x123456789ABCDEF0;
- result = 0x009A00BC00DE00F0;
-
- __asm
- ("preceu.qh.obr %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("preceu.qh.obr error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result;
-
- rt = 0x123456789ABCDEF0;
- result = 0x0034007800BC00F0;
-
- __asm
- ("preceu.qh.obra %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("preceu.qh.obra error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long res;
-
- rs = 0x1234567812345678;
- rt = 0x8765432187654321;
-
- res = 0x3478347865216521;
-
- __asm
- ("precr.ob.qh %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != res) {
- printf("precr.ob.qh error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long res;
-
- rt = 0x8765432187654321;
- rs = 0x1234567812345678;
-
- res = 0x4321432156785678;
-
- __asm
- ("precr_sra.qh.pw %0, %1, 0x0\n\t"
- : "=r"(rt)
- : "r"(rs)
- );
-
- if (rt != res) {
- printf("precr_sra.qh.pw error\n");
- return -1;
- }
-
- rt = 0x8765432187654321;
- rs = 0x1234567812345678;
-
- res = 0x5432543245674567;
-
- __asm
- ("precr_sra.qh.pw %0, %1, 0x4\n\t"
- : "=r"(rt)
- : "r"(rs)
- );
-
- if (rt != res) {
- printf("precr_sra.qh.pw error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long res;
-
- rt = 0x8765432187654321;
- rs = 0x1234567812345678;
-
- res = 0x4321432156785678;
-
- __asm
- ("precr_sra_r.qh.pw %0, %1, 0x0\n\t"
- : "=r"(rt)
- : "r"(rs)
- );
-
- if (rt != res) {
- printf("precr_sra_r.qh.pw error\n");
- return -1;
- }
-
- rt = 0x8765432187654321;
- rs = 0x1234567812345678;
-
- res = 0x5432543245684568;
-
- __asm
- ("precr_sra_r.qh.pw %0, %1, 0x4\n\t"
- : "=r"(rt)
- : "r"(rs)
- );
-
- if (rt != res) {
- printf("precr_sra_r.qh.pw error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long res;
-
- rs = 0x1234567812345678;
- rt = 0x8765432187654321;
-
- res = 0x1256125687438743;
-
- __asm
- ("precrq.ob.qh %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != res) {
- printf("precrq.ob.qh error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0x12348765;
-
- __asm
- ("precrq.ph.w %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (result != rd) {
- printf("precrq.ph.w wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long res;
-
- rs = 0x1234567812345678;
- rt = 0x8765432187654321;
-
- res = 0x1234567887654321;
-
- __asm
- ("precrq.pw.l %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != res) {
- printf("precrq.pw.l error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0x12568743;
-
- __asm
- ("precrq.qb.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (result != rd) {
- printf("precrq.qb.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long res;
-
- rs = 0x1234567812345678;
- rt = 0x8765432187654321;
-
- res = 0x1234123487658765;
-
- __asm
- ("precrq.qh.pw %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != res) {
- printf("precrq.qh.pw error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0x12348765;
-
- __asm
- ("precrq_rs.ph.w %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (result != rd) {
- printf("1 precrq_rs.ph.w wrong\n");
-
- return -1;
- }
-
- rs = 0x7fffC678;
- rt = 0x865432A0;
- result = 0x7fff8654;
-
- __asm
- ("precrq_rs.ph.w %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- if ((result != rd) || (((dsp >> 22) & 0x01) != 1)) {
- printf("2 precrq_rs.ph.w wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long res;
-
- rs = 0x1234567812345678;
- rt = 0x8765432187654321;
-
- res = 0x1234123487658765;
-
- __asm
- ("precrq_rs.qh.pw %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != res) {
- printf("precrq_rs.qh.pw error\n");
- return -1;
- }
-
- rs = 0x7fffC67812345678;
- rt = 0x8765432187654321;
-
- res = 0x7fff123487658765;
-
- __asm
- ("precrq_rs.qh.pw %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != res) {
- printf("precrq_rs.qh.pw error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long res, resdsp;
-
- rs = 0x7fff567812345678;
- rt = 0x8765432187654321;
-
- res = 0xffac24ac00860086;
- resdsp = 0x1;
-
- __asm
- ("precrqu_s.ob.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 22) & 0x1;
- if ((rd != res) || (dsp != resdsp)) {
- printf("precrq_s.ob.qh error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87657fff;
- result = 0x24AC00FF;
-
- __asm
- ("precrqu_s.qb.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- if ((result != rd) || (((dsp >> 22) & 0x01) != 0x01)) {
- printf("precrqu_s.qb.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long res;
- rt = 0x1234567887654321;
- rs = 0xabcd1234abcd8765;
-
- res = 0x1234567887654321;
- __asm
- ("prependd %0, %1, 0x0\n\t"
- : "=r"(rt)
- : "r"(rs)
- );
-
- if (rt != res) {
- printf("prependd error\n");
- return -1;
- }
-
- rt = 0x1234567887654321;
- rs = 0xabcd1234abcd8765;
-
- res = 0xd876512345678876;
- __asm
- ("prependd %0, %1, 0x4\n\t"
- : "=r"(rt)
- : "r"(rs)
- );
-
- if (rt != res) {
- printf("prependd error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long res;
- rt = 0x1234567887654321;
- rs = 0xabcd1234abcd8765;
-
- res = 0x1234567887654321;
- __asm
- ("prependw %0, %1, 0x0\n\t"
- : "=r"(rt)
- : "r"(rs)
- );
-
- if (rt != res) {
- printf("prependw error\n");
- return -1;
- }
-
- rt = 0x1234567887654321;
- rs = 0xabcd1234abcd8765;
-
- res = 0x5123456788765432;
- __asm
- ("prependw %0, %1, 0x4\n\t"
- : "=r"(rt)
- : "r"(rs)
- );
-
- if (rt != res) {
- printf("prependw error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-
-typedef unsigned long va_list;
-
-#define ACC 4
-#define __read(source) \
-({ va_list __res; \
- __asm__ __volatile__( \
- "move\t%0, " #source "\n\t" \
- : "=r" (__res)); \
- __res; \
-})
-
-enum format_type {
- FORMAT_TYPE_NONE,
- FORMAT_TYPE_HEX,
- FORMAT_TYPE_ULONG,
- FORMAT_TYPE_FLOAT
-};
-
-struct printf_spec {
- char type;
-};
-
-static int format_decode(char *fmt, struct printf_spec *spec)
-{
- char *start = fmt;
-
- for (; *fmt ; ++fmt) {
- if (*fmt == '%') {
- break;
- }
- }
-
- switch (*++fmt) {
- case 'x':
- spec->type = FORMAT_TYPE_HEX;
- break;
-
- case 'd':
- spec->type = FORMAT_TYPE_ULONG;
- break;
-
- case 'f':
- spec->type = FORMAT_TYPE_FLOAT;
- break;
-
- default:
- spec->type = FORMAT_TYPE_NONE;
- }
-
- return ++fmt - start;
-}
-
-void *memcpy(void *dest, void *src, int n)
-{
- int i;
- char *s = src;
- char *d = dest;
-
- for (i = 0; i < n; i++) {
- d[i] = s[i];
- }
- return dest;
-}
-
-char *number(char *buf, va_list num)
-{
- int i;
- char *str = buf;
- static char digits[16] = "0123456789abcdef";
- str = str + sizeof(num) * 2;
-
- for (i = 0; i < sizeof(num) * 2; i++) {
- *--str = digits[num & 15];
- num >>= 4;
- }
-
- return buf + sizeof(num) * 2;
-}
-
-char *__number(char *buf, va_list num)
-{
- int i;
- va_list mm = num;
- char *str = buf;
-
- if (!num) {
- *str++ = '0';
- return str;
- }
-
- for (i = 0; mm; mm = mm/10, i++) {
- /* Do nothing. */
- }
-
- str = str + i;
-
- while (num) {
- *--str = num % 10 + 48;
- num = num / 10;
- }
-
- return str + i;
-}
-
-va_list modf(va_list args, va_list *integer, va_list *num)
-{
- int i;
- double dot_v = 0;
- va_list E, DOT, DOT_V;
-
- if (!args) {
- return 0;
- }
-
- for (i = 0, args = args << 1 >> 1; i < 52; i++) {
- if ((args >> i) & 0x1) {
- break;
- }
- }
-
- *integer = 0;
-
- if ((args >> 56 != 0x3f) || (args >> 52 == 0x3ff)) {
- E = (args >> 52) - 1023;
- DOT = 52 - E - i;
- DOT_V = args << (12 + E) >> (12 + E) >> i;
- *integer = ((args << 12 >> 12) >> (i + DOT)) | (1 << E);
- } else {
- E = ~((args >> 52) - 1023) + 1;
- DOT_V = args << 12 >> 12;
-
- dot_v += 1.0 / (1 << E);
-
- for (i = 1; i <= 16; i++) {
- if ((DOT_V >> (52 - i)) & 0x1) {
- dot_v += 1.0 / (1 << E + i);
- }
- }
-
- for (i = 1, E = 0; i <= ACC; i++) {
- dot_v *= 10;
- if (!(va_list)dot_v) {
- E++;
- }
- }
-
- *num = E;
-
- return dot_v;
- }
-
- if (args & 0xf) {
- for (i = 1; i <= 16; i++) {
- if ((DOT_V >> (DOT - i)) & 0x1) {
- dot_v += 1.0 / (1 << i);
- }
- }
-
- for (i = 1, E = 0; i <= ACC; i++) {
- dot_v *= 10;
- if (!(va_list)dot_v) {
- E++;
- }
- }
-
- *num = E;
-
- return dot_v;
- } else if (DOT) {
- for (i = 1; i <= DOT; i++) {
- if ((DOT_V >> (DOT - i)) & 0x1) {
- dot_v += 1.0 / (1 << i);
- }
- }
-
- for (i = 1; i <= ACC; i++) {
- dot_v = dot_v * 10;
- }
-
- return dot_v;
- }
-
- return 0;
-}
-
-int vsnprintf(char *buf, int size, char *fmt, va_list args)
-{
- char *str, *mm;
- struct printf_spec spec = {0};
-
- str = mm = buf;
-
- while (*fmt) {
- char *old_fmt = fmt;
- int read = format_decode(fmt, &spec);
-
- fmt += read;
-
- switch (spec.type) {
- case FORMAT_TYPE_NONE: {
- memcpy(str, old_fmt, read);
- str += read;
- break;
- }
- case FORMAT_TYPE_HEX: {
- memcpy(str, old_fmt, read);
- str = number(str + read, args);
- for (; *mm ; ++mm) {
- if (*mm == '%') {
- *mm = '0';
- break;
- }
- }
- break;
- }
- case FORMAT_TYPE_ULONG: {
- memcpy(str, old_fmt, read - 2);
- str = __number(str + read - 2, args);
- break;
- }
- case FORMAT_TYPE_FLOAT: {
- va_list integer, dot_v, num;
- dot_v = modf(args, &integer, &num);
- memcpy(str, old_fmt, read - 2);
- str += read - 2;
- if ((args >> 63 & 0x1)) {
- *str++ = '-';
- }
- str = __number(str, integer);
- if (dot_v) {
- *str++ = '.';
- while (num--) {
- *str++ = '0';
- }
- str = __number(str, dot_v);
- }
- break;
- }
- }
- }
- *str = '\0';
-
- return str - buf;
-}
-
-static void serial_out(char *str)
-{
- while (*str) {
- *(char *)0xffffffffb80003f8 = *str++;
- }
-}
-
-int vprintf(char *fmt, va_list args)
-{
- int printed_len = 0;
- static char printf_buf[512];
- printed_len = vsnprintf(printf_buf, sizeof(printf_buf), fmt, args);
- serial_out(printf_buf);
- return printed_len;
-}
-
-int printf(char *fmt, ...)
-{
- return vprintf(fmt, __read($5));
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, result;
- rs = 0x12345678ABCDEF0;
- result = 0x000000000001E258;
-
- __asm
- ("raddu.l.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs)
- );
-
- if (rd != result) {
- printf("raddu.l.ob error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs;
- long long result;
-
- rs = 0x12345678;
- result = 0x114;
-
- __asm
- ("raddu.w.qb %0, %1\n\t"
- : "=r"(rd)
- : "r"(rs)
- );
- if (rd != result) {
- printf("raddu.w.qb wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long dsp_i, dsp_o;
- long long ccond_i, outflag_i, efi_i, c_i, scount_i, pos_i;
- long long ccond_o, outflag_o, efi_o, c_o, scount_o, pos_o;
- long long ccond_r, outflag_r, efi_r, c_r, scount_r, pos_r;
-
- ccond_i = 0x000000BC;/* 4 */
- outflag_i = 0x0000001B;/* 3 */
- efi_i = 0x00000001;/* 5 */
- c_i = 0x00000001;/* 2 */
- scount_i = 0x0000000F;/* 1 */
- pos_i = 0x0000000C;/* 0 */
-
- dsp_i = (ccond_i << 24) | \
- (outflag_i << 16) | \
- (efi_i << 14) | \
- (c_i << 13) | \
- (scount_i << 7) | \
- pos_i;
-
- ccond_r = ccond_i;
- outflag_r = outflag_i;
- efi_r = efi_i;
- c_r = c_i;
- scount_r = scount_i;
- pos_r = pos_i;
-
- __asm
- ("wrdsp %1, 0x3F\n\t"
- "rddsp %0, 0x3F\n\t"
- : "=r"(dsp_o)
- : "r"(dsp_i)
- );
-
- ccond_o = (dsp_o >> 24) & 0xFF;
- outflag_o = (dsp_o >> 16) & 0xFF;
- efi_o = (dsp_o >> 14) & 0x01;
- c_o = (dsp_o >> 14) & 0x01;
- scount_o = (dsp_o >> 7) & 0x3F;
- pos_o = dsp_o & 0x1F;
-
- if ((ccond_o != ccond_r) || (outflag_o != outflag_r) || (efi_o != efi_r) \
- || (c_o != c_r) || (scount_o != scount_r) || (pos_o != pos_r)) {
- printf("rddsp wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, result;
- rd = 0;
- result = 0xFFFFFFFFFFFFFFFF;
-
- __asm
- ("repl.ob %0, 0xFF\n\t"
- : "=r"(rd)
- );
-
- if (result != rd) {
- printf("repl.ob error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, result;
-
- result = 0x01BF01BF;
- __asm
- ("repl.ph %0, 0x1BF\n\t"
- : "=r"(rd)
- );
- if (rd != result) {
- printf("repl.ph wrong\n");
-
- return -1;
- }
-
- result = 0x01FF01FF;
- __asm
- ("repl.ph %0, 0x01FF\n\t"
- : "=r"(rd)
- );
- if (rd != result) {
- printf("repl.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, result;
- rd = 0;
- result = 0x000001FF000001FF;
-
- __asm
- ("repl.pw %0, 0x1FF\n\t"
- : "=r"(rd)
- );
-
- if (result != rd) {
- printf("repl.pw error1\n");
-
- return -1;
- }
-
- rd = 0;
- result = 0xFFFFFE00FFFFFE00;
- __asm
- ("repl.pw %0, 0xFFFFFFFFFFFFFE00\n\t"
- : "=r"(rd)
- );
-
- if (result != rd) {
- printf("repl.pw error2\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, result;
-
- result = 0xFFFFFFFFBFBFBFBF;
- __asm
- ("repl.qb %0, 0xBF\n\t"
- : "=r"(rd)
- );
- if (rd != result) {
- printf("repl.qb wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, result;
- rd = 0;
- result = 0x01FF01FF01FF01FF;
-
- __asm
- ("repl.qh %0, 0x1FF\n\t"
- : "=r"(rd)
- );
-
- if (result != rd) {
- printf("repl.qh error 1\n");
-
- return -1;
- }
-
- rd = 0;
- result = 0xFE00FE00FE00FE00;
- __asm
- ("repl.qh %0, 0xFFFFFFFFFFFFFE00\n\t"
- : "=r"(rd)
- );
-
- if (result != rd) {
- printf("repl.qh error 2\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result;
-
- rt = 0xFF;
- result = 0xFFFFFFFFFFFFFFFF;
-
- __asm
- ("replv.ob %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("replv.ob error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x12345678;
- result = 0x56785678;
- __asm
- ("replv.ph %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("replv.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, result;
- rd = 0;
- rt = 0xFFFFFFFF;
- result = 0xFFFFFFFFFFFFFFFF;
-
- __asm
- ("replv.pw %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (result != rd) {
- printf("replv.pw error\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x12345678;
- result = 0x78787878;
- __asm
- ("replv.qb %0, %1\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("replv.qb wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long ach, acl;
- long long resulth, resultl;
-
- ach = 0xBBAACCFF;
- acl = 0x1C3B001D;
-
- resulth = 0x17755;
- resultl = 0xFFFFFFFF99fe3876;
-
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "shilo $ac1, 0x0F\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- );
- if ((ach != resulth) || (acl != resultl)) {
- printf("shilo wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, ach, acl;
- long long resulth, resultl;
-
- rs = 0x0F;
- ach = 0xBBAACCFF;
- acl = 0x1C3B001D;
-
- resulth = 0x17755;
- resultl = 0xFFFFFFFF99fe3876;
-
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "shilov $ac1, %2\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs)
- );
- if ((ach != resulth) || (acl != resultl)) {
- printf("shilov wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, dsp;
- long long res, resdsp;
-
- rt = 0x9ba8765433456789;
- res = 0x9ba8765433456789;
- resdsp = 0x0;
- __asm
- ("shll.ob %0, %2, 0x0\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
-
- dsp = (dsp >> 22) & 0x1;
-
- if ((dsp != resdsp) || (rd != res)) {
- printf("shll.ob error\n");
- return -1;
- }
-
- rt = 0x9ba8765433456789;
- res = 0xd840b0a098283848;
- resdsp = 0x1;
- __asm
- ("shll.ob %0, %2, 0x3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
-
- dsp = (dsp >> 22) & 0x1;
-
- if ((dsp != resdsp) || (rd != res)) {
- printf("shll.ob error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, dsp;
- long long result, resultdsp;
-
- rt = 0x12345678;
- result = 0x12345678;
- resultdsp = 0;
-
- __asm
- ("shll.ph %0, %2, 0x0\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shll.ph wrong\n");
-
- return -1;
- }
-
- rt = 0x12345678;
- result = 0xFFFFFFFFA000C000;
- resultdsp = 1;
-
- __asm
- ("shll.ph %0, %2, 0x0B\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shll.ph wrong1\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, dsp;
- long long result, resultdsp;
-
- rt = 0x8765432112345678;
- result = 0x8765432112345678;
- resultdsp = 0;
-
- __asm
- ("shll.pw %0, %2, 0x0\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
-
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shll.pw wrong\n");
- return -1;
- }
-
- rt = 0x8765432112345678;
- result = 0x6543210034567800;
- resultdsp = 1;
-
- __asm
- ("shll.pw %0, %2, 0x8\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
-
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shll.pw wrong\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, dsp;
- long long result, resultdsp;
-
- rt = 0x87654321;
- result = 0x38281808;
- resultdsp = 0x01;
-
- __asm
- ("shll.qb %0, %2, 0x03\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
- dsp = (dsp >> 22) & 0x01;
- if (rd != result) {
- printf("shll.qb wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, dsp;
- long long res, resdsp;
-
- rt = 0x9ba8765433456789;
- res = 0x9ba8765433456789;
- resdsp = 0x0;
- __asm
- ("shll.qh %0, %2, 0x0\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
- dsp = (dsp >> 22) & 0x1;
-
- if ((dsp != resdsp) || (rd != res)) {
- printf("shll.qh error\n");
- return -1;
- }
-
- rt = 0x9ba8765433456789;
- res = 0xdd40b2a09a283c48;
- resdsp = 0x1;
- __asm
- ("shll.qh %0, %2, 0x3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
-
- dsp = (dsp >> 22) & 0x1;
-
- if ((dsp != resdsp) || (rd != res)) {
- printf("shll.qh error1\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, dsp;
- long long result, resultdsp;
-
- rt = 0x12345678;
- result = 0x12345678;
- resultdsp = 0x0;
-
- __asm
- ("shll_s.ph %0, %2, 0x0\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shll_s.ph wrong\n");
-
- return -1;
- }
-
- rt = 0x12345678;
- result = 0x7FFF7FFF;
- resultdsp = 0x01;
-
- __asm
- ("shll_s.ph %0, %2, 0x0B\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shll_s.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, dsp;
- long long result, resultdsp;
-
- rt = 0x8765432112345678;
- result = 0x8765432112345678;
- resultdsp = 0;
-
- __asm
- ("shll_s.pw %0, %2, 0x0\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
-
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shll_s.pw wrong\n");
- return -1;
- }
-
- rt = 0x8765432112345678;
- result = 0x800000007fffffff;
- resultdsp = 1;
-
- __asm
- ("shll_s.pw %0, %2, 0x8\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
-
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shll_s.pw wrong\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, dsp;
- long long res, resdsp;
-
- rt = 0x9ba8765433456789;
- res = 0x9ba8765433456789;
- resdsp = 0x0;
- __asm
- ("shll_s.qh %0, %2, 0x0\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
-
- dsp = (dsp >> 22) & 0x1;
-
- if ((dsp != resdsp) || (rd != res)) {
- printf("shll_s.qh error\n");
- return -1;
- }
-
- rt = 0x9ba8765433456789;
- res = 0x80007fff7fff7fff;
- resdsp = 0x1;
- __asm
- ("shll_s.qh %0, %2, 0x3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
-
- dsp = (dsp >> 22) & 0x1;
-
- if ((dsp != resdsp) || (rd != res)) {
- printf("shll_s.qh error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, dsp;
- long long result, resultdsp;
-
- rt = 0x12345678;
- result = 0x7FFFFFFF;
- resultdsp = 0x01;
-
- __asm
- ("shll_s.w %0, %2, 0x0B\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt)
- );
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shll_s.w wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, rs, dsp;
- long long result, resultdsp;
-
- rt = 0x8765432112345678;
- rs = 0x0;
- result = 0x8765432112345678;
- resultdsp = 0;
-
- __asm
- ("shllv.ob %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
-
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shllv.ob wrong\n");
- return -1;
- }
-
- rt = 0x8765432112345678;
- rs = 0x4;
- result = 0x7050301020406080;
- resultdsp = 1;
-
- __asm
- ("shllv.ob %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
-
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shllv.ob wrong\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x0B;
- rt = 0x12345678;
- result = 0xFFFFFFFFA000C000;
- resultdsp = 1;
-
- __asm
- ("shllv.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shllv.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, rs, dsp;
- long long result, resultdsp;
- rt = 0x8765432112345678;
- rs = 0x0;
- result = 0x8765432112345678;
- resultdsp = 0;
-
- __asm
- ("shllv.pw %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
-
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shllv.pw wrong\n");
- return -1;
- }
-
-
- rt = 0x8765432112345678;
- rs = 0x8;
- result = 0x6543210034567800;
- resultdsp = 1;
-
- __asm
- ("shllv.pw %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
-
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shllv.pw wrong\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x03;
- rt = 0x87654321;
- result = 0x38281808;
- resultdsp = 0x01;
-
- __asm
- ("shllv.qb %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
- dsp = (dsp >> 22) & 0x01;
- if (rd != result) {
- printf("shllv.qb wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, rs, dsp;
- long long result, resultdsp;
-
- rt = 0x8765432112345678;
- rs = 0x0;
- result = 0x8765432112345678;
- resultdsp = 0;
-
- __asm
- ("shllv.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
-
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shllv.qh wrong\n");
- return -1;
- }
-
- rt = 0x8765432112345678;
- rs = 0x4;
- result = 0x7650321023406780;
- resultdsp = 1;
-
- __asm
- ("shllv.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
-
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shllv.qh wrong\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x0B;
- rt = 0x12345678;
- result = 0x7FFF7FFF;
- resultdsp = 0x01;
-
- __asm
- ("shllv_s.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shllv_s.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, rs, dsp;
- long long result, resultdsp;
-
- rt = 0x8765432112345678;
- rs = 0x0;
- result = 0x8765432112345678;
- resultdsp = 0;
-
- __asm
- ("shllv_s.pw %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
-
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shllv_s.pw wrong\n");
- return -1;
- }
-
- rt = 0x8765432112345678;
- rs = 0x8;
- result = 0x800000007fffffff;
- resultdsp = 1;
-
- __asm
- ("shllv_s.pw %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
-
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shllv_s.pw wrong\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, rs, dsp;
- long long result, resultdsp;
-
- rt = 0x8765432112345678;
- rs = 0x0;
- result = 0x8765432112345678;
- resultdsp = 0;
-
- __asm
- ("shllv_s.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
-
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shllv_s.qh wrong\n");
- return -1;
- }
-
- rt = 0x8765432112345678;
- rs = 0x4;
- result = 0x80007fff7fff7fff;
- resultdsp = 1;
-
- __asm
- ("shllv_s.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
-
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shllv_s.qh wrong\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x0B;
- rt = 0x12345678;
- result = 0x7FFFFFFF;
- resultdsp = 0x01;
-
- __asm
- ("shllv_s.w %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rt), "r"(rs)
- );
- dsp = (dsp >> 22) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("shllv_s.w wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main()
-{
- long long rd, rt;
- long long res;
-
- rt = 0xbc98756abc654389;
- res = 0xfbf9f7f6fb0604f8;
-
- __asm
- ("shra.ob %0, %1, 0x4\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (rd != res) {
- printf("shra.ob error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x87654321;
- result = 0xFFFFFFFFF0EC0864;
-
- __asm
- ("shra.ph %0, %1, 0x03\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("shra.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long res;
-
- rt = 0x1234567887654321;
- res = 0x01234567f8765432;
-
- __asm
- ("shra.pw %0, %1, 0x4"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (rd != res) {
- printf("shra.pw error\n");
- return -1;
- }
-
- rt = 0x1234567887654321;
- res = 0x1234567887654321;
-
- __asm
- ("shra.pw %0, %1, 0x0"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (rd != res) {
- printf("shra.pw error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long res;
-
- rt = 0x8512345654323454;
- res = 0xf851034505430345;
-
- __asm
- ("shra.qh %0, %1, 0x4\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (rd != res) {
- printf("shra.qh error\n");
- return -1;
- }
-
- rt = 0x8512345654323454;
- res = 0x8512345654323454;
-
- __asm
- ("shra.qh %0, %1, 0x0\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (rd != res) {
- printf("shra.qh error1\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main()
-{
- long long rd, rt;
- long long res;
-
- rt = 0xbc98756abc654389;
- res = 0xfcfaf8f7fc0705f9;
-
- __asm
- ("shra_r.ob %0, %1, 0x4\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (rd != res) {
- printf("shra_r.ob error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x87654321;
- result = 0xFFFFFFFFF0ED0864;
-
- __asm
- ("shra_r.ph %0, %1, 0x03\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("shra_r.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long res;
-
- rt = 0x1234567887654321;
- res = 0x01234568f8765432;
-
- __asm
- ("shra_r.pw %0, %1, 0x4"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (rd != res) {
- printf("shra_r.pw error\n");
- return -1;
- }
-
- rt = 0x1234567887654321;
- res = 0x1234567887654321;
-
- __asm
- ("shra_r.pw %0, %1, 0x0"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (rd != res) {
- printf("shra_r.pw error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long res;
-
- rt = 0x8512345654323454;
- res = 0xf0a2068b0a86068b;
-
- __asm
- ("shra_r.qh %0, %1, 0x3\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (rd != res) {
- printf("shra_r.qh error\n");
- return -1;
- }
-
- rt = 0x8512345654323454;
- res = 0x8512345654323454;
-
- __asm
- ("shra_r.qh %0, %1, 0x0\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (rd != res) {
- printf("shra_r.qh error1\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x87654321;
- result = 0xFFFFFFFFF0ECA864;
-
- __asm
- ("shra_r.w %0, %1, 0x03\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("shra_r.w wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x03;
- rt = 0x87654321;
- result = 0xFFFFFFFFF0EC0864;
-
- __asm
- ("shrav.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
- if (rd != result) {
- printf("shrav.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, rs;
- long long res;
-
- rt = 0x1234567887654321;
- rs = 0x4;
- res = 0x01234567f8765432;
-
- __asm
- ("shrav.pw %0, %1, %2"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
-
- if (rd != res) {
- printf("shrav.pw error\n");
- return -1;
- }
-
- rt = 0x1234567887654321;
- rs = 0x0;
- res = 0x1234567887654321;
-
- __asm
- ("shrav.pw %0, %1, %2"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
-
- if (rd != res) {
- printf("shrav.pw error1\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, rs;
- long long res;
-
- rt = 0x8512345654323454;
- rs = 0x4;
- res = 0xf851034505430345;
-
- __asm
- ("shrav.qh %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
-
- if (rd != res) {
- printf("shrav.qh error\n");
- return -1;
- }
-
- rt = 0x8512345654323454;
- rs = 0x0;
- res = 0x8512345654323454;
-
- __asm
- ("shrav.qh %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
-
- if (rd != res) {
- printf("shrav.qh error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x03;
- rt = 0x87654321;
- result = 0xFFFFFFFFF0ED0864;
-
- __asm
- ("shrav_r.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
- if (rd != result) {
- printf("shrav_r.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, rs;
- long long res;
-
- rt = 0x1234567887654321;
- rs = 0x4;
- res = 0x01234568f8765432;
-
- __asm
- ("shrav_r.pw %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
-
- if (rd != res) {
- printf("shrav_r.pw error\n");
- return -1;
- }
-
- rt = 0x1234567887654321;
- rs = 0x0;
- res = 0x1234567887654321;
-
- __asm
- ("shrav_r.pw %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
- if (rd != res) {
- printf("shrav_r.pw error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, rs;
- long long res;
-
- rt = 0x8512345654323454;
- rs = 0x3;
- res = 0xf0a2068b0a86068b;
-
- __asm
- ("shrav_r.qh %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
-
- if (rd != res) {
- printf("shrav_r.qh error\n");
- return -1;
- }
-
- rt = 0x400000000000000;
- rs = 0x0;
- res = 0x400000000000000;
-
- __asm
- ("shrav_r.qh %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
-
- if (rd != res) {
- printf("shrav_r.qh error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x03;
- rt = 0x87654321;
- result = 0xFFFFFFFFF0ECA864;
-
- __asm
- ("shrav_r.w %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
- if (rd != result) {
- printf("shrav_r.w wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long res;
-
- rt = 0xab76543212345678;
- res = 0x150e0a0602060a0f;
-
- __asm
- ("shrl.ob %0, %1, 0x3\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (rd != res) {
- printf("shrl.ob error\n");
- return -1;
- }
-
- rt = 0xab76543212345678;
- res = 0xab76543212345678;
-
- __asm
- ("shrl.ob %0, %1, 0x0\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (rd != res) {
- printf("shrl.ob error\n");
- return -1;
- }
-
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x12345678;
- result = 0x00010203;
-
- __asm
- ("shrl.qb %0, %1, 0x05\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("shrl.qb wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long res;
-
- rt = 0x8765679abc543786;
- res = 0x087606790bc50378;
-
- __asm
- ("shrl.qh %0, %1, 0x4\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
-
- if (rd != res) {
- printf("shrl.qh error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, rs;
- long long res;
-
- rt = 0xab76543212345678;
- rs = 0x3;
- res = 0x150e0a0602060a0f;
-
- __asm
- ("shrlv.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
-
- if (rd != res) {
- printf("shrlv.ob error\n");
- return -1;
- }
-
- rt = 0xab76543212345678;
- rs = 0x0;
- res = 0xab76543212345678;
-
- __asm
- ("shrlv.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
-
- if (rd != res) {
- printf("shrlv.ob error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x05;
- rt = 0x12345678;
- result = 0x00010203;
-
- __asm
- ("shrlv.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
- if (rd != result) {
- printf("shrlv.qb wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, rs;
- long long res;
-
- rt = 0x8765679abc543786;
- rs = 0x4;
- res = 0x087606790bc50378;
-
- __asm
- ("shrlv.qh %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
-
- if (rd != res) {
- printf("shrlv.qh error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0xFFFFFFFF8ACF1357;
- resultdsp = 0x01;
-
- __asm
- ("subq.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 20) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("subq.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dspreg, dspresult;
- rt = 0x123456789ABCDEF0;
- rs = 0x123456789ABCDEF0;
- result = 0x0;
- dspresult = 0x0;
-
- __asm
- ("subq.pw %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
- dspreg = (dspreg >> 20) & 0x1;
- if ((rd != result) || (dspreg != dspresult)) {
- printf("subq.pw error1\n\t");
-
- return -1;
- }
-
- rt = 0x123456789ABCDEF1;
- rs = 0x123456789ABCDEF2;
- result = 0x0000000000000001;
- dspresult = 0x0;
-
- __asm
- ("subq.pw %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
- dspreg = (dspreg >> 20) & 0x1;
- if ((rd != result) || (dspreg != dspresult)) {
- printf("subq.pw error2\n");
-
- return -1;
- }
-
- return 0;
-}
-
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dspreg, dspresult;
- rt = 0x123456789ABCDEF0;
- rs = 0x123456789ABCDEF0;
- result = 0x0;
- dspresult = 0x0;
-
- __asm
- ("subq.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
- dspreg = (dspreg >> 20) & 0x1;
- if ((rd != result) || (dspreg != dspresult)) {
- printf("subq.qh error\n\t");
-
- return -1;
- }
-
- return 0;
-}
-
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0x7FFF1357;
- resultdsp = 0x01;
-
- __asm
- ("subq_s.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 20) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("subq_s.ph wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dspreg, dspresult;
- rt = 0x9FFFFFFD9FFFFFFD;
- rs = 0x4000000080000000;
- result = 0x7fffffffe0000003;
- dspresult = 0x1;
-
- __asm
- ("subq_s.pw %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
- dspreg = (dspreg >> 20) & 0x1;
- if ((rd != result) || (dspreg != dspresult)) {
- printf("subq_s.pw error1\n");
-
- return -1;
- }
-
- rt = 0x123456789ABCDEF1;
- rs = 0x123456789ABCDEF2;
- result = 0x0000000000000001;
- /* This time we do not set dspctrl, but set it in pre-action. */
- dspresult = 0x1;
-
- __asm
- ("subq_s.pw %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
- dspreg = (dspreg >> 20) & 0x1;
- if ((rd != result) || (dspreg != dspresult)) {
- printf("subq_s.pw error2\n");
-
- return -1;
- }
-
- rt = 0x8000000080000000;
- rs = 0x7000000070000000;
- dspresult = 0x1;
-
- __asm
- ("subq_s.pw %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = (dspreg >> 20) & 0x1;
- if ((dspreg != dspresult)) {
- printf("subq_s.pw error3\n");
-
- return -1;
- }
-
- return 0;
-}
-
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dspreg, dspresult;
- rs = 0x123456789ABCDEF0;
- rt = 0x123456789ABCDEF0;
- result = 0x0;
- dspresult = 0x0;
-
- __asm
- ("subq_s.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
- dspreg = (dspreg >> 20) & 0x1;
- if ((rd != result) || (dspreg != dspresult)) {
- printf("subq_s.qh error1\n");
-
- return -1;
- }
-
- rs = 0x4000000080000000;
- rt = 0x9FFD00009FFC0000;
- result = 0x7FFF0000E0040000;
- dspresult = 0x1;
-
- __asm
- ("subq_s.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
- dspreg = (dspreg >> 20) & 0x1;
- if ((rd != result) || (dspreg != dspresult)) {
- printf("subq_s.qh error2\n");
-
- return -1;
- }
-
- rs = 0x8000000000000000;
- rt = 0x7000000000000000;
- result = 0x8000000000000000;
- dspresult = 0x1;
- __asm
- ("subq_s.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = (dspreg >> 20) & 0x1;
- if ((rd != result) || (dspreg != dspresult)) {
- printf("subq_s.qh error3\n");
- return -1;
- }
-
- return 0;
-}
-
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0x7FFFFFFF;
- resultdsp = 0x01;
-
- __asm
- ("subq_s.w %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 20) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("subq_s.w wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dspreg, dspresult;
- rs = 0x6F6F6F6F6F6F6F6F;
- rt = 0x5E5E5E5E5E5E5E5E;
- result = 0x1111111111111111;
- dspresult = 0x0;
-
- __asm
- ("subu.ob %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- if ((rd != result) || (dspreg != dspresult)) {
- printf("subu.ob error\n");
-
- return -1;
- }
-
- return 0;
-}
-
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0xFFFFFFFF8BCF1357;
- resultdsp = 0x01;
-
- __asm
- ("subu.qb %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 20) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("subu.qb wrong\n");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dspreg, result, dspresult;
- rs = 0x12345678ABCDEF0;
- rt = 0x12345678ABCDEF1;
- result = 0x00000000000;
- dspresult = 0x01;
-
- __asm
- ("subu_s.ob %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
- if ((rd != result) || (dspreg != dspresult)) {
- printf("subu_s.ob error\n\t");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0x00001357;
- resultdsp = 0x01;
-
- __asm
- ("subu_s.qb %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 20) & 0x01;
- if ((dsp != resultdsp) || (rd != result)) {
- printf("subu_s_qb wrong");
-
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long dsp_i, dsp_o;
- long long ccond_i, outflag_i, efi_i, c_i, scount_i, pos_i;
- long long ccond_o, outflag_o, efi_o, c_o, scount_o, pos_o;
- long long ccond_r, outflag_r, efi_r, c_r, scount_r, pos_r;
-
- ccond_i = 0x000000BC;/* 4 */
- outflag_i = 0x0000001B;/* 3 */
- efi_i = 0x00000001;/* 5 */
- c_i = 0x00000001;/* 2 */
- scount_i = 0x0000000F;/* 1 */
- pos_i = 0x0000000C;/* 0 */
-
- dsp_i = (ccond_i << 24) | (outflag_i << 16) | (efi_i << 14) | (c_i << 13)
- | (scount_i << 7) | pos_i;
-
- ccond_r = ccond_i;
- outflag_r = outflag_i;
- efi_r = efi_i;
- c_r = c_i;
- scount_r = scount_i;
- pos_r = pos_i;
-
- __asm
- ("wrdsp %1, 0x3F\n\t"
- "rddsp %0, 0x3F\n\t"
- : "=r"(dsp_o)
- : "r"(dsp_i)
- );
-
- ccond_o = (dsp_o >> 24) & 0xFF;
- outflag_o = (dsp_o >> 16) & 0xFF;
- efi_o = (dsp_o >> 14) & 0x01;
- c_o = (dsp_o >> 14) & 0x01;
- scount_o = (dsp_o >> 7) & 0x3F;
- pos_o = dsp_o & 0x1F;
-
- if ((ccond_o != ccond_r) || (outflag_o != outflag_r) || (efi_o != efi_r) \
- || (c_o != c_r) || (scount_o != scount_r) || (pos_o != pos_r)) {
- printf("wrddsp wrong\n");
-
- return -1;
- }
- return 0;
-}
+++ /dev/null
-CROSS_COMPILE ?= mips64el-unknown-linux-gnu-
-
-SIM = qemu-system-mips64el
-SIMFLAGS = -nographic -cpu mips64dspr2 -kernel
-
-AS = $(CROSS_COMPILE)as
-LD = $(CROSS_COMPILE)ld
-CC = $(CROSS_COMPILE)gcc
-AR = $(CROSS_COMPILE)ar
-NM = $(CROSS_COMPILE)nm
-STRIP = $(CROSS_COMPILE)strip
-RANLIB = $(CROSS_COMPILE)ranlib
-OBJCOPY = $(CROSS_COMPILE)objcopy
-OBJDUMP = $(CROSS_COMPILE)objdump
-
-VECTORS_OBJ ?= ./head.o ./printf.o
-
-HEAD_FLAGS ?= -nostdinc -mabi=64 -G 0 -mno-abicalls -fno-pic -pipe \
- -msoft-float -march=mips64 -Wa,-mips64 -Wa,--trap \
- -msym32 -DKBUILD_64BIT_SYM32 -I./
-
-CFLAGS ?= -nostdinc -mabi=64 -G 0 -mno-abicalls -fno-pic -fno-builtin \
- -pipe -march=mips64r2 -mgp64 -mdspr2 -static -Wa,--trap -msym32 \
- -DKBUILD_64BIT_SYM32 -I./
-
-LDFLAGS = -T./mips_boot.lds -L./
-FLAGS = -nostdlib -mabi=64 -march=mips64r2 -mgp64 -mdspr2
-
-TESTCASES = absq_s_qb.tst
-TESTCASES += addqh_ph.tst
-TESTCASES += addqh_r_ph.tst
-TESTCASES += addqh_r_w.tst
-TESTCASES += addqh_w.tst
-#TESTCASES += adduh_ob.tst
-TESTCASES += adduh_qb.tst
-#TESTCASES += adduh_r_ob.tst
-TESTCASES += adduh_r_qb.tst
-TESTCASES += addu_ph.tst
-#TESTCASES += addu_qh.tst
-TESTCASES += addu_s_ph.tst
-#TESTCASES += addu_s_qh.tst
-TESTCASES += append.tst
-TESTCASES += balign.tst
-#TESTCASES += cmpgdu_eq_ob.tst
-TESTCASES += cmpgdu_eq_qb.tst
-#TESTCASES += cmpgdu_le_ob.tst
-TESTCASES += cmpgdu_le_qb.tst
-#TESTCASES += cmpgdu_lt_ob.tst
-TESTCASES += cmpgdu_lt_qb.tst
-#TESTCASES += dbalign.tst
-TESTCASES += dpaqx_sa_w_ph.tst
-TESTCASES += dpaqx_s_w_ph.tst
-TESTCASES += dpa_w_ph.tst
-#TESTCASES += dpa_w_qh.tst
-TESTCASES += dpax_w_ph.tst
-TESTCASES += dpsqx_sa_w_ph.tst
-TESTCASES += dpsqx_s_w_ph.tst
-TESTCASES += dps_w_ph.tst
-#TESTCASES += dps_w_qh.tst
-TESTCASES += dpsx_w_ph.tst
-TESTCASES += mul_ph.tst
-TESTCASES += mulq_rs_w.tst
-TESTCASES += mulq_s_ph.tst
-TESTCASES += mulq_s_w.tst
-TESTCASES += mulsaq_s_w_ph.tst
-TESTCASES += mulsa_w_ph.tst
-TESTCASES += mul_s_ph.tst
-TESTCASES += precr_qb_ph.tst
-TESTCASES += precr_sra_ph_w.tst
-TESTCASES += precr_sra_r_ph_w.tst
-TESTCASES += prepend.tst
-TESTCASES += shra_qb.tst
-TESTCASES += shra_r_qb.tst
-#TESTCASES += shrav_ob.tst
-TESTCASES += shrav_qb.tst
-#TESTCASES += shrav_r_ob.tst
-TESTCASES += shrav_r_qb.tst
-TESTCASES += shrl_ph.tst
-TESTCASES += shrlv_ph.tst
-TESTCASES += subqh_ph.tst
-TESTCASES += subqh_r_ph.tst
-TESTCASES += subqh_r_w.tst
-TESTCASES += subqh_w.tst
-#TESTCASES += subuh_ob.tst
-TESTCASES += subuh_qb.tst
-#TESTCASES += subuh_r_ob.tst
-TESTCASES += subuh_r_qb.tst
-TESTCASES += subu_ph.tst
-#TESTCASES += subu_qh.tst
-TESTCASES += subu_s_ph.tst
-#TESTCASES += subu_s_qh.tst
-
-all: build
-
-head.o : head.S
- $(Q)$(CC) $(HEAD_FLAGS) -D"STACK_TOP=0xffffffff80200000" -c $< -o $@
-
-%.o : %.S
- $(CC) $(CFLAGS) -c $< -o $@
-
-%.o : %.c
- $(CC) $(CFLAGS) -c $< -o $@
-
-%.tst: %.o $(VECTORS_OBJ)
- $(CC) $(VECTORS_OBJ) $(FLAGS) $(LDFLAGS) $< -o $@
-
-build: $(VECTORS_OBJ) $(MIPSSOC_LIB) $(TESTCASES)
-
-check: $(VECTORS_OBJ) $(MIPSSOC_LIB) $(TESTCASES)
- @for case in $(TESTCASES); do \
- echo $(SIM) $(SIMFLAGS) ./$$case; \
- $(SIM) $(SIMFLAGS) ./$$case & (sleep 1; killall $(SIM)); \
- done
-
-clean:
- $(Q)rm -f *.o *.tst *.a
+++ /dev/null
-#include "io.h"
-int main()
-{
- long long input, result, dsp;
- long long hope;
-
- input = 0x701BA35E;
- hope = 0x701B5D5E;
-
- __asm
- ("absq_s.qb %0, %1\n\t"
- : "=r"(result)
- : "r"(input)
- );
- if (result != hope) {
- printf("absq_s.qb error\n");
- return -1;
- }
-
- input = 0x801BA35E;
- hope = 0x7F1B5D5E;
-
- __asm
- ("absq_s.qb %0, %2\n\t"
- "rddsp %1\n\t"
- : "=r"(result), "=r"(dsp)
- : "r"(input)
- );
- dsp = dsp >> 20;
- dsp &= 0x01;
- if (result != hope) {
- printf("absq_s.qb error\n");
- return -1;
- }
-
- if (dsp != 1) {
- printf("absq_s.qb error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x706A13FE;
- rt = 0x13065174;
- result = 0x41B832B9;
- __asm
- ("addqh.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (result != rd) {
- printf("addqh.ph error!\n");
- return -1;
- }
-
- rs = 0x81000100;
- rt = 0xc2000100;
- result = 0xffffffffa1800100;
- __asm
- ("addqh.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (result != rd) {
- printf("addqh.ph error!\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x706A13FE;
- rt = 0x13065174;
- result = 0x41B832B9;
- __asm
- ("addqh_r.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("addqh_r.ph error\n");
- return -1;
- }
-
- rs = 0x81010100;
- rt = 0xc2000100;
- result = 0xffffffffa1810100;
- __asm
- ("addqh_r.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("addqh_r.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x00000010;
- rt = 0x00000001;
- result = 0x00000009;
-
- __asm
- ("addqh_r.w %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("addqh_r.w error!\n");
- return -1;
- }
- rs = 0xFFFFFFFE;
- rt = 0x00000001;
- result = 0x00000000;
-
- __asm
- ("addqh_r.w %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("addqh_r.w error!\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x00000010;
- rt = 0x00000001;
- result = 0x00000008;
-
- __asm
- ("addqh.w %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("addqh.w wrong\n");
- return -1;
- }
-
- rs = 0xFFFFFFFE;
- rt = 0x00000001;
- result = 0xFFFFFFFFFFFFFFFF;
-
- __asm
- ("addqh.w %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("addqh.w wrong\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long result;
-
- rs = 0x00FF00FF;
- rt = 0x00010001;
- result = 0x01000100;
- __asm
- ("addu.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("1 addu.ph error\n");
- return -1;
- }
-
- rs = 0xFFFF1111;
- rt = 0x00020001;
- result = 0x00011112;
- __asm
- ("addu.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- if ((rd != result) || (((dsp >> 20) & 0x01) != 1)) {
- printf("2 addu.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dspreg;
- long long result, dspresult;
-
- rs = 0x123456787FFF0000;
- rt = 0x1111111180000000;
- result = 0x23456789FFFF0000;
- dspresult = 0x0;
-
- __asm("addu.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
- if ((rd != result) || (dspreg != dspresult)) {
- printf("addu.qh error\n");
- return -1;
- }
-
- rs = 0x123456787FFF0000;
- rt = 0x1111111180020000;
- result = 0x23456789FFFF0000;
- dspresult = 0x01;
-
- __asm("addu.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
- if ((rd != result) || (dspreg != dspresult)) {
- printf("addu.qh overflow error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long result;
-
- rs = 0x00FE00FE;
- rt = 0x00020001;
- result = 0x010000FF;
- __asm
- ("addu_s.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("addu_s.ph error\n");
- return -1;
- }
-
- rs = 0xFFFF1111;
- rt = 0x00020001;
- result = 0xFFFFFFFFFFFF1112;
- __asm
- ("addu_s.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- if ((rd != result) || (((dsp >> 20) & 0x01) != 1)) {
- printf("addu_s.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dspreg;
- long long result, dspresult;
-
- rs = 0x123456787FFF0000;
- rt = 0x1111111180000000;
- result = 0x23456789FFFF0000;
- dspresult = 0x0;
-
- __asm("addu_s.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
- if ((rd != result) || (dspreg != dspresult)) {
- printf("1 addu_s.qh error\n");
- return -1;
- }
-
- rs = 0x12345678FFFF0000;
- rt = 0x11111111000F0000;
- result = 0x23456789FFFF0000;
- dspresult = 0x01;
-
- __asm("addu_s.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
- if ((rd != result) || (dspreg != dspresult)) {
- printf("2 addu_s.qh error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result;
- rs = 0xFF987CDEBCEF2356;
- rt = 0xFF987CDEBCEF2354;
- result = 0xFF987CDEBCEF2355;
-
- __asm("adduh.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("adduh.ob error\n\t");
- return -1;
- }
-
- rs = 0xac50691729945316;
- rt = 0xb9234ca3f5573162;
- result = 0xb2395a5d8f75423c;
-
- __asm("adduh.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("adduh.ob error\n\t");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0xFF0055AA;
- rt = 0x0113421B;
- result = 0xffffffff80094B62;
- __asm
- ("adduh.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("adduh.qb error\n");
- return -1;
- }
- rs = 0xFFFF0FFF;
- rt = 0x00010111;
- result = 0x7F800888;
-
- __asm
- ("adduh.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("adduh.qb error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result;
- rs = 0xFF987CDEBCEF2356;
- rt = 0xFF987CDEBCEF2355;
- result = 0xFF987CDEBCEF2356;
-
- __asm("adduh_r.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("1 adduh_r.ob error\n\t");
- return -1;
- }
-
- rs = 0xac50691729945316;
- rt = 0xb9234ca3f5573162;
- result = 0xb33a5b5d8f76423c;
-
- __asm("adduh_r.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("2 adduh_r.ob error\n\t");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0xFF0055AA;
- rt = 0x01112211;
- result = 0xffffffff80093C5E;
- __asm
- ("adduh_r.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("adduh_r.qb error\n");
- return -1;
- }
-
- rs = 0xFFFF0FFF;
- rt = 0x00010111;
- result = 0xffffffff80800888;
- __asm
- ("adduh_r.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("adduh_r.qb error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long result;
-
- rs = 0xFF0055AA;
- rt = 0x0113421B;
- result = 0x02268436;
- __asm
- ("append %0, %1, 0x01\n\t"
- : "+r"(rt)
- : "r"(rs)
- );
- if (rt != result) {
- printf("append error\n");
- return -1;
- }
-
- rs = 0xFFFF0FFF;
- rt = 0x00010111;
- result = 0x0010111F;
- __asm
- ("append %0, %1, 0x04\n\t"
- : "+r"(rt)
- : "r"(rs)
- );
- if (rt != result) {
- printf("append error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long result;
-
- rs = 0xFF0055AA;
- rt = 0x0113421B;
- result = 0x13421BFF;
- __asm
- ("balign %0, %1, 0x01\n\t"
- : "+r"(rt)
- : "r"(rs)
- );
- if (rt != result) {
- printf("balign error\n");
- return -1;
- }
-
- rs = 0xFFFF0FFF;
- rt = 0x00010111;
- result = 0x11FFFF0F;
- __asm
- ("balign %0, %1, 0x03\n\t"
- : "+r"(rt)
- : "r"(rs)
- );
- if (rt != result) {
- printf("balign error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dspreg, dspresult;
-
- rs = 0x123456789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- result = 0xFE;
- dspresult = 0xFE;
-
- __asm("cmpgdu.eq.ob %0, %2, %3\n\t"
- "rddsp %1"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0xFF);
-
- if ((rd != result) || (dspreg != dspresult)) {
- printf("1 cmpgdu.eq.ob error\n");
- return -1;
- }
-
- rs = 0x133256789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- result = 0x3E;
- dspresult = 0x3E;
-
- __asm("cmpgdu.eq.ob %0, %2, %3\n\t"
- "rddsp %1"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0xFF);
-
- if ((rd != result) || (dspreg != dspresult)) {
- printf("2 cmpgdu.eq.ob error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long result;
-
- rs = 0x11777066;
- rt = 0x55AA70FF;
- result = 0x02;
- __asm
- ("cmpgdu.eq.qb %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 24) & 0x0F;
- if ((rd != result) || (dsp != result)) {
- printf("cmpgdu.eq.qb error\n");
- return -1;
- }
-
- rs = 0x11777066;
- rt = 0x11777066;
- result = 0x0F;
- __asm
- ("cmpgdu.eq.qb %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 24) & 0x0F;
-
- if ((rd != result) || (dsp != result)) {
- printf("cmpgdu.eq.qb error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dspreg, dspresult;
-
- rs = 0x123456789abcdef0;
- rt = 0x123456789abcdeff;
- dspresult = 0xff;
- result = 0xff;
-
- __asm("cmpgdu.le.ob %0, %2, %3\n\t"
- "rddsp %1"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0xff);
-
- if ((rd != result) || (dspreg != dspresult)) {
- printf("cmpgdu.le.ob error\n");
- return -1;
- }
-
- rs = 0x113556789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- result = 0xBE;
- dspresult = 0xFE;
-
- __asm("cmpgdu.eq.ob %0, %2, %3\n\t"
- "rddsp %1"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0xFF);
-
- if ((rd != result) || (dspreg != dspresult)) {
- printf("cmpgdu.eq.ob error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long result;
-
- rs = 0x11777066;
- rt = 0x55AA70FF;
- result = 0x0F;
- __asm
- ("cmpgdu.le.qb %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 24) & 0x0F;
- if (rd != result) {
- printf("cmpgdu.le.qb error\n");
- return -1;
- }
- if (dsp != result) {
- printf("cmpgdu.le.qb error\n");
- return -1;
- }
-
- rs = 0x11777066;
- rt = 0x11707066;
- result = 0x0B;
- __asm
- ("cmpgdu.le.qb %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 24) & 0x0F;
- if (rd != result) {
- printf("cmpgdu.le.qb error\n");
- return -1;
- }
- if (dsp != result) {
- printf("cmpgdu.le.qb error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result, dspreg, dspresult;
-
- rs = 0x123456789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x01;
- result = 0x01;
-
- __asm("cmpgdu.lt.ob %0, %2, %3\n\t"
- "rddsp %1"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0xFF);
-
- if ((rd != result) || (dspreg != dspresult)) {
- printf("cmpgdu.lt.ob error\n");
- return -1;
- }
-
- rs = 0x143356789ABCDEF0;
- rt = 0x123456789ABCDEFF;
- dspresult = 0x41;
- result = 0x41;
-
- __asm("cmpgdu.lt.ob %0, %2, %3\n\t"
- "rddsp %1"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 24) & 0xFF);
-
- if ((rd != result) || (dspreg != dspresult)) {
- printf("cmpgdu.lt.ob error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long dsp;
- long long result;
-
- rs = 0x11777066;
- rt = 0x55AA70FF;
- result = 0x0D;
- __asm
- ("cmpgdu.lt.qb %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 24) & 0x0F;
- if (rd != result) {
- printf("cmpgdu.lt.qb error\n");
- return -1;
- }
- if (dsp != result) {
- printf("cmpgdu.lt.qb error\n");
- return -1;
- }
-
- rs = 0x11777066;
- rt = 0x11777066;
- result = 0x00;
- __asm
- ("cmpgdu.lt.qb %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 24) & 0x0F;
- if (rd != result) {
- printf("cmpgdu.lt.qb error\n");
- return -1;
- }
- if (dsp != result) {
- printf("cmpgdu.lt.qb error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rt, rs;
- long long res;
-
- rt = 0x1234567887654321;
- rs = 0xabcd1234abcd1234;
-
- res = 0x34567887654321ab;
-
- asm ("dbalign %0, %1, 0x1\n"
- : "=r"(rt)
- : "r"(rs)
- );
-
- if (rt != res) {
- printf("dbalign error\n");
- return -1;
- }
-
- rt = 0x1234567887654321;
- rs = 0xabcd1234abcd1234;
-
- res = 0x7887654321abcd12;
-
- asm ("dbalign %0, %1, 0x3\n"
- : "=r"(rt)
- : "r"(rs)
- );
-
- if (rt != res) {
- printf("dbalign error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long ach = 5, acl = 5;
- long long resulth, resultl;
-
- rs = 0x00FF00FF;
- rt = 0x00010002;
- resulth = 0x05;
- resultl = 0x0302;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpa.w.ph $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
- if ((ach != resulth) || (acl != resultl)) {
- printf("1 dpa.w.ph error\n");
- return -1;
- }
-
- ach = 6, acl = 7;
- rs = 0xFFFF00FF;
- rt = 0xFFFF0002;
- resulth = 0x05;
- resultl = 0xfffffffffffe0206;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpa.w.ph $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
- if ((ach != resulth) || (acl != resultl)) {
- printf("2 dpa.w.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-int main(void)
-{
- long long rt, rs;
- long long achi, acli;
- long long acho, aclo;
- long long resh, resl;
-
- achi = 0x1;
- acli = 0x1;
-
- rs = 0x0001000100010001;
- rt = 0x0002000200020002;
-
- resh = 0x1;
- resl = 0x9;
-
- asm("mthi %2, $ac1\t\n"
- "mtlo %3, $ac1\t\n"
- "dpa.w.qh $ac1, %4, %5\t\n"
- "mfhi %0, $ac1\t\n"
- "mflo %1, $ac1\t\n"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl)) {
- printf("1 dpa.w.qh error\n");
- return -1;
- }
-
-
- achi = 0xffffffff;
- acli = 0xaaaaaaaa;
-
- rs = 0xaaaabbbbccccdddd;
- rt = 0x7777888899996666;
-
- resh = 0xffffffffffffffff;
- resl = 0x320cdf02;
-
- asm("mthi %2, $ac1\t\n"
- "mtlo %3, $ac1\t\n"
- "dpa.w.qh $ac1, %4, %5\t\n"
- "mfhi %0, $ac1\t\n"
- "mflo %1, $ac1\t\n"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
- if ((acho != resh) || (aclo != resl)) {
- printf("2 dpa.w.qh error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rs, rt, dsp;
- long long ach = 5, acl = 5;
- long long resulth, resultl, resultdsp;
-
- rs = 0x800000FF;
- rt = 0x00018000;
- resulth = 0x05;
- resultl = 0xFFFFFFFF80000202;
- resultdsp = 0x01;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpaqx_s.w.ph $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x01;
- if (dsp != resultdsp) {
- printf("dpaqx_s.w.ph error\n");
- return -1;
- }
- if (ach != resulth) {
- printf("dpaqx_s.w.ph error\n");
- return -1;
- }
- if (acl != resultl) {
- printf("dpaqx_s.w.ph error\n");
- return -1;
- }
-
- ach = 5;
- acl = 5;
- rs = 0x00FF00FF;
- rt = 0x00010002;
- resulth = 0x05;
- resultl = 0x05FF;
- /***********************************************************
- * Because of we set outflag at last time, although this
- * time we set nothing, but it is stay the last time value.
- **********************************************************/
- resultdsp = 0x01;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpaqx_s.w.ph $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x01;
- if (dsp != resultdsp) {
- printf("dpaqx_s.w.ph error\n");
- return -1;
- }
- if (ach != resulth) {
- printf("dpaqx_s.w.ph error\n");
- return -1;
- }
- if (acl != resultl) {
- printf("dpaqx_s.w.ph error\n");
- return -1;
- }
-
- ach = 5;
- acl = 5;
- rs = 0x800000FF;
- rt = 0x00028000;
- resulth = 0x05;
- resultl = 0xffffffff80000400;
- resultdsp = 0x01;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpaqx_s.w.ph $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x01;
- if ((dsp != resultdsp) || (ach != resulth) || (acl != resultl)) {
- printf("dpaqx_s.w.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main()
-{
- long long rs, rt, dsp;
- long long ach = 5, acl = 5;
- long long resulth, resultl, resultdsp;
-
- rs = 0x00FF00FF;
- rt = 0x00010002;
- resulth = 0x00;
- resultl = 0x7FFFFFFF;
- resultdsp = 0x01;
- __asm
- ("wrdsp %2\n\t"
- "mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpaqx_sa.w.ph $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "+r"(dsp)
- : "r"(rs), "r"(rt)
- );
- if ((dsp >> (16 + 1) != resultdsp) || (ach != resulth) ||
- (acl != resultl)) {
- printf("dpaqx_sa.w.ph errror\n");
- }
-
- ach = 9;
- acl = 0xb;
- rs = 0x800000FF;
- rt = 0x00018000;
- resulth = 0x00;
- resultl = 0x7fffffff;
- resultdsp = 0x01;
- __asm
- ("wrdsp %2\n\t"
- "mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpaqx_sa.w.ph $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "+r"(dsp)
- : "r"(rs), "r"(rt)
- );
- if ((dsp >> (16 + 1) != resultdsp) || (ach != resulth) ||
- (acl != resultl)) {
- printf("dpaqx_sa.w.ph errror\n");
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long rs, rt;
- long ach = 5, acl = 5;
- long resulth, resultl;
-
- rs = 0x00FF00FF;
- rt = 0x00010002;
- resulth = 0x05;
- resultl = 0x0302;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpax.w.ph $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
- if (ach != resulth) {
- printf("dpax.w.ph error\n");
- return -1;
- }
- if (acl != resultl) {
- printf("dpax.w.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long ach = 5, acl = 5;
- long long resulth, resultl;
-
- rs = 0x00FF00FF;
- rt = 0x00010002;
- resulth = 0x04;
- resultl = 0xFFFFFFFFFFFFFFD08;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dps.w.ph $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
- if (ach != resulth || acl != resultl) {
- printf("dps.w.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long achi, acli;
- long long acho, aclo;
- long long resh, resl;
-
- rs = 0x0000000100000001;
- rt = 0x0000000200000002;
- achi = 0x1;
- acli = 0x8;
-
- resh = 0x1;
- resl = 0x4;
-
- asm ("mthi %2, $ac1\t\n"
- "mtlo %3, $ac1\t\n"
- "dps.w.qh $ac1, %4, %5\t\n"
- "mfhi %0, $ac1\t\n"
- "mflo %1, $ac1\t\n"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl)) {
- printf("1 dps.w.qh error\n");
- return -1;
- }
-
- rs = 0xaaaabbbbccccdddd;
- rt = 0xaaaabbbbccccdddd;
-
- achi = 0x88888888;
- achi = 0x55555555;
-
- resh = 0xfffffffff7777777;
- resl = 0x0a38b181;
-
- asm ("mthi %2, $ac1\t\n"
- "mtlo %3, $ac1\t\n"
- "dps.w.qh $ac1, %4, %5\t\n"
- "mfhi %0, $ac1\t\n"
- "mflo %1, $ac1\t\n"
- : "=r"(acho), "=r"(aclo)
- : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
- );
-
- if ((acho != resh) || (aclo != resl)) {
- printf("1 dps.w.qh error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rs, rt, dsp;
- long long ach = 5, acl = 5;
- long long resulth, resultl, resultdsp;
-
- rs = 0xBC0123AD;
- rt = 0x01643721;
- resulth = 0x04;
- resultl = 0xFFFFFFFFAEA3E09B;
- resultdsp = 0x00;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsqx_s.w.ph $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x01;
- if (dsp != resultdsp || ach != resulth || acl != resultl) {
- printf("dpsqx_s.w.ph error\n");
- return -1;
- }
-
- ach = 0x99f13005;
- acl = 0x51730062;
- rs = 0x80008000;
- rt = 0x80008000;
-
- resulth = 0xffffffff99f13004;
- resultl = 0x51730064;
- resultdsp = 0x01;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsqx_s.w.ph $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x01;
- if (dsp != resultdsp || ach != resulth || acl != resultl) {
- printf("dpsqx_s.w.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-int main()
-{
- long long rs, rt, dsp;
- long long ach = 5, acl = 5;
- long long resulth, resultl, resultdsp;
-
- rs = 0xBC0123AD;
- rt = 0x01643721;
- resulth = 0x00;
- resultl = 0x7FFFFFFF;
- resultdsp = 0x01;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsqx_sa.w.ph $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x01;
- if (dsp != resultdsp || ach != resulth || acl != resultl) {
- printf("dpsqx_sa.w.ph error\n");
- return -1;
- }
-
- ach = 0x8c0b354A;
- acl = 0xbbc02249;
- rs = 0x800023AD;
- rt = 0x01648000;
- resulth = 0xffffffffffffffff;
- resultl = 0xffffffff80000000;
- resultdsp = 0x01;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsqx_sa.w.ph $ac1, %3, %4\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- "rddsp %2\n\t"
- : "+r"(ach), "+r"(acl), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 17) & 0x01;
- if (dsp != resultdsp || ach != resulth || acl != resultl) {
- printf("dpsqx_sa.w.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long ach = 5, acl = 5;
- long long resulth, resultl;
-
- rs = 0xBC0123AD;
- rt = 0x01643721;
- resulth = 0x04;
- resultl = 0xFFFFFFFFD751F050;
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "dpsx.w.ph $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
- if (ach != resulth || acl != resultl) {
- printf("dpsx.w.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-/*
- * Startup Code for MIPS64 CPU-core
- *
- */
-.text
-.globl _start
-.align 4
-_start:
- ori $2, $2, 0xffff
- sll $2, $2, 16
- ori $2, $2, 0xffff
- mtc0 $2, $12, 0
- jal main
-
-end:
- b end
+++ /dev/null
-#ifndef _ASM_IO_H
-#define _ASM_IO_H
-extern int printf(const char *fmt, ...);
-extern unsigned long get_ticks(void);
-
-#define _read(source) \
-({ unsigned long __res; \
- __asm__ __volatile__( \
- "mfc0\t%0, " #source "\n\t" \
- : "=r" (__res)); \
- __res; \
-})
-
-#define __read(source) \
-({ unsigned long __res; \
- __asm__ __volatile__( \
- "move\t%0, " #source "\n\t" \
- : "=r" (__res)); \
- __res; \
-})
-
-#endif
+++ /dev/null
-OUTPUT_ARCH(mips)
-SECTIONS
-{
- . = 0xffffffff80100000;
- . = ALIGN((1 << 13));
- .text :
- {
- *(.text)
- *(.rodata)
- *(.rodata.*)
- }
-
- __init_begin = .;
- . = ALIGN((1 << 12));
- .init.text : AT(ADDR(.init.text) - 0)
- {
- *(.init.text)
- }
- .init.data : AT(ADDR(.init.data) - 0)
- {
- *(.init.data)
- }
- . = ALIGN((1 << 12));
- __init_end = .;
-
- . = ALIGN((1 << 13));
- .data :
- {
- *(.data)
- }
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x03FB1234;
- rt = 0x0BCC4321;
- result = 0xFFFFFFFFF504F4B4;
- resultdsp = 1;
-
- __asm
- ("mul.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if (rd != result || dsp != resultdsp) {
- printf("mul.ph wrong\n");
- return -1;
- }
-
- dsp = 0;
- __asm
- ("wrdsp %0\n\t"
- :
- : "r"(dsp)
- );
-
- rs = 0x00210010;
- rt = 0x00110005;
- result = 0x2310050;
- resultdsp = 0;
-
- __asm
- ("mul.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if (rd != result || dsp != resultdsp) {
- printf("mul.ph wrong\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x03FB1234;
- rt = 0x0BCC4321;
- result = 0x7fff7FFF;
- resultdsp = 1;
-
- __asm
- ("mul_s.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if (rd != result || dsp != resultdsp) {
- printf("1 mul_s.ph error\n");
- return -1;
- }
-
- rs = 0x7fffff00;
- rt = 0xff007fff;
- result = 0xffffffff80008000;
- resultdsp = 1;
-
- __asm
- ("mul_s.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if (rd != result || dsp != resultdsp) {
- printf("2 mul_s.ph error\n");
- return -1;
- }
-
- dsp = 0;
- __asm
- ("wrdsp %0\n\t"
- :
- : "r"(dsp)
- );
-
- rs = 0x00320001;
- rt = 0x00210002;
- result = 0x06720002;
- resultdsp = 0;
-
- __asm
- ("mul_s.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if (rd != result || dsp != resultdsp) {
- printf("3 mul_s.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x80001234;
- rt = 0x80004321;
- result = 0xFFFFFFFF80005555;
-
- __asm
- ("mulq_rs.w %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("mulq_rs.w error!\n");
- return -1;
- }
-
- rs = 0x80000000;
- rt = 0x80000000;
- result = 0x7FFFFFFF;
- resultdsp = 1;
-
- __asm
- ("mulq_rs.w %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if (rd != result || dsp != resultdsp) {
- printf("mulq_rs.w error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x80001234;
- rt = 0x80004321;
- result = 0x7FFF098B;
- resultdsp = 1;
-
- __asm
- ("mulq_s.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if (rd != result || dsp != resultdsp) {
- printf("mulq_s.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x80001234;
- rt = 0x80004321;
- result = 0xFFFFFFFF80005555;
-
- __asm
- ("mulq_s.w %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("mulq_s.w error\n");
- return -1;
- }
-
- rs = 0x80000000;
- rt = 0x80000000;
- result = 0x7FFFFFFF;
- resultdsp = 1;
-
- __asm
- ("mulq_s.w %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 21) & 0x01;
- if (rd != result || dsp != resultdsp) {
- printf("mulq_s.w error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rs, rt, ach, acl;
- long long resulth, resultl;
-
- ach = 0x05;
- acl = 0x00BBDDCC;
- rs = 0x80001234;
- rt = 0x80004321;
- resulth = 0x05;
- resultl = 0x3BF5E918;
-
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "mulsa.w.ph $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
- if (ach != resulth || acl != resultl) {
- printf("mulsa.w.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rs, rt, ach, acl;
- long long resulth, resultl;
-
- ach = 0x05;
- acl = 0x00BBDDCC;
- rs = 0x80001234;
- rt = 0x80004321;
- resulth = 0x05;
- resultl = 0x772ff463;
-
- __asm
- ("mthi %0, $ac1\n\t"
- "mtlo %1, $ac1\n\t"
- "mulsaq_s.w.ph $ac1, %2, %3\n\t"
- "mfhi %0, $ac1\n\t"
- "mflo %1, $ac1\n\t"
- : "+r"(ach), "+r"(acl)
- : "r"(rs), "r"(rt)
- );
- if (ach != resulth || acl != resultl) {
- printf("mulsaq_s.w.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main()
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0x34786521;
-
- __asm
- ("precr.qb.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (result != rd) {
- printf("precr.qb.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0x43215678;
-
- __asm
- ("precr_sra.ph.w %0, %1, 0x00\n\t"
- : "+r"(rt)
- : "r"(rs)
- );
- if (result != rt) {
- printf("precr_sra.ph.w error\n");
- return -1;
- }
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0xFFFFFFFFFFFF0000;
-
- __asm
- ("precr_sra.ph.w %0, %1, 0x1F\n\t"
- : "+r"(rt)
- : "r"(rs)
- );
- if (result != rt) {
- printf("precr_sra.ph.w error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0x43215678;
-
- __asm
- ("precr_sra_r.ph.w %0, %1, 0x00\n\t"
- : "+r"(rt)
- : "r"(rs)
- );
- if (result != rt) {
- printf("precr_sra_r.ph.w error\n");
- return -1;
- }
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0xFFFFFFFFFFFF0000;
-
- __asm
- ("precr_sra_r.ph.w %0, %1, 0x1F\n\t"
- : "+r"(rt)
- : "r"(rs)
- );
- if (result != rt) {
- printf("precr_sra_r.ph.w error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rs, rt;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0xFFFFFFFF87654321;
- __asm
- ("prepend %0, %1, 0x00\n\t"
- : "+r"(rt)
- : "r"(rs)
- );
- if (rt != result) {
- printf("prepend error\n");
- return -1;
- }
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0xFFFFFFFFACF10ECA;
- __asm
- ("prepend %0, %1, 0x0F\n\t"
- : "+r"(rt)
- : "r"(rs)
- );
- if (rt != result) {
- printf("prepend error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-
-typedef unsigned long va_list;
-
-#define ACC 4
-#define __read(source) \
-({ va_list __res; \
- __asm__ __volatile__( \
- "move\t%0, " #source "\n\t" \
- : "=r" (__res)); \
- __res; \
-})
-
-enum format_type {
- FORMAT_TYPE_NONE,
- FORMAT_TYPE_HEX,
- FORMAT_TYPE_ULONG,
- FORMAT_TYPE_FLOAT
-};
-
-struct printf_spec {
- char type;
-};
-
-static int format_decode(char *fmt, struct printf_spec *spec)
-{
- char *start = fmt;
-
- for (; *fmt ; ++fmt) {
- if (*fmt == '%') {
- break;
- }
- }
-
- switch (*++fmt) {
- case 'x':
- spec->type = FORMAT_TYPE_HEX;
- break;
-
- case 'd':
- spec->type = FORMAT_TYPE_ULONG;
- break;
-
- case 'f':
- spec->type = FORMAT_TYPE_FLOAT;
- break;
-
- default:
- spec->type = FORMAT_TYPE_NONE;
- }
-
- return ++fmt - start;
-}
-
-void *memcpy(void *dest, void *src, int n)
-{
- int i;
- char *s = src;
- char *d = dest;
-
- for (i = 0; i < n; i++) {
- d[i] = s[i];
- }
- return dest;
-}
-
-char *number(char *buf, va_list num)
-{
- int i;
- char *str = buf;
- static char digits[16] = "0123456789abcdef";
- str = str + sizeof(num) * 2;
-
- for (i = 0; i < sizeof(num) * 2; i++) {
- *--str = digits[num & 15];
- num >>= 4;
- }
-
- return buf + sizeof(num) * 2;
-}
-
-char *__number(char *buf, va_list num)
-{
- int i;
- va_list mm = num;
- char *str = buf;
-
- if (!num) {
- *str++ = '0';
- return str;
- }
-
- for (i = 0; mm; mm = mm/10, i++) {
- /* Do nothing. */
- }
-
- str = str + i;
-
- while (num) {
- *--str = num % 10 + 48;
- num = num / 10;
- }
-
- return str + i;
-}
-
-va_list modf(va_list args, va_list *integer, va_list *num)
-{
- int i;
- double dot_v = 0;
- va_list E, DOT, DOT_V;
-
- if (!args) {
- return 0;
- }
-
- for (i = 0, args = args << 1 >> 1; i < 52; i++) {
- if ((args >> i) & 0x1) {
- break;
- }
- }
-
- *integer = 0;
-
- if ((args >> 56 != 0x3f) || (args >> 52 == 0x3ff)) {
- E = (args >> 52) - 1023;
- DOT = 52 - E - i;
- DOT_V = args << (12 + E) >> (12 + E) >> i;
- *integer = ((args << 12 >> 12) >> (i + DOT)) | (1 << E);
- } else {
- E = ~((args >> 52) - 1023) + 1;
- DOT_V = args << 12 >> 12;
-
- dot_v += 1.0 / (1 << E);
-
- for (i = 1; i <= 16; i++) {
- if ((DOT_V >> (52 - i)) & 0x1) {
- dot_v += 1.0 / (1 << E + i);
- }
- }
-
- for (i = 1, E = 0; i <= ACC; i++) {
- dot_v *= 10;
- if (!(va_list)dot_v) {
- E++;
- }
- }
-
- *num = E;
-
- return dot_v;
- }
-
- if (args & 0xf) {
- for (i = 1; i <= 16; i++) {
- if ((DOT_V >> (DOT - i)) & 0x1) {
- dot_v += 1.0 / (1 << i);
- }
- }
-
- for (i = 1, E = 0; i <= ACC; i++) {
- dot_v *= 10;
- if (!(va_list)dot_v) {
- E++;
- }
- }
-
- *num = E;
-
- return dot_v;
- } else if (DOT) {
- for (i = 1; i <= DOT; i++) {
- if ((DOT_V >> (DOT - i)) & 0x1) {
- dot_v += 1.0 / (1 << i);
- }
- }
-
- for (i = 1; i <= ACC; i++) {
- dot_v = dot_v * 10;
- }
-
- return dot_v;
- }
-
- return 0;
-}
-
-int vsnprintf(char *buf, int size, char *fmt, va_list args)
-{
- char *str, *mm;
- struct printf_spec spec = {0};
-
- str = mm = buf;
-
- while (*fmt) {
- char *old_fmt = fmt;
- int read = format_decode(fmt, &spec);
-
- fmt += read;
-
- switch (spec.type) {
- case FORMAT_TYPE_NONE: {
- memcpy(str, old_fmt, read);
- str += read;
- break;
- }
- case FORMAT_TYPE_HEX: {
- memcpy(str, old_fmt, read);
- str = number(str + read, args);
- for (; *mm ; ++mm) {
- if (*mm == '%') {
- *mm = '0';
- break;
- }
- }
- break;
- }
- case FORMAT_TYPE_ULONG: {
- memcpy(str, old_fmt, read - 2);
- str = __number(str + read - 2, args);
- break;
- }
- case FORMAT_TYPE_FLOAT: {
- va_list integer, dot_v, num;
- dot_v = modf(args, &integer, &num);
- memcpy(str, old_fmt, read - 2);
- str += read - 2;
- if ((args >> 63 & 0x1)) {
- *str++ = '-';
- }
- str = __number(str, integer);
- if (dot_v) {
- *str++ = '.';
- while (num--) {
- *str++ = '0';
- }
- str = __number(str, dot_v);
- }
- break;
- }
- }
- }
- *str = '\0';
-
- return str - buf;
-}
-
-static void serial_out(char *str)
-{
- while (*str) {
- *(char *)0xffffffffb80003f8 = *str++;
- }
-}
-
-int vprintf(char *fmt, va_list args)
-{
- int printed_len = 0;
- static char printf_buf[512];
- printed_len = vsnprintf(printf_buf, sizeof(printf_buf), fmt, args);
- serial_out(printf_buf);
- return printed_len;
-}
-
-int printf(char *fmt, ...)
-{
- return vprintf(fmt, __read($5));
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x12345678;
- result = 0x02060A0F;
-
- __asm
- ("shra.qb %0, %1, 0x03\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("shra.qb error\n");
- return -1;
- }
-
- rt = 0x87654321;
- result = 0xFFFFFFFFF00C0804;
-
- __asm
- ("shra.qb %0, %1, 0x03\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("shra.qb error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main()
-{
- int rd, rt;
- int result;
-
- rt = 0x12345678;
- result = 0x02070B0F;
-
- __asm
- ("shra_r.qb %0, %1, 0x03\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("shra_r.qb wrong\n");
- return -1;
- }
-
- rt = 0x87654321;
- result = 0xF10D0804;
-
- __asm
- ("shra_r.qb %0, %1, 0x03\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("shra_r.qb wrong\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, rs;
- long long res;
-
- rt = 0x1234567887654321;
- rs = 0x4;
- res = 0xf1f3f5f7f8060402;
-
- asm ("shrav.ob %0, %1, %2"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
-
- if (rd != res) {
- printf("shra.ob error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x03;
- rt = 0x12345678;
- result = 0x02060A0F;
-
- __asm
- ("shrav.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
- if (rd != result) {
- printf("shrav.qb error\n");
- return -1;
- }
-
- rs = 0x03;
- rt = 0x87654321;
- result = 0xFFFFFFFFF00C0804;
-
- __asm
- ("shrav.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
- if (rd != result) {
- printf("shrav.qb error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rt, rs;
- long long res;
-
- rt = 0x1234567887654321;
- rs = 0x4;
- res = 0xe3e7ebf0f1ede9e5;
-
- asm ("shrav_r.ob %0, %1, %2"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
-
- if (rd != res) {
- printf("shra_r.ob error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x03;
- rt = 0x12345678;
- result = 0x02070B0F;
-
- __asm
- ("shrav_r.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
- if (rd != result) {
- printf("shrav_r.qb error\n");
- return -1;
- }
-
- rs = 0x03;
- rt = 0x87654321;
- result = 0xFFFFFFFFF10D0804;
-
- __asm
- ("shrav_r.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
- if (rd != result) {
- printf("shrav_r.qb error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rt;
- long long result;
-
- rt = 0x12345678;
- result = 0x009102B3;
-
- __asm
- ("shrl.ph %0, %1, 0x05\n\t"
- : "=r"(rd)
- : "r"(rt)
- );
- if (rd != result) {
- printf("shrl.ph error!\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x05;
- rt = 0x12345678;
- result = 0x009102B3;
-
- __asm
- ("shrlv.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rt), "r"(rs)
- );
- if (rd != result) {
- printf("shrlv.ph error!\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0x456709AB;
-
- __asm
- ("subqh.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("subqh.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0x456809AC;
-
- __asm
- ("subqh_r.ph %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("subqh_r.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main()
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0x456789AC;
-
- __asm
- ("subqh_r.w %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("subqh_r.w error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0x456789AB;
-
- __asm
- ("subqh.w %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("subqh.w error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x87654321;
- rt = 0x12345678;
- result = 0x7531ECA9;
- resultdsp = 0x01;
-
- __asm
- ("subu.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 20) & 0x01;
- if (dsp != resultdsp || rd != result) {
- printf("subu.ph error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dspreg, result, dspresult;
- rs = 0x123456789ABCDEF0;
- rt = 0x123456789ABCDEF1;
- result = 0x000000000000000F;
- dspresult = 0x01;
-
- __asm("subu.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
- if ((rd != result) || (dspreg != dspresult)) {
- printf("subu.qh error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dsp;
- long long result, resultdsp;
-
- rs = 0x87654321;
- rt = 0x12345678;
- result = 0x75310000;
- resultdsp = 0x01;
-
- __asm
- ("subu_s.ph %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dsp)
- : "r"(rs), "r"(rt)
- );
- dsp = (dsp >> 20) & 0x01;
- if (dsp != resultdsp || rd != result) {
- printf("subu_s.ph error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, dspreg, result, dspresult;
- rs = 0x1111111111111111;
- rt = 0x2222222222222222;
- result = 0x1111111111111111;
- dspresult = 0x00;
-
- __asm("subu_s.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
- if ((rd != result) || (dspreg != dspresult)) {
- printf("subu_s.qh error\n\t");
- return -1;
- }
-
-
- rs = 0x8888888888888888;
- rt = 0xa888a888a888a888;
- result = 0x0000000000000000;
- dspresult = 0x01;
-
- __asm("subu_s.qh %0, %2, %3\n\t"
- "rddsp %1\n\t"
- : "=r"(rd), "=r"(dspreg)
- : "r"(rs), "r"(rt)
- );
-
- dspreg = ((dspreg >> 20) & 0x01);
- if ((rd != result) || (dspreg != dspresult)) {
- printf("subu_s.qh error\n\t");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result;
-
- rd = 0x0;
- rs = 0x246856789ABCDEF0;
- rt = 0x123456789ABCDEF0;
- result = 0x091A000000000000;
-
- __asm("subuh.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("subuh.ob error\n");
- return -1;
- }
-
- rs = 0x246856789ABCDEF0;
- rt = 0x1131517191B1D1F1;
- result = 0x1b4f2d2d51637577;
-
- __asm("subuh.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("subuh.ob error\n");
- return -1;
- }
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0xC5E7092B;
-
- __asm
- ("subuh.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("subuh.qb wrong\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include "io.h"
-
-int main(void)
-{
- long long rd, rs, rt, result;
-
- rd = 0x0;
- rs = 0x246956789ABCDEF0;
- rt = 0x123456789ABCDEF0;
- result = 0x091B000000000000;
-
- __asm("subuh.ob %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
-
- if (rd != result) {
- printf("subuh.ob error\n");
- return -1;
- }
-
- return 0;
-}
+++ /dev/null
-#include"io.h"
-
-int main(void)
-{
- long long rd, rs, rt;
- long long result;
-
- rs = 0x12345678;
- rt = 0x87654321;
- result = 0xC6E80A2C;
-
- __asm
- ("subuh_r.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("1 subuh_r.qb wrong\n");
- return -1;
- }
-
- rs = 0xBEFC292A;
- rt = 0x9205C1B4;
- result = 0x167cb4bb;
-
- __asm
- ("subuh_r.qb %0, %1, %2\n\t"
- : "=r"(rd)
- : "r"(rs), "r"(rt)
- );
- if (rd != result) {
- printf("2 subuh_r.qb wrong\n");
- return -1;
- }
-
- return 0;
-}
--- /dev/null
+-include ../../../../config-host.mak
+
+CROSS=mips64el-unknown-linux-gnu-
+
+SIM=qemu-mipsel
+SIM_FLAGS=-cpu 74Kf
+
+CC = $(CROSS)gcc
+CFLAGS = -EL -mabi=32 -march=mips32r2 -mgp32 -mdsp -mdspr2 -static
+
+TESTCASES = test_dsp_r1_absq_s_ph.tst
+TESTCASES += test_dsp_r1_absq_s_w.tst
+TESTCASES += test_dsp_r1_addq_ph.tst
+TESTCASES += test_dsp_r1_addq_s_ph.tst
+TESTCASES += test_dsp_r1_addq_s_w.tst
+TESTCASES += test_dsp_r1_addsc.tst
+TESTCASES += test_dsp_r1_addu_qb.tst
+TESTCASES += test_dsp_r1_addu_s_qb.tst
+TESTCASES += test_dsp_r1_addwc.tst
+TESTCASES += test_dsp_r1_bitrev.tst
+TESTCASES += test_dsp_r1_bposge32.tst
+TESTCASES += test_dsp_r1_cmp_eq_ph.tst
+TESTCASES += test_dsp_r1_cmpgu_eq_qb.tst
+TESTCASES += test_dsp_r1_cmpgu_le_qb.tst
+TESTCASES += test_dsp_r1_cmpgu_lt_qb.tst
+TESTCASES += test_dsp_r1_cmp_le_ph.tst
+TESTCASES += test_dsp_r1_cmp_lt_ph.tst
+TESTCASES += test_dsp_r1_cmpu_eq_qb.tst
+TESTCASES += test_dsp_r1_cmpu_le_qb.tst
+TESTCASES += test_dsp_r1_cmpu_lt_qb.tst
+TESTCASES += test_dsp_r1_dpaq_sa_l_w.tst
+TESTCASES += test_dsp_r1_dpaq_s_w_ph.tst
+TESTCASES += test_dsp_r1_dpau_h_qbl.tst
+TESTCASES += test_dsp_r1_dpau_h_qbr.tst
+TESTCASES += test_dsp_r1_dpsq_sa_l_w.tst
+TESTCASES += test_dsp_r1_dpsq_s_w_ph.tst
+TESTCASES += test_dsp_r1_dpsu_h_qbl.tst
+TESTCASES += test_dsp_r1_dpsu_h_qbr.tst
+TESTCASES += test_dsp_r1_extp.tst
+TESTCASES += test_dsp_r1_extpdp.tst
+TESTCASES += test_dsp_r1_extpdpv.tst
+TESTCASES += test_dsp_r1_extpv.tst
+TESTCASES += test_dsp_r1_extr_rs_w.tst
+TESTCASES += test_dsp_r1_extr_r_w.tst
+TESTCASES += test_dsp_r1_extr_s_h.tst
+TESTCASES += test_dsp_r1_extrv_rs_w.tst
+TESTCASES += test_dsp_r1_extrv_r_w.tst
+TESTCASES += test_dsp_r1_extrv_s_h.tst
+TESTCASES += test_dsp_r1_extrv_w.tst
+TESTCASES += test_dsp_r1_extr_w.tst
+TESTCASES += test_dsp_r1_insv.tst
+TESTCASES += test_dsp_r1_lbux.tst
+TESTCASES += test_dsp_r1_lhx.tst
+TESTCASES += test_dsp_r1_lwx.tst
+TESTCASES += test_dsp_r1_madd.tst
+TESTCASES += test_dsp_r1_maddu.tst
+TESTCASES += test_dsp_r1_maq_sa_w_phl.tst
+TESTCASES += test_dsp_r1_maq_sa_w_phr.tst
+TESTCASES += test_dsp_r1_maq_s_w_phl.tst
+TESTCASES += test_dsp_r1_maq_s_w_phr.tst
+TESTCASES += test_dsp_r1_mfhi.tst
+TESTCASES += test_dsp_r1_mflo.tst
+TESTCASES += test_dsp_r1_modsub.tst
+TESTCASES += test_dsp_r1_msub.tst
+TESTCASES += test_dsp_r1_msubu.tst
+TESTCASES += test_dsp_r1_mthi.tst
+TESTCASES += test_dsp_r1_mthlip.tst
+TESTCASES += test_dsp_r1_mtlo.tst
+TESTCASES += test_dsp_r1_muleq_s_w_phl.tst
+TESTCASES += test_dsp_r1_muleq_s_w_phr.tst
+TESTCASES += test_dsp_r1_muleu_s_ph_qbl.tst
+TESTCASES += test_dsp_r1_muleu_s_ph_qbr.tst
+TESTCASES += test_dsp_r1_mulq_rs_ph.tst
+TESTCASES += test_dsp_r1_mult.tst
+TESTCASES += test_dsp_r1_multu.tst
+TESTCASES += test_dsp_r1_packrl_ph.tst
+TESTCASES += test_dsp_r1_pick_ph.tst
+TESTCASES += test_dsp_r1_pick_qb.tst
+TESTCASES += test_dsp_r1_precequ_ph_qbla.tst
+TESTCASES += test_dsp_r1_precequ_ph_qbl.tst
+TESTCASES += test_dsp_r1_precequ_ph_qbra.tst
+TESTCASES += test_dsp_r1_precequ_ph_qbr.tst
+TESTCASES += test_dsp_r1_preceq_w_phl.tst
+TESTCASES += test_dsp_r1_preceq_w_phr.tst
+TESTCASES += test_dsp_r1_preceu_ph_qbla.tst
+TESTCASES += test_dsp_r1_preceu_ph_qbl.tst
+TESTCASES += test_dsp_r1_preceu_ph_qbra.tst
+TESTCASES += test_dsp_r1_preceu_ph_qbr.tst
+TESTCASES += test_dsp_r1_precrq_ph_w.tst
+TESTCASES += test_dsp_r1_precrq_qb_ph.tst
+TESTCASES += test_dsp_r1_precrq_rs_ph_w.tst
+TESTCASES += test_dsp_r1_precrqu_s_qb_ph.tst
+TESTCASES += test_dsp_r1_raddu_w_qb.tst
+TESTCASES += test_dsp_r1_rddsp.tst
+TESTCASES += test_dsp_r1_repl_ph.tst
+TESTCASES += test_dsp_r1_repl_qb.tst
+TESTCASES += test_dsp_r1_replv_ph.tst
+TESTCASES += test_dsp_r1_replv_qb.tst
+TESTCASES += test_dsp_r1_shilo.tst
+TESTCASES += test_dsp_r1_shilov.tst
+TESTCASES += test_dsp_r1_shll_ph.tst
+TESTCASES += test_dsp_r1_shll_qb.tst
+TESTCASES += test_dsp_r1_shll_s_ph.tst
+TESTCASES += test_dsp_r1_shll_s_w.tst
+TESTCASES += test_dsp_r1_shllv_ph.tst
+TESTCASES += test_dsp_r1_shllv_qb.tst
+TESTCASES += test_dsp_r1_shllv_s_ph.tst
+TESTCASES += test_dsp_r1_shllv_s_w.tst
+TESTCASES += test_dsp_r1_shra_ph.tst
+TESTCASES += test_dsp_r1_shra_r_ph.tst
+TESTCASES += test_dsp_r1_shra_r_w.tst
+TESTCASES += test_dsp_r1_shrav_ph.tst
+TESTCASES += test_dsp_r1_shrav_r_ph.tst
+TESTCASES += test_dsp_r1_shrav_r_w.tst
+TESTCASES += test_dsp_r1_shrl_qb.tst
+TESTCASES += test_dsp_r1_shrlv_qb.tst
+TESTCASES += test_dsp_r1_subq_ph.tst
+TESTCASES += test_dsp_r1_subq_s_ph.tst
+TESTCASES += test_dsp_r1_subq_s_w.tst
+TESTCASES += test_dsp_r1_subu_qb.tst
+TESTCASES += test_dsp_r1_subu_s_qb.tst
+TESTCASES += test_dsp_r1_wrdsp.tst
+TESTCASES += test_dsp_r2_absq_s_qb.tst
+TESTCASES += test_dsp_r2_addqh_ph.tst
+TESTCASES += test_dsp_r2_addqh_r_ph.tst
+TESTCASES += test_dsp_r2_addqh_r_w.tst
+TESTCASES += test_dsp_r2_addqh_w.tst
+TESTCASES += test_dsp_r2_adduh_qb.tst
+TESTCASES += test_dsp_r2_adduh_r_qb.tst
+TESTCASES += test_dsp_r2_addu_ph.tst
+TESTCASES += test_dsp_r2_addu_s_ph.tst
+TESTCASES += test_dsp_r2_append.tst
+TESTCASES += test_dsp_r2_balign.tst
+TESTCASES += test_dsp_r2_cmpgdu_eq_qb.tst
+TESTCASES += test_dsp_r2_cmpgdu_le_qb.tst
+TESTCASES += test_dsp_r2_cmpgdu_lt_qb.tst
+TESTCASES += test_dsp_r2_dpaqx_sa_w_ph.tst
+TESTCASES += test_dsp_r2_dpa_w_ph.tst
+TESTCASES += test_dsp_r2_dpax_w_ph.tst
+TESTCASES += test_dsp_r2_dpaqx_s_w_ph.tst
+TESTCASES += test_dsp_r2_dpsqx_sa_w_ph.tst
+TESTCASES += test_dsp_r2_dpsqx_s_w_ph.tst
+TESTCASES += test_dsp_r2_dps_w_ph.tst
+TESTCASES += test_dsp_r2_dpsx_w_ph.tst
+TESTCASES += test_dsp_r2_mul_ph.tst
+TESTCASES += test_dsp_r2_mulq_rs_w.tst
+TESTCASES += test_dsp_r2_mulq_s_ph.tst
+TESTCASES += test_dsp_r2_mulq_s_w.tst
+TESTCASES += test_dsp_r2_mulsaq_s_w_ph.tst
+TESTCASES += test_dsp_r2_mulsa_w_ph.tst
+TESTCASES += test_dsp_r2_mul_s_ph.tst
+TESTCASES += test_dsp_r2_precr_qb_ph.tst
+TESTCASES += test_dsp_r2_precr_sra_ph_w.tst
+TESTCASES += test_dsp_r2_precr_sra_r_ph_w.tst
+TESTCASES += test_dsp_r2_prepend.tst
+TESTCASES += test_dsp_r2_shra_qb.tst
+TESTCASES += test_dsp_r2_shra_r_qb.tst
+TESTCASES += test_dsp_r2_shrav_qb.tst
+TESTCASES += test_dsp_r2_shrav_r_qb.tst
+TESTCASES += test_dsp_r2_shrl_ph.tst
+TESTCASES += test_dsp_r2_shrlv_ph.tst
+TESTCASES += test_dsp_r2_subqh_ph.tst
+TESTCASES += test_dsp_r2_subqh_r_ph.tst
+TESTCASES += test_dsp_r2_subqh_r_w.tst
+TESTCASES += test_dsp_r2_subqh_w.tst
+TESTCASES += test_dsp_r2_subuh_qb.tst
+TESTCASES += test_dsp_r2_subuh_r_qb.tst
+TESTCASES += test_dsp_r2_subu_ph.tst
+TESTCASES += test_dsp_r2_subu_s_ph.tst
+
+
+all: $(TESTCASES)
+
+%.tst: %.c
+ $(CC) $(CFLAGS) $< -o $@
+
+check: $(TESTCASES)
+ @for case in $(TESTCASES); do \
+ echo $(SIM) $(SIM_FLAGS) ./$$case;\
+ $(SIM) $(SIM_FLAGS) ./$$case; \
+ done
+
+clean:
+ $(RM) -rf $(TESTCASES)
--include ../../config-host.mak
+-include ../../../../config-host.mak
CROSS=mipsr5900el-unknown-linux-gnu-
CC = $(CROSS)gcc
CFLAGS = -Wall -mabi=32 -march=r5900 -static
-TESTCASES = div1.tst
-TESTCASES += divu1.tst
-TESTCASES += madd.tst
-TESTCASES += maddu.tst
-TESTCASES += mflohi1.tst
-TESTCASES += mtlohi1.tst
-TESTCASES += mult.tst
-TESTCASES += multu.tst
+TESTCASES = test_r5900_div1.tst
+TESTCASES += test_r5900_divu1.tst
+TESTCASES += test_r5900_madd.tst
+TESTCASES += test_r5900_maddu.tst
+TESTCASES += test_r5900_mflohi1.tst
+TESTCASES += test_r5900_mtlohi1.tst
+TESTCASES += test_r5900_mult.tst
+TESTCASES += test_r5900_multu.tst
all: $(TESTCASES)
static void test_io_channel_setup_sync(SocketAddress *listen_addr,
SocketAddress *connect_addr,
+ QIOChannel **srv,
QIOChannel **src,
QIOChannel **dst)
{
test_io_channel_set_socket_bufs(*src, *dst);
- object_unref(OBJECT(lioc));
+ *srv = QIO_CHANNEL(lioc);
}
static void test_io_channel_setup_async(SocketAddress *listen_addr,
SocketAddress *connect_addr,
+ QIOChannel **srv,
QIOChannel **src,
QIOChannel **dst)
{
qio_channel_set_delay(*src, false);
test_io_channel_set_socket_bufs(*src, *dst);
- object_unref(OBJECT(lioc));
+ *srv = QIO_CHANNEL(lioc);
g_main_loop_unref(data.loop);
}
+static void test_io_channel_socket_path_exists(SocketAddress *addr,
+ bool expectExists)
+{
+ if (addr->type != SOCKET_ADDRESS_TYPE_UNIX) {
+ return;
+ }
+
+ g_assert(g_file_test(addr->u.q_unix.path,
+ G_FILE_TEST_EXISTS) == expectExists);
+}
+
+
static void test_io_channel(bool async,
SocketAddress *listen_addr,
SocketAddress *connect_addr,
bool passFD)
{
- QIOChannel *src, *dst;
+ QIOChannel *src, *dst, *srv;
QIOChannelTest *test;
if (async) {
- test_io_channel_setup_async(listen_addr, connect_addr, &src, &dst);
+ test_io_channel_setup_async(listen_addr, connect_addr,
+ &srv, &src, &dst);
g_assert(!passFD ||
qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_FD_PASS));
g_assert(qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_SHUTDOWN));
g_assert(qio_channel_has_feature(dst, QIO_CHANNEL_FEATURE_SHUTDOWN));
+ test_io_channel_socket_path_exists(listen_addr, true);
+
test = qio_channel_test_new();
qio_channel_test_run_threads(test, true, src, dst);
qio_channel_test_validate(test);
+ test_io_channel_socket_path_exists(listen_addr, true);
+
+ /* unref without close, to ensure finalize() cleans up */
+
object_unref(OBJECT(src));
object_unref(OBJECT(dst));
+ test_io_channel_socket_path_exists(listen_addr, true);
- test_io_channel_setup_async(listen_addr, connect_addr, &src, &dst);
+ object_unref(OBJECT(srv));
+ test_io_channel_socket_path_exists(listen_addr, false);
+
+ test_io_channel_setup_async(listen_addr, connect_addr,
+ &srv, &src, &dst);
g_assert(!passFD ||
qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_FD_PASS));
qio_channel_test_run_threads(test, false, src, dst);
qio_channel_test_validate(test);
+ /* close before unref, to ensure finalize copes with already closed */
+
+ qio_channel_close(src, &error_abort);
+ qio_channel_close(dst, &error_abort);
+ test_io_channel_socket_path_exists(listen_addr, true);
+
object_unref(OBJECT(src));
object_unref(OBJECT(dst));
+ test_io_channel_socket_path_exists(listen_addr, true);
+
+ qio_channel_close(srv, &error_abort);
+ test_io_channel_socket_path_exists(listen_addr, false);
+
+ object_unref(OBJECT(srv));
+ test_io_channel_socket_path_exists(listen_addr, false);
} else {
- test_io_channel_setup_sync(listen_addr, connect_addr, &src, &dst);
+ test_io_channel_setup_sync(listen_addr, connect_addr,
+ &srv, &src, &dst);
g_assert(!passFD ||
qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_FD_PASS));
g_assert(qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_SHUTDOWN));
g_assert(qio_channel_has_feature(dst, QIO_CHANNEL_FEATURE_SHUTDOWN));
+ test_io_channel_socket_path_exists(listen_addr, true);
+
test = qio_channel_test_new();
qio_channel_test_run_threads(test, true, src, dst);
qio_channel_test_validate(test);
+ test_io_channel_socket_path_exists(listen_addr, true);
+
+ /* unref without close, to ensure finalize() cleans up */
+
object_unref(OBJECT(src));
object_unref(OBJECT(dst));
+ test_io_channel_socket_path_exists(listen_addr, true);
+
+ object_unref(OBJECT(srv));
+ test_io_channel_socket_path_exists(listen_addr, false);
- test_io_channel_setup_sync(listen_addr, connect_addr, &src, &dst);
+ test_io_channel_setup_sync(listen_addr, connect_addr,
+ &srv, &src, &dst);
g_assert(!passFD ||
qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_FD_PASS));
qio_channel_test_run_threads(test, false, src, dst);
qio_channel_test_validate(test);
+ test_io_channel_socket_path_exists(listen_addr, true);
+
+ /* close before unref, to ensure finalize copes with already closed */
+
+ qio_channel_close(src, &error_abort);
+ qio_channel_close(dst, &error_abort);
+ test_io_channel_socket_path_exists(listen_addr, true);
+
object_unref(OBJECT(src));
object_unref(OBJECT(dst));
+ test_io_channel_socket_path_exists(listen_addr, true);
+
+ qio_channel_close(srv, &error_abort);
+ test_io_channel_socket_path_exists(listen_addr, false);
+
+ object_unref(OBJECT(srv));
+ test_io_channel_socket_path_exists(listen_addr, false);
}
}
qapi_free_SocketAddress(listen_addr);
qapi_free_SocketAddress(connect_addr);
- g_assert(g_file_test(TEST_SOCKET, G_FILE_TEST_EXISTS) == FALSE);
}
{
SocketAddress *listen_addr = g_new0(SocketAddress, 1);
SocketAddress *connect_addr = g_new0(SocketAddress, 1);
- QIOChannel *src, *dst;
+ QIOChannel *src, *dst, *srv;
int testfd;
int fdsend[3];
int *fdrecv = NULL;
connect_addr->type = SOCKET_ADDRESS_TYPE_UNIX;
connect_addr->u.q_unix.path = g_strdup(TEST_SOCKET);
- test_io_channel_setup_sync(listen_addr, connect_addr, &src, &dst);
+ test_io_channel_setup_sync(listen_addr, connect_addr, &srv, &src, &dst);
memcpy(bufsend, "Hello World", G_N_ELEMENTS(bufsend));
object_unref(OBJECT(src));
object_unref(OBJECT(dst));
+ object_unref(OBJECT(srv));
qapi_free_SocketAddress(listen_addr);
qapi_free_SocketAddress(connect_addr);
unlink(TEST_SOCKET);
return d.result;
}
-/* This function is hooked as final emit function, which can verify the
- correctness. */
-static void event_test_emit(test_QAPIEvent event, QDict *d)
+void test_qapi_event_emit(test_QAPIEvent event, QDict *d)
{
QDict *t;
int64_t s, ms;
int main(int argc, char **argv)
{
- qmp_event_set_func_emit(event_test_emit);
-
g_test_init(&argc, &argv, NULL);
event_test_add("/event/event_a", test_event_a);
FIELD_EQUAL(i64_2);
}
+typedef struct TestSimpleArray {
+ uint16_t u16_1[3];
+} TestSimpleArray;
+
+/* Object instantiation, we are going to use it in more than one test */
+
+TestSimpleArray obj_simple_arr = {
+ .u16_1 = { 0x42, 0x43, 0x44 },
+};
+
+/* Description of the values. If you add a primitive type
+ you are expected to add a test here */
+
+static const VMStateDescription vmstate_simple_arr = {
+ .name = "simple/array",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT16_ARRAY(u16_1, TestSimpleArray, 3),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+uint8_t wire_simple_arr[] = {
+ /* u16_1 */ 0x00, 0x42,
+ /* u16_1 */ 0x00, 0x43,
+ /* u16_1 */ 0x00, 0x44,
+ QEMU_VM_EOF, /* just to ensure we won't get EOF reported prematurely */
+};
+
+static void obj_simple_arr_copy(void *target, void *source)
+{
+ memcpy(target, source, sizeof(TestSimpleArray));
+}
+
+static void test_simple_array(void)
+{
+ TestSimpleArray obj, obj_clone;
+
+ memset(&obj, 0, sizeof(obj));
+ save_vmstate(&vmstate_simple_arr, &obj_simple_arr);
+
+ compare_vmstate(wire_simple_arr, sizeof(wire_simple_arr));
+
+ SUCCESS(load_vmstate(&vmstate_simple_arr, &obj, &obj_clone,
+ obj_simple_arr_copy, 1, wire_simple_arr,
+ sizeof(wire_simple_arr)));
+}
+
typedef struct TestStruct {
uint32_t a, b, c, e;
uint64_t d, f;
g_test_init(&argc, &argv, NULL);
g_test_add_func("/vmstate/simple/primitive", test_simple_primitive);
+ g_test_add_func("/vmstate/simple/array", test_simple_array);
g_test_add_func("/vmstate/versioned/load/v1", test_load_v1);
g_test_add_func("/vmstate/versioned/load/v2", test_load_v2);
g_test_add_func("/vmstate/field_exists/load/noskip", test_load_noskip);
#include "sysemu/sysemu.h"
#include "ui/input.h"
#include "qom/object_interfaces.h"
+#include "sysemu/iothread.h"
+#include "block/aio.h"
#include <sys/ioctl.h>
#include "standard-headers/linux/input.h"
struct input_event event;
int read_offset;
+ enum GrabToggleKeys grab_toggle;
+
QTAILQ_ENTRY(InputLinux) next;
};
}
}
+static bool input_linux_check_toggle(InputLinux *il)
+{
+ switch (il->grab_toggle) {
+ case GRAB_TOGGLE_KEYS_CTRL_CTRL:
+ return il->keydown[KEY_LEFTCTRL] &&
+ il->keydown[KEY_RIGHTCTRL];
+
+ case GRAB_TOGGLE_KEYS_ALT_ALT:
+ return il->keydown[KEY_LEFTALT] &&
+ il->keydown[KEY_RIGHTALT];
+
+ case GRAB_TOGGLE_KEYS_META_META:
+ return il->keydown[KEY_LEFTMETA] &&
+ il->keydown[KEY_RIGHTMETA];
+
+ case GRAB_TOGGLE_KEYS_SCROLLLOCK:
+ return il->keydown[KEY_SCROLLLOCK];
+
+ case GRAB_TOGGLE_KEYS_CTRL_SCROLLLOCK:
+ return (il->keydown[KEY_LEFTCTRL] ||
+ il->keydown[KEY_RIGHTCTRL]) &&
+ il->keydown[KEY_SCROLLLOCK];
+
+ case GRAB_TOGGLE_KEYS__MAX:
+ /* avoid gcc error */
+ break;
+ }
+ return false;
+}
+
+static bool input_linux_should_skip(InputLinux *il,
+ struct input_event *event)
+{
+ return (il->grab_toggle == GRAB_TOGGLE_KEYS_SCROLLLOCK ||
+ il->grab_toggle == GRAB_TOGGLE_KEYS_CTRL_SCROLLLOCK) &&
+ event->code == KEY_SCROLLLOCK;
+}
+
static void input_linux_handle_keyboard(InputLinux *il,
struct input_event *event)
{
}
/* send event to guest when grab is active */
- if (il->grab_active) {
+ if (il->grab_active && !input_linux_should_skip(il, event)) {
int qcode = qemu_input_linux_to_qcode(event->code);
qemu_input_event_send_key_qcode(NULL, qcode, event->value);
}
/* hotkey -> record switch request ... */
- if (il->keydown[KEY_LEFTCTRL] &&
- il->keydown[KEY_RIGHTCTRL]) {
+ if (input_linux_check_toggle(il)) {
il->grab_request = true;
}
il->repeat = value;
}
+static int input_linux_get_grab_toggle(Object *obj, Error **errp)
+{
+ InputLinux *il = INPUT_LINUX(obj);
+
+ return il->grab_toggle;
+}
+
+static void input_linux_set_grab_toggle(Object *obj, int value,
+ Error **errp)
+{
+ InputLinux *il = INPUT_LINUX(obj);
+
+ il->grab_toggle = value;
+}
+
static void input_linux_instance_init(Object *obj)
{
object_property_add_str(obj, "evdev",
object_property_add_bool(obj, "repeat",
input_linux_get_repeat,
input_linux_set_repeat, NULL);
+ object_property_add_enum(obj, "grab-toggle", "GrabToggleKeys",
+ &GrabToggleKeys_lookup,
+ input_linux_get_grab_toggle,
+ input_linux_set_grab_toggle, NULL);
}
static void input_linux_class_init(ObjectClass *oc, void *data)
}
}
-static int qemu_signal_init(void)
+static int qemu_signal_init(Error **errp)
{
int sigfd;
sigset_t set;
sigdelset(&set, SIG_IPI);
sigfd = qemu_signalfd(&set);
if (sigfd == -1) {
- fprintf(stderr, "failed to create signalfd\n");
+ error_setg_errno(errp, errno, "failed to create signalfd");
return -errno;
}
#else /* _WIN32 */
-static int qemu_signal_init(void)
+static int qemu_signal_init(Error **errp)
{
return 0;
}
init_clocks(qemu_timer_notify_cb);
- ret = qemu_signal_init();
+ ret = qemu_signal_init(errp);
if (ret) {
return ret;
}
#include "qemu/timer.h"
#include "block/aio.h"
-typedef struct CoSleepCB {
- QEMUTimer *ts;
- Coroutine *co;
-} CoSleepCB;
-
static void co_sleep_cb(void *opaque)
{
- CoSleepCB *sleep_cb = opaque;
+ Coroutine *co = opaque;
/* Write of schedule protected by barrier write in aio_co_schedule */
- atomic_set(&sleep_cb->co->scheduled, NULL);
- aio_co_wake(sleep_cb->co);
+ atomic_set(&co->scheduled, NULL);
+ aio_co_wake(co);
}
void coroutine_fn qemu_co_sleep_ns(QEMUClockType type, int64_t ns)
{
AioContext *ctx = qemu_get_current_aio_context();
- CoSleepCB sleep_cb = {
- .co = qemu_coroutine_self(),
- };
+ QEMUTimer *ts;
+ Coroutine *co = qemu_coroutine_self();
- const char *scheduled = atomic_cmpxchg(&sleep_cb.co->scheduled, NULL,
- __func__);
+ const char *scheduled = atomic_cmpxchg(&co->scheduled, NULL, __func__);
if (scheduled) {
fprintf(stderr,
"%s: Co-routine was already scheduled in '%s'\n",
__func__, scheduled);
abort();
}
- sleep_cb.ts = aio_timer_new(ctx, type, SCALE_NS, co_sleep_cb, &sleep_cb);
- timer_mod(sleep_cb.ts, qemu_clock_get_ns(type) + ns);
+ ts = aio_timer_new(ctx, type, SCALE_NS, co_sleep_cb, co);
+ timer_mod(ts, qemu_clock_get_ns(type) + ns);
qemu_coroutine_yield();
- timer_del(sleep_cb.ts);
- timer_free(sleep_cb.ts);
+ timer_del(ts);
+ timer_free(ts);
}
projects / thirdparty / qemu.git / commitdiff
