2008-03-28 Paul Brook <paul@codesourcery.com>

	gas/
	* config/tc-arm.c (parse_neon_mov): Parse register before immediate
	to avoid spurious symbols.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index d5a6e2b56dfe2b1e9e814298b4ebf77d6ceb1049..8d1b4a2af1855abe981eb098b449f89dade1c649 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2008-03-28  Paul Brook  <paul@codesourcery.com>
+
+       * config/tc-arm.c (parse_neon_mov): Parse register before immediate
+       to avoid spurious symbols.
+
 2008-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 
        * config/tc-m68k.c (md_convert_frag_1): Replace as_fatal with
@@ -21,15 +26,15 @@
        instructions. And call yyerror when comparing PREG with
        DREG.
        (check_macfunc_option): New.
-       (check_macfuncs): Check option by calling check_macfunc_option.
+       (check_macfuncs): Check option by calling check_macfunc_option.
        Fix comparison always true warnings.  Both scalar instructions
        of vector instruction must share the same mode option.  Only allow
        option mode at the end of the second instruction of the vector.
-       (asm_1): Check option by calling check_macfunc_option.
+       (asm_1): Check option by calling check_macfunc_option.
 
        * config/bfin-parse.y (check_macfunc_option): Allow (IU)
        option for multiply and multiply-accumulate to data register
-       instruction.
+       instruction.
        (check_macfuncs): Don't check if accumulator matches the data register
        here.
        (assign_macfunc): Check if accumulator matches the

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 3fbbdeb3a94e3e73f27ca72ffc2db98aef44d3c2..8965356ac654673d1b936f7e7a986fbc659a7b1c 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -5209,16 +5209,6 @@ parse_neon_mov (char **str, int *which_operand)
               inst.operands[i].present = 1;
             }
         }
-      else if (parse_qfloat_immediate (&ptr, &inst.operands[i].imm) == SUCCESS)
-          /* Case 2: VMOV<c><q>.<dt> <Qd>, #<float-imm>
-             Case 3: VMOV<c><q>.<dt> <Dd>, #<float-imm>
-             Case 10: VMOV.F32 <Sd>, #<imm>
-             Case 11: VMOV.F64 <Dd>, #<imm>  */
-        inst.operands[i].immisfloat = 1;
-      else if (parse_big_immediate (&ptr, i) == SUCCESS)
-          /* Case 2: VMOV<c><q>.<dt> <Qd>, #<imm>
-             Case 3: VMOV<c><q>.<dt> <Dd>, #<imm>  */
-        ;
       else if ((val = arm_typed_reg_parse (&ptr, REG_TYPE_NSDQ, &rtype,
                                            &optype)) != FAIL)
         {
@@ -5258,6 +5248,16 @@ parse_neon_mov (char **str, int *which_operand)
               inst.operands[i++].present = 1;
             }
         }
+      else if (parse_qfloat_immediate (&ptr, &inst.operands[i].imm) == SUCCESS)
+          /* Case 2: VMOV<c><q>.<dt> <Qd>, #<float-imm>
+             Case 3: VMOV<c><q>.<dt> <Dd>, #<float-imm>
+             Case 10: VMOV.F32 <Sd>, #<imm>
+             Case 11: VMOV.F64 <Dd>, #<imm>  */
+        inst.operands[i].immisfloat = 1;
+      else if (parse_big_immediate (&ptr, i) == SUCCESS)
+          /* Case 2: VMOV<c><q>.<dt> <Qd>, #<imm>
+             Case 3: VMOV<c><q>.<dt> <Dd>, #<imm>  */
+        ;
       else
         {
           first_error (_("expected <Rm> or <Dm> or <Qm> operand"));