usb: dwc3: pci: Sort out the Intel device IDs

The PCI device IDs were organised based on the Intel
architecture generation in most cases, but not with every
ID. That left the device ID table with no real order.
Sorting the table based on the device ID.

Suggested-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Cc: stable <stable@kernel.org>
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Link: https://patch.msgid.link/20251107121548.2702900-1-heikki.krogerus@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
index c2bab6d4d507f96cb571ed7dc14798d8a28a1336..8f5faf632a8bfa604ff89840c5016d2e713af7bd 100644 (file)
--- a/drivers/usb/dwc3/dwc3-pci.c
+++ b/drivers/usb/dwc3/dwc3-pci.c
@@ -21,41 +21,41 @@
 #include <linux/acpi.h>
 #include <linux/delay.h>
 
+#define PCI_DEVICE_ID_INTEL_CMLLP              0x02ee
+#define PCI_DEVICE_ID_INTEL_CMLH               0x06ee
+#define PCI_DEVICE_ID_INTEL_BXT                        0x0aaa
 #define PCI_DEVICE_ID_INTEL_BYT                        0x0f37
 #define PCI_DEVICE_ID_INTEL_MRFLD              0x119e
-#define PCI_DEVICE_ID_INTEL_BSW                        0x22b7
-#define PCI_DEVICE_ID_INTEL_SPTLP              0x9d30
-#define PCI_DEVICE_ID_INTEL_SPTH               0xa130
-#define PCI_DEVICE_ID_INTEL_BXT                        0x0aaa
 #define PCI_DEVICE_ID_INTEL_BXT_M              0x1aaa
-#define PCI_DEVICE_ID_INTEL_APL                        0x5aaa
-#define PCI_DEVICE_ID_INTEL_KBP                        0xa2b0
-#define PCI_DEVICE_ID_INTEL_CMLLP              0x02ee
-#define PCI_DEVICE_ID_INTEL_CMLH               0x06ee
+#define PCI_DEVICE_ID_INTEL_BSW                        0x22b7
 #define PCI_DEVICE_ID_INTEL_GLK                        0x31aa
-#define PCI_DEVICE_ID_INTEL_CNPLP              0x9dee
-#define PCI_DEVICE_ID_INTEL_CNPH               0xa36e
-#define PCI_DEVICE_ID_INTEL_CNPV               0xa3b0
 #define PCI_DEVICE_ID_INTEL_ICLLP              0x34ee
-#define PCI_DEVICE_ID_INTEL_EHL                        0x4b7e
-#define PCI_DEVICE_ID_INTEL_TGPLP              0xa0ee
 #define PCI_DEVICE_ID_INTEL_TGPH               0x43ee
-#define PCI_DEVICE_ID_INTEL_JSP                        0x4dee
-#define PCI_DEVICE_ID_INTEL_WCL                        0x4d7e
 #define PCI_DEVICE_ID_INTEL_ADL                        0x460e
-#define PCI_DEVICE_ID_INTEL_ADL_PCH            0x51ee
 #define PCI_DEVICE_ID_INTEL_ADLN               0x465e
+#define PCI_DEVICE_ID_INTEL_EHL                        0x4b7e
+#define PCI_DEVICE_ID_INTEL_WCL                        0x4d7e
+#define PCI_DEVICE_ID_INTEL_JSP                        0x4dee
+#define PCI_DEVICE_ID_INTEL_ADL_PCH            0x51ee
 #define PCI_DEVICE_ID_INTEL_ADLN_PCH           0x54ee
-#define PCI_DEVICE_ID_INTEL_ADLS               0x7ae1
-#define PCI_DEVICE_ID_INTEL_RPL                        0xa70e
+#define PCI_DEVICE_ID_INTEL_APL                        0x5aaa
+#define PCI_DEVICE_ID_INTEL_NVLS_PCH           0x6e6f
+#define PCI_DEVICE_ID_INTEL_ARLH_PCH           0x777e
 #define PCI_DEVICE_ID_INTEL_RPLS               0x7a61
+#define PCI_DEVICE_ID_INTEL_MTL                        0x7e7e
+#define PCI_DEVICE_ID_INTEL_ADLS               0x7ae1
 #define PCI_DEVICE_ID_INTEL_MTLM               0x7eb1
 #define PCI_DEVICE_ID_INTEL_MTLP               0x7ec1
 #define PCI_DEVICE_ID_INTEL_MTLS               0x7f6f
-#define PCI_DEVICE_ID_INTEL_MTL                        0x7e7e
-#define PCI_DEVICE_ID_INTEL_NVLS_PCH           0x6e6f
-#define PCI_DEVICE_ID_INTEL_ARLH_PCH           0x777e
 #define PCI_DEVICE_ID_INTEL_TGL                        0x9a15
+#define PCI_DEVICE_ID_INTEL_SPTLP              0x9d30
+#define PCI_DEVICE_ID_INTEL_CNPLP              0x9dee
+#define PCI_DEVICE_ID_INTEL_TGPLP              0xa0ee
+#define PCI_DEVICE_ID_INTEL_SPTH               0xa130
+#define PCI_DEVICE_ID_INTEL_KBP                        0xa2b0
+#define PCI_DEVICE_ID_INTEL_CNPH               0xa36e
+#define PCI_DEVICE_ID_INTEL_CNPV               0xa3b0
+#define PCI_DEVICE_ID_INTEL_RPL                        0xa70e
 #define PCI_DEVICE_ID_INTEL_PTLH               0xe332
 #define PCI_DEVICE_ID_INTEL_PTLH_PCH           0xe37e
 #define PCI_DEVICE_ID_INTEL_PTLU               0xe432
@@ -413,41 +413,41 @@ static void dwc3_pci_remove(struct pci_dev *pci)
 }
 
 static const struct pci_device_id dwc3_pci_id_table[] = {
-       { PCI_DEVICE_DATA(INTEL, BSW, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, BYT, &dwc3_pci_intel_byt_swnode) },
-       { PCI_DEVICE_DATA(INTEL, MRFLD, &dwc3_pci_intel_mrfld_swnode) },
        { PCI_DEVICE_DATA(INTEL, CMLLP, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, CMLH, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, SPTLP, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, SPTH, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, BXT, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, BYT, &dwc3_pci_intel_byt_swnode) },
+       { PCI_DEVICE_DATA(INTEL, MRFLD, &dwc3_pci_intel_mrfld_swnode) },
        { PCI_DEVICE_DATA(INTEL, BXT_M, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, APL, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, KBP, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, BSW, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, GLK, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, CNPLP, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, CNPH, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, CNPV, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, ICLLP, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, EHL, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, TGPLP, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, TGPH, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, JSP, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, WCL, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, ADL, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, ADL_PCH, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, ADLN, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, EHL, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, WCL, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, JSP, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, ADL_PCH, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, ADLN_PCH, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, ADLS, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, RPL, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, APL, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, NVLS_PCH, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, ARLH_PCH, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, RPLS, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, MTL, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, ADLS, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, MTLM, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, MTLP, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, MTL, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, NVLS_PCH, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, MTLS, &dwc3_pci_intel_swnode) },
-       { PCI_DEVICE_DATA(INTEL, ARLH_PCH, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, TGL, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, SPTLP, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, CNPLP, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, TGPLP, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, SPTH, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, KBP, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, CNPH, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, CNPV, &dwc3_pci_intel_swnode) },
+       { PCI_DEVICE_DATA(INTEL, RPL, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, PTLH, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, PTLH_PCH, &dwc3_pci_intel_swnode) },
        { PCI_DEVICE_DATA(INTEL, PTLU, &dwc3_pci_intel_swnode) },