--- /dev/null
+From 6eda477b3c54b8236868c8784e5e042ff14244f0 Mon Sep 17 00:00:00 2001
+From: Mischa Jonker <mjonker@synopsys.com>
+Date: Thu, 16 May 2013 19:36:08 +0200
+Subject: ARC: [nsimosci] Change .dts to use generic 8250 UART
+
+From: Mischa Jonker <mjonker@synopsys.com>
+
+commit 6eda477b3c54b8236868c8784e5e042ff14244f0 upstream.
+
+The Synopsys APB DW UART has a couple of special features that are not
+in the System C model. In 3.8, the 8250_dw driver didn't really use these
+features, but from 3.9 onwards, the 8250_dw driver has become incompatible
+with our model.
+
+Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
+Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
+Cc: Francois Bedard <Francois.Bedard@synopsys.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arc/boot/dts/nsimosci.dts | 7 +++----
+ 1 file changed, 3 insertions(+), 4 deletions(-)
+
+--- a/arch/arc/boot/dts/nsimosci.dts
++++ b/arch/arc/boot/dts/nsimosci.dts
+@@ -11,7 +11,7 @@
+
+ / {
+ compatible = "snps,nsimosci";
+- clock-frequency = <80000000>; /* 80 MHZ */
++ clock-frequency = <20000000>; /* 20 MHZ */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&intc>;
+@@ -44,15 +44,14 @@
+ };
+
+ uart0: serial@c0000000 {
+- compatible = "snps,dw-apb-uart";
++ compatible = "ns8250";
+ reg = <0xc0000000 0x2000>;
+ interrupts = <11>;
+- #clock-frequency = <80000000>;
+ clock-frequency = <3686400>;
+ baud = <115200>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+- status = "okay";
++ no-loopback-test = <1>;
+ };
+
+ pgu0: pgu@c9000000 {
--- /dev/null
+From 61fb4bfc010b0d2940f7fd87acbce6a0f03217cb Mon Sep 17 00:00:00 2001
+From: Vineet Gupta <vgupta@synopsys.com>
+Date: Sat, 5 Apr 2014 15:30:22 +0530
+Subject: ARC: [nsimosci] Unbork console
+
+From: Vineet Gupta <vgupta@synopsys.com>
+
+commit 61fb4bfc010b0d2940f7fd87acbce6a0f03217cb upstream.
+
+Despite the switch to right UART driver (prev patch), serial console
+still doesn't work due to missing CONFIG_SERIAL_OF_PLATFORM
+
+Also fix the default cmdline in DT to not refer to out-of-tree
+ARC framebuffer driver for console.
+
+Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
+Cc: Francois Bedard <Francois.Bedard@synopsys.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arc/boot/dts/nsimosci.dts | 5 ++++-
+ arch/arc/configs/nsimosci_defconfig | 1 +
+ 2 files changed, 5 insertions(+), 1 deletion(-)
+
+--- a/arch/arc/boot/dts/nsimosci.dts
++++ b/arch/arc/boot/dts/nsimosci.dts
+@@ -17,7 +17,10 @@
+ interrupt-parent = <&intc>;
+
+ chosen {
+- bootargs = "console=tty0 consoleblank=0";
++ /* this is for console on PGU */
++ /* bootargs = "console=tty0 consoleblank=0"; */
++ /* this is for console on serial */
++ bootargs = "earlycon=uart8250,mmio32,0xc0000000,115200n8 console=ttyS0,115200n8 consoleblank=0 debug";
+ };
+
+ aliases {
+--- a/arch/arc/configs/nsimosci_defconfig
++++ b/arch/arc/configs/nsimosci_defconfig
+@@ -54,6 +54,7 @@ CONFIG_SERIO_ARC_PS2=y
+ CONFIG_SERIAL_8250=y
+ CONFIG_SERIAL_8250_CONSOLE=y
+ CONFIG_SERIAL_8250_DW=y
++CONFIG_SERIAL_OF_PLATFORM=y
+ CONFIG_SERIAL_ARC=y
+ CONFIG_SERIAL_ARC_CONSOLE=y
+ # CONFIG_HW_RANDOM is not set
--- /dev/null
+From 8ceee72808d1ae3fb191284afc2257a2be964725 Mon Sep 17 00:00:00 2001
+From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+Date: Thu, 27 Mar 2014 18:14:40 +0100
+Subject: crypto: ghash-clmulni-intel - use C implementation for setkey()
+
+From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+
+commit 8ceee72808d1ae3fb191284afc2257a2be964725 upstream.
+
+The GHASH setkey() function uses SSE registers but fails to call
+kernel_fpu_begin()/kernel_fpu_end(). Instead of adding these calls, and
+then having to deal with the restriction that they cannot be called from
+interrupt context, move the setkey() implementation to the C domain.
+
+Note that setkey() does not use any particular SSE features and is not
+expected to become a performance bottleneck.
+
+Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+Acked-by: H. Peter Anvin <hpa@linux.intel.com>
+Fixes: 0e1227d356e9b (crypto: ghash - Add PCLMULQDQ accelerated implementation)
+Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/crypto/ghash-clmulni-intel_asm.S | 29 -----------------------------
+ arch/x86/crypto/ghash-clmulni-intel_glue.c | 14 +++++++++++---
+ 2 files changed, 11 insertions(+), 32 deletions(-)
+
+--- a/arch/x86/crypto/ghash-clmulni-intel_asm.S
++++ b/arch/x86/crypto/ghash-clmulni-intel_asm.S
+@@ -24,10 +24,6 @@
+ .align 16
+ .Lbswap_mask:
+ .octa 0x000102030405060708090a0b0c0d0e0f
+-.Lpoly:
+- .octa 0xc2000000000000000000000000000001
+-.Ltwo_one:
+- .octa 0x00000001000000000000000000000001
+
+ #define DATA %xmm0
+ #define SHASH %xmm1
+@@ -134,28 +130,3 @@ ENTRY(clmul_ghash_update)
+ .Lupdate_just_ret:
+ ret
+ ENDPROC(clmul_ghash_update)
+-
+-/*
+- * void clmul_ghash_setkey(be128 *shash, const u8 *key);
+- *
+- * Calculate hash_key << 1 mod poly
+- */
+-ENTRY(clmul_ghash_setkey)
+- movaps .Lbswap_mask, BSWAP
+- movups (%rsi), %xmm0
+- PSHUFB_XMM BSWAP %xmm0
+- movaps %xmm0, %xmm1
+- psllq $1, %xmm0
+- psrlq $63, %xmm1
+- movaps %xmm1, %xmm2
+- pslldq $8, %xmm1
+- psrldq $8, %xmm2
+- por %xmm1, %xmm0
+- # reduction
+- pshufd $0b00100100, %xmm2, %xmm1
+- pcmpeqd .Ltwo_one, %xmm1
+- pand .Lpoly, %xmm1
+- pxor %xmm1, %xmm0
+- movups %xmm0, (%rdi)
+- ret
+-ENDPROC(clmul_ghash_setkey)
+--- a/arch/x86/crypto/ghash-clmulni-intel_glue.c
++++ b/arch/x86/crypto/ghash-clmulni-intel_glue.c
+@@ -30,8 +30,6 @@ void clmul_ghash_mul(char *dst, const be
+ void clmul_ghash_update(char *dst, const char *src, unsigned int srclen,
+ const be128 *shash);
+
+-void clmul_ghash_setkey(be128 *shash, const u8 *key);
+-
+ struct ghash_async_ctx {
+ struct cryptd_ahash *cryptd_tfm;
+ };
+@@ -58,13 +56,23 @@ static int ghash_setkey(struct crypto_sh
+ const u8 *key, unsigned int keylen)
+ {
+ struct ghash_ctx *ctx = crypto_shash_ctx(tfm);
++ be128 *x = (be128 *)key;
++ u64 a, b;
+
+ if (keylen != GHASH_BLOCK_SIZE) {
+ crypto_shash_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
+ return -EINVAL;
+ }
+
+- clmul_ghash_setkey(&ctx->shash, key);
++ /* perform multiplication by 'x' in GF(2^128) */
++ a = be64_to_cpu(x->a);
++ b = be64_to_cpu(x->b);
++
++ ctx->shash.a = (__be64)((b << 1) | (a >> 63));
++ ctx->shash.b = (__be64)((a << 1) | (b >> 63));
++
++ if (a >> 63)
++ ctx->shash.b ^= cpu_to_be64(0xc2);
+
+ return 0;
+ }
--- /dev/null
+From 03b8c7b623c80af264c4c8d6111e5c6289933666 Mon Sep 17 00:00:00 2001
+From: Heiko Carstens <heiko.carstens@de.ibm.com>
+Date: Sun, 2 Mar 2014 13:09:47 +0100
+Subject: futex: Allow architectures to skip futex_atomic_cmpxchg_inatomic() test
+
+From: Heiko Carstens <heiko.carstens@de.ibm.com>
+
+commit 03b8c7b623c80af264c4c8d6111e5c6289933666 upstream.
+
+If an architecture has futex_atomic_cmpxchg_inatomic() implemented and there
+is no runtime check necessary, allow to skip the test within futex_init().
+
+This allows to get rid of some code which would always give the same result,
+and also allows the compiler to optimize a couple of if statements away.
+
+Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
+Cc: Finn Thain <fthain@telegraphics.com.au>
+Cc: Geert Uytterhoeven <geert@linux-m68k.org>
+Link: http://lkml.kernel.org/r/20140302120947.GA3641@osiris
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/s390/Kconfig | 1 +
+ include/linux/futex.h | 4 ++++
+ init/Kconfig | 7 +++++++
+ kernel/futex.c | 37 ++++++++++++++++++++++++-------------
+ 4 files changed, 36 insertions(+), 13 deletions(-)
+
+--- a/arch/s390/Kconfig
++++ b/arch/s390/Kconfig
+@@ -117,6 +117,7 @@ config S390
+ select HAVE_FUNCTION_GRAPH_TRACER
+ select HAVE_FUNCTION_TRACER
+ select HAVE_FUNCTION_TRACE_MCOUNT_TEST
++ select HAVE_FUTEX_CMPXCHG if FUTEX
+ select HAVE_KERNEL_BZIP2
+ select HAVE_KERNEL_GZIP
+ select HAVE_KERNEL_LZ4
+--- a/include/linux/futex.h
++++ b/include/linux/futex.h
+@@ -55,7 +55,11 @@ union futex_key {
+ #ifdef CONFIG_FUTEX
+ extern void exit_robust_list(struct task_struct *curr);
+ extern void exit_pi_state_list(struct task_struct *curr);
++#ifdef CONFIG_HAVE_FUTEX_CMPXCHG
++#define futex_cmpxchg_enabled 1
++#else
+ extern int futex_cmpxchg_enabled;
++#endif
+ #else
+ static inline void exit_robust_list(struct task_struct *curr)
+ {
+--- a/init/Kconfig
++++ b/init/Kconfig
+@@ -1387,6 +1387,13 @@ config FUTEX
+ support for "fast userspace mutexes". The resulting kernel may not
+ run glibc-based applications correctly.
+
++config HAVE_FUTEX_CMPXCHG
++ bool
++ help
++ Architectures should select this if futex_atomic_cmpxchg_inatomic()
++ is implemented and always working. This removes a couple of runtime
++ checks.
++
+ config EPOLL
+ bool "Enable eventpoll support" if EXPERT
+ default y
+--- a/kernel/futex.c
++++ b/kernel/futex.c
+@@ -157,7 +157,9 @@
+ * enqueue.
+ */
+
++#ifndef CONFIG_HAVE_FUTEX_CMPXCHG
+ int __read_mostly futex_cmpxchg_enabled;
++#endif
+
+ /*
+ * Futex flags used to encode options to functions and preserve them across
+@@ -2880,9 +2882,28 @@ SYSCALL_DEFINE6(futex, u32 __user *, uad
+ return do_futex(uaddr, op, val, tp, uaddr2, val2, val3);
+ }
+
+-static int __init futex_init(void)
++static void __init futex_detect_cmpxchg(void)
+ {
++#ifndef CONFIG_HAVE_FUTEX_CMPXCHG
+ u32 curval;
++
++ /*
++ * This will fail and we want it. Some arch implementations do
++ * runtime detection of the futex_atomic_cmpxchg_inatomic()
++ * functionality. We want to know that before we call in any
++ * of the complex code paths. Also we want to prevent
++ * registration of robust lists in that case. NULL is
++ * guaranteed to fault and we get -EFAULT on functional
++ * implementation, the non-functional ones will return
++ * -ENOSYS.
++ */
++ if (cmpxchg_futex_value_locked(&curval, NULL, 0, 0) == -EFAULT)
++ futex_cmpxchg_enabled = 1;
++#endif
++}
++
++static int __init futex_init(void)
++{
+ unsigned int futex_shift;
+ unsigned long i;
+
+@@ -2898,18 +2919,8 @@ static int __init futex_init(void)
+ &futex_shift, NULL,
+ futex_hashsize, futex_hashsize);
+ futex_hashsize = 1UL << futex_shift;
+- /*
+- * This will fail and we want it. Some arch implementations do
+- * runtime detection of the futex_atomic_cmpxchg_inatomic()
+- * functionality. We want to know that before we call in any
+- * of the complex code paths. Also we want to prevent
+- * registration of robust lists in that case. NULL is
+- * guaranteed to fault and we get -EFAULT on functional
+- * implementation, the non-functional ones will return
+- * -ENOSYS.
+- */
+- if (cmpxchg_futex_value_locked(&curval, NULL, 0, 0) == -EFAULT)
+- futex_cmpxchg_enabled = 1;
++
++ futex_detect_cmpxchg();
+
+ for (i = 0; i < futex_hashsize; i++) {
+ atomic_set(&futex_queues[i].waiters, 0);
--- /dev/null
+From 8930b05090acd321b1fc7c642528c697cb105c42 Mon Sep 17 00:00:00 2001
+From: Eyal Shapira <eyal@wizery.com>
+Date: Sun, 16 Mar 2014 05:23:21 +0200
+Subject: iwlwifi: mvm: rs: fix search cycle rules
+
+From: Eyal Shapira <eyal@wizery.com>
+
+commit 8930b05090acd321b1fc7c642528c697cb105c42 upstream.
+
+We should explore all possible columns when searching to be
+as resilient as possible to changing conditions. This fixes
+for example a scenario where even after a sudden creation of
+rssi difference between the 2 antennas we would keep doing MIMO
+at a low rate instead of switching to SISO at a higher rate using
+the better antenna which was the optimal configuration.
+
+Signed-off-by: Eyal Shapira <eyalx.shapira@intel.com>
+Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/iwlwifi/mvm/rs.c | 36 +++++++++++++++++-----------------
+ 1 file changed, 18 insertions(+), 18 deletions(-)
+
+--- a/drivers/net/wireless/iwlwifi/mvm/rs.c
++++ b/drivers/net/wireless/iwlwifi/mvm/rs.c
+@@ -211,9 +211,9 @@ static const struct rs_tx_column rs_tx_c
+ .next_columns = {
+ RS_COLUMN_LEGACY_ANT_B,
+ RS_COLUMN_SISO_ANT_A,
++ RS_COLUMN_SISO_ANT_B,
+ RS_COLUMN_MIMO2,
+- RS_COLUMN_INVALID,
+- RS_COLUMN_INVALID,
++ RS_COLUMN_MIMO2_SGI,
+ },
+ },
+ [RS_COLUMN_LEGACY_ANT_B] = {
+@@ -221,10 +221,10 @@ static const struct rs_tx_column rs_tx_c
+ .ant = ANT_B,
+ .next_columns = {
+ RS_COLUMN_LEGACY_ANT_A,
++ RS_COLUMN_SISO_ANT_A,
+ RS_COLUMN_SISO_ANT_B,
+ RS_COLUMN_MIMO2,
+- RS_COLUMN_INVALID,
+- RS_COLUMN_INVALID,
++ RS_COLUMN_MIMO2_SGI,
+ },
+ },
+ [RS_COLUMN_SISO_ANT_A] = {
+@@ -234,8 +234,8 @@ static const struct rs_tx_column rs_tx_c
+ RS_COLUMN_SISO_ANT_B,
+ RS_COLUMN_MIMO2,
+ RS_COLUMN_SISO_ANT_A_SGI,
+- RS_COLUMN_INVALID,
+- RS_COLUMN_INVALID,
++ RS_COLUMN_SISO_ANT_B_SGI,
++ RS_COLUMN_MIMO2_SGI,
+ },
+ .checks = {
+ rs_siso_allow,
+@@ -248,8 +248,8 @@ static const struct rs_tx_column rs_tx_c
+ RS_COLUMN_SISO_ANT_A,
+ RS_COLUMN_MIMO2,
+ RS_COLUMN_SISO_ANT_B_SGI,
+- RS_COLUMN_INVALID,
+- RS_COLUMN_INVALID,
++ RS_COLUMN_SISO_ANT_A_SGI,
++ RS_COLUMN_MIMO2_SGI,
+ },
+ .checks = {
+ rs_siso_allow,
+@@ -263,8 +263,8 @@ static const struct rs_tx_column rs_tx_c
+ RS_COLUMN_SISO_ANT_B_SGI,
+ RS_COLUMN_MIMO2_SGI,
+ RS_COLUMN_SISO_ANT_A,
+- RS_COLUMN_INVALID,
+- RS_COLUMN_INVALID,
++ RS_COLUMN_SISO_ANT_B,
++ RS_COLUMN_MIMO2,
+ },
+ .checks = {
+ rs_siso_allow,
+@@ -279,8 +279,8 @@ static const struct rs_tx_column rs_tx_c
+ RS_COLUMN_SISO_ANT_A_SGI,
+ RS_COLUMN_MIMO2_SGI,
+ RS_COLUMN_SISO_ANT_B,
+- RS_COLUMN_INVALID,
+- RS_COLUMN_INVALID,
++ RS_COLUMN_SISO_ANT_A,
++ RS_COLUMN_MIMO2,
+ },
+ .checks = {
+ rs_siso_allow,
+@@ -292,10 +292,10 @@ static const struct rs_tx_column rs_tx_c
+ .ant = ANT_AB,
+ .next_columns = {
+ RS_COLUMN_SISO_ANT_A,
++ RS_COLUMN_SISO_ANT_B,
++ RS_COLUMN_SISO_ANT_A_SGI,
++ RS_COLUMN_SISO_ANT_B_SGI,
+ RS_COLUMN_MIMO2_SGI,
+- RS_COLUMN_INVALID,
+- RS_COLUMN_INVALID,
+- RS_COLUMN_INVALID,
+ },
+ .checks = {
+ rs_mimo_allow,
+@@ -307,10 +307,10 @@ static const struct rs_tx_column rs_tx_c
+ .sgi = true,
+ .next_columns = {
+ RS_COLUMN_SISO_ANT_A_SGI,
++ RS_COLUMN_SISO_ANT_B_SGI,
++ RS_COLUMN_SISO_ANT_A,
++ RS_COLUMN_SISO_ANT_B,
+ RS_COLUMN_MIMO2,
+- RS_COLUMN_INVALID,
+- RS_COLUMN_INVALID,
+- RS_COLUMN_INVALID,
+ },
+ .checks = {
+ rs_mimo_allow,
--- /dev/null
+From e571c58f313d35c56e0018470e3375ddd1fd320e Mon Sep 17 00:00:00 2001
+From: Finn Thain <fthain@telegraphics.com.au>
+Date: Thu, 6 Mar 2014 10:29:27 +1100
+Subject: m68k: Skip futex_atomic_cmpxchg_inatomic() test
+
+From: Finn Thain <fthain@telegraphics.com.au>
+
+commit e571c58f313d35c56e0018470e3375ddd1fd320e upstream.
+
+Skip the futex_atomic_cmpxchg_inatomic() test in futex_init(). It causes a
+fatal exception on 68030 (and presumably 68020 also).
+
+Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Link: http://lkml.kernel.org/r/alpine.LNX.2.00.1403061006440.5525@nippy.intranet
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/m68k/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/m68k/Kconfig
++++ b/arch/m68k/Kconfig
+@@ -17,6 +17,7 @@ config M68K
+ select FPU if MMU
+ select ARCH_WANT_IPC_PARSE_VERSION
+ select ARCH_USES_GETTIMEOFFSET if MMU && !COLDFIRE
++ select HAVE_FUTEX_CMPXCHG if MMU && FUTEX
+ select HAVE_MOD_ARCH_SPECIFIC
+ select MODULES_USE_ELF_REL
+ select MODULES_USE_ELF_RELA
isdnloop-several-buffer-overflows.patch
rds-prevent-dereference-of-a-null-device-in-rds_iw_laddr_check.patch
net-at91_ether-avoid-null-pointer-dereference.patch
+iwlwifi-mvm-rs-fix-search-cycle-rules.patch
+arc-change-.dts-to-use-generic-8250-uart.patch
+arc-unbork-console.patch
+futex-allow-architectures-to-skip-futex_atomic_cmpxchg_inatomic-test.patch
+m68k-skip-futex_atomic_cmpxchg_inatomic-test.patch
+crypto-ghash-clmulni-intel-use-c-implementation-for-setkey.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
