]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
cpufreq/amd-pstate: Only update the cached value in msr_set_epp() on success
authorMario Limonciello <mario.limonciello@amd.com>
Mon, 9 Dec 2024 18:52:40 +0000 (12:52 -0600)
committerMario Limonciello <mario.limonciello@amd.com>
Wed, 11 Dec 2024 16:44:53 +0000 (10:44 -0600)
If writing the MSR MSR_AMD_CPPC_REQ fails then the cached value in the
amd_cpudata structure should not be updated.

Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
Link: https://lore.kernel.org/r/20241209185248.16301-8-mario.limonciello@amd.com
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
drivers/cpufreq/amd-pstate.c

index fbd1b36846c52e1edb55912d859e62b46b5fbb96..ebfc9e20b6cb5a61ff3e3dba804ba56f673b48ba 100644 (file)
@@ -278,11 +278,15 @@ static int msr_set_epp(struct amd_cpudata *cpudata, u32 epp)
 
        value &= ~AMD_CPPC_EPP_PERF_MASK;
        value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);
-       WRITE_ONCE(cpudata->cppc_req_cached, value);
 
        ret = wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value);
-       if (!ret)
-               cpudata->epp_cached = epp;
+       if (ret) {
+               pr_err("failed to set energy perf value (%d)\n", ret);
+               return ret;
+       }
+
+       cpudata->epp_cached = epp;
+       WRITE_ONCE(cpudata->cppc_req_cached, value);
 
        return ret;
 }