[ARC] Fix conditional move contstraint

Move pattern (movsi_insn) allows predicated instructions to be
instructions which can hold all registers.  However, the conditional
variant doesn't.  This patch fixes this problem.

2017-03-13  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (movsi_cond_exec): Update constraint.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@246088 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f6435046c13d1908730c744bd20d5dd7e104594a..6c6676e4d95cdfc2530f15f66515412169283452 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2017-03-13  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * config/arc/arc.md (movsi_cond_exec): Update constraint.
+
 2017-03-13  Claudiu Zissulescu  <claziss@synopsys.com>
 
        * config/arc/arc.c (arc_legitimize_pic_address): Handle PIC

diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index 786febc9ebd7ff8b039088dcc33a0cf6a7e712d3..df039e6b7fa231e862f90fcd3fdb13a1752acb40 100644 (file)
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -3646,7 +3646,7 @@
      (match_operator 3 "proper_comparison_operator"
        [(match_operand 2 "cc_register" "Rcc,Rcc") (const_int 0)])
      (set (match_operand:SI 0 "dest_reg_operand" "=w,w")
-         (match_operand:SI 1 "nonmemory_operand" "Lc,?Cal")))]
+         (match_operand:SI 1 "nonmemory_operand" "LRac,?Cal")))]
   ""
   "mov.%d3 %0,%S1"
   [(set_attr "type" "cmove")