]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
x86/MCE/AMD: Add new MA_LLC, USR_DP, and USR_CP bank types
authorMuralidhara M K <muralidhara.mk@amd.com>
Thu, 2 Nov 2023 11:42:23 +0000 (11:42 +0000)
committerBorislav Petkov (AMD) <bp@alien8.de>
Tue, 28 Nov 2023 15:26:55 +0000 (16:26 +0100)
Add HWID and McaType values for new SMCA bank types.

Signed-off-by: Muralidhara M K <muralidhara.mk@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20231102114225.2006878-3-muralimk@amd.com
arch/x86/include/asm/mce.h
arch/x86/kernel/cpu/mce/amd.c

index 4ad49afca2db41fea19ddfe878dc49d408407af8..de3118305838e9ee2e80f5d432a21d15c49edf61 100644 (file)
@@ -311,6 +311,7 @@ enum smca_bank_types {
        SMCA_PIE,       /* Power, Interrupts, etc. */
        SMCA_UMC,       /* Unified Memory Controller */
        SMCA_UMC_V2,
+       SMCA_MA_LLC,    /* Memory Attached Last Level Cache */
        SMCA_PB,        /* Parameter Block */
        SMCA_PSP,       /* Platform Security Processor */
        SMCA_PSP_V2,
@@ -326,6 +327,8 @@ enum smca_bank_types {
        SMCA_SHUB,      /* System HUB Unit */
        SMCA_SATA,      /* SATA Unit */
        SMCA_USB,       /* USB Unit */
+       SMCA_USR_DP,    /* Ultra Short Reach Data Plane Controller */
+       SMCA_USR_CP,    /* Ultra Short Reach Control Plane Controller */
        SMCA_GMI_PCS,   /* GMI PCS Unit */
        SMCA_XGMI_PHY,  /* xGMI PHY Unit */
        SMCA_WAFL_PHY,  /* WAFL PHY Unit */
index f6c6c1e0a58102fd0e11f8795f9cc5014ad1ad64..2b46eb0fdf3acd1e044ebb85707652c0af85e54d 100644 (file)
@@ -102,6 +102,7 @@ static const char * const smca_names[] = {
        /* UMC v2 is separate because both of them can exist in a single system. */
        [SMCA_UMC]                      = "umc",
        [SMCA_UMC_V2]                   = "umc_v2",
+       [SMCA_MA_LLC]                   = "ma_llc",
        [SMCA_PB]                       = "param_block",
        [SMCA_PSP ... SMCA_PSP_V2]      = "psp",
        [SMCA_SMU ... SMCA_SMU_V2]      = "smu",
@@ -114,6 +115,8 @@ static const char * const smca_names[] = {
        [SMCA_SHUB]                     = "shub",
        [SMCA_SATA]                     = "sata",
        [SMCA_USB]                      = "usb",
+       [SMCA_USR_DP]                   = "usr_dp",
+       [SMCA_USR_CP]                   = "usr_cp",
        [SMCA_GMI_PCS]                  = "gmi_pcs",
        [SMCA_XGMI_PHY]                 = "xgmi_phy",
        [SMCA_WAFL_PHY]                 = "wafl_phy",
@@ -164,6 +167,7 @@ static const struct smca_hwid smca_hwid_mcatypes[] = {
        { SMCA_CS,       HWID_MCATYPE(0x2E, 0x0)        },
        { SMCA_PIE,      HWID_MCATYPE(0x2E, 0x1)        },
        { SMCA_CS_V2,    HWID_MCATYPE(0x2E, 0x2)        },
+       { SMCA_MA_LLC,   HWID_MCATYPE(0x2E, 0x4)        },
 
        /* Unified Memory Controller MCA type */
        { SMCA_UMC,      HWID_MCATYPE(0x96, 0x0)        },
@@ -198,6 +202,8 @@ static const struct smca_hwid smca_hwid_mcatypes[] = {
        { SMCA_SHUB,     HWID_MCATYPE(0x80, 0x0)        },
        { SMCA_SATA,     HWID_MCATYPE(0xA8, 0x0)        },
        { SMCA_USB,      HWID_MCATYPE(0xAA, 0x0)        },
+       { SMCA_USR_DP,   HWID_MCATYPE(0x170, 0x0)       },
+       { SMCA_USR_CP,   HWID_MCATYPE(0x180, 0x0)       },
        { SMCA_GMI_PCS,  HWID_MCATYPE(0x241, 0x0)       },
        { SMCA_XGMI_PHY, HWID_MCATYPE(0x259, 0x0)       },
        { SMCA_WAFL_PHY, HWID_MCATYPE(0x267, 0x0)       },