sunxi: H3: fix non working console on uart2

Fix non working console on uart2, that seems releated to both
Allwinner H2+ and H3.

Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
[Andre: remove H2+, rearrange pin setup order]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 9f07d907e5adbf8287227fc498d5d19ca60bad1d..437e86479ced6f17b02e3bec6ba108b2ec63390c 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -136,6 +136,7 @@ enum sunxi_gpio_number {
 #define SUNXI_GPIO_DISABLE     7
 
 #define SUN8I_H3_GPA_UART0     2
+#define SUN8I_H3_GPA_UART2     2
 
 #define SUN4I_GPB_PWM          2
 #define SUN4I_GPB_TWI0         2

diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index ffe578d5c3a8fb3a3c814317656d4cd0a3bf4eaf..755d7d78ff14bdd39a4b90fb73f61c2b9047467c 100644 (file)
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -150,6 +150,10 @@ static int gpio_init(void)
        sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
        sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
        sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I_H3)
+       sunxi_gpio_set_cfgpin(SUNXI_GPA(0), SUN8I_H3_GPA_UART2);
+       sunxi_gpio_set_cfgpin(SUNXI_GPA(1), SUN8I_H3_GPA_UART2);
+       sunxi_gpio_set_pull(SUNXI_GPA(1), SUNXI_GPIO_PULL_UP);
 #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
        sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
        sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);