drm/amd/display: Restore analog connector support

[Why]
The analog connector support was accidentally removed,
causing a crash when connecting an analog monitor.

[How]
This patch restores the functions and pointers required for proper analog
and DP bridge encoder support on legacy GPUs.

V2: Restore the external encoder control functions.

V3:
 - Restore BIOS parser external encoder DAC load detection
 - Restore stream initialization and source selection changes

Fixes: e56e3cff2a1b ("drm/amd/display: Sync dcn42 with DC 3.2.373")
Cc: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit cea8349e4494d2892ea57eef3fe4a8987464a876)

diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
index dd362071a6c9e799e7d5e20309a31d28f7cb5942..e270b1d2457cebedd1c6077605e6bc1b8fb3db59 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
@@ -794,11 +794,13 @@ static enum bp_result bios_parser_external_encoder_control(
 
 static enum bp_result bios_parser_dac_load_detection(
        struct dc_bios *dcb,
-       enum engine_id engine_id)
+       enum engine_id engine_id,
+       struct graphics_object_id ext_enc_id)
 {
        struct bios_parser *bp = BP_FROM_DCB(dcb);
        struct dc_context *ctx = dcb->ctx;
        struct bp_load_detection_parameters bp_params = {0};
+       struct bp_external_encoder_control ext_cntl = {0};
        enum bp_result bp_result = BP_RESULT_UNSUPPORTED;
        uint32_t bios_0_scratch;
        uint32_t device_id_mask = 0;
@@ -824,6 +826,13 @@ static enum bp_result bios_parser_dac_load_detection(
 
                bp_params.engine_id = engine_id;
                bp_result = bp->cmd_tbl.dac_load_detection(bp, &bp_params);
+       } else if (ext_enc_id.id) {
+               if (!bp->cmd_tbl.external_encoder_control)
+                       return BP_RESULT_UNSUPPORTED;
+
+               ext_cntl.action = EXTERNAL_ENCODER_CONTROL_DAC_LOAD_DETECT;
+               ext_cntl.encoder_id = ext_enc_id;
+               bp_result = bp->cmd_tbl.external_encoder_control(bp, &ext_cntl);
        }
 
        if (bp_result != BP_RESULT_OK)

diff --git a/drivers/gpu/drm/amd/display/dc/dc_bios_types.h b/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
index 6f96c5cf39fe8dc096cb20a6e91b9074ab77cb6b..526f71616f94b8b9b9c2b55c72ee60be61d444e5 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
@@ -102,7 +102,8 @@ struct dc_vbios_funcs {
                struct bp_external_encoder_control *cntl);
        enum bp_result (*dac_load_detection)(
                struct dc_bios *bios,
-               enum engine_id engine_id);
+               enum engine_id engine_id,
+               struct graphics_object_id ext_enc_id);
        enum bp_result (*transmitter_control)(
                struct dc_bios *bios,
                struct bp_transmitter_control *cntl);

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
index 5273ca09fe121e63f33540029bbdeafa98751ede..f0abbb7c2cb24da26879f061445e484f25457a87 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
@@ -665,16 +665,45 @@ void dce110_update_info_frame(struct pipe_ctx *pipe_ctx)
 }
 
 static void
-dce110_dac_encoder_control(struct pipe_ctx *pipe_ctx, bool enable)
+dce110_external_encoder_control(enum bp_external_encoder_control_action action,
+                               struct dc_link *link,
+                               struct dc_crtc_timing *timing)
 {
-       struct dc_link *link = pipe_ctx->stream->link;
+       struct dc *dc = link->ctx->dc;
        struct dc_bios *bios = link->ctx->dc_bios;
-       struct bp_encoder_control encoder_control = {0};
+       const struct dc_link_settings *link_settings = &link->cur_link_settings;
+       enum bp_result bp_result = BP_RESULT_OK;
+       struct bp_external_encoder_control ext_cntl = {
+               .action = action,
+               .connector_obj_id = link->link_enc->connector,
+               .encoder_id = link->ext_enc_id,
+               .lanes_number = link_settings->lane_count,
+               .link_rate = link_settings->link_rate,
+
+               /* Use signal type of the real link encoder, ie. DP */
+               .signal = link->connector_signal,
+
+               /* We don't know the timing yet when executing the SETUP action,
+                * so use a reasonably high default value. It seems that ENABLE
+                * can change the actual pixel clock but doesn't work with higher
+                * pixel clocks than what SETUP was called with.
+                */
+               .pixel_clock = timing ? timing->pix_clk_100hz / 10 : 300000,
+               .color_depth = timing ? timing->display_color_depth : COLOR_DEPTH_888,
+       };
+       DC_LOGGER_INIT(dc->ctx);
 
-       encoder_control.action = enable ? ENCODER_CONTROL_ENABLE : ENCODER_CONTROL_DISABLE;
-       encoder_control.engine_id = link->link_enc->analog_engine;
-       encoder_control.pixel_clock = pipe_ctx->stream->timing.pix_clk_100hz / 10;
-       bios->funcs->encoder_control(bios, &encoder_control);
+       bp_result = bios->funcs->external_encoder_control(bios, &ext_cntl);
+
+       if (bp_result != BP_RESULT_OK)
+               DC_LOG_ERROR("Failed to execute external encoder action: 0x%x\n", action);
+}
+
+static void
+dce110_prepare_ddc(struct dc_link *link)
+{
+       if (link->ext_enc_id.id)
+               dce110_external_encoder_control(EXTERNAL_ENCODER_CONTROL_DDC_SETUP, link, NULL);
 }
 
 static bool
@@ -684,7 +713,8 @@ dce110_dac_load_detect(struct dc_link *link)
        struct link_encoder *link_enc = link->link_enc;
        enum bp_result bp_result;
 
-       bp_result = bios->funcs->dac_load_detection(bios, link_enc->analog_engine);
+       bp_result = bios->funcs->dac_load_detection(
+                       bios, link_enc->analog_engine, link->ext_enc_id);
        return bp_result == BP_RESULT_OK;
 }
 
@@ -700,7 +730,6 @@ void dce110_enable_stream(struct pipe_ctx *pipe_ctx)
        uint32_t early_control = 0;
        struct timing_generator *tg = pipe_ctx->stream_res.tg;
 
-       link_hwss->setup_stream_attribute(pipe_ctx);
        link_hwss->setup_stream_encoder(pipe_ctx);
 
        dc->hwss.update_info_frame(pipe_ctx);
@@ -719,8 +748,8 @@ void dce110_enable_stream(struct pipe_ctx *pipe_ctx)
 
        tg->funcs->set_early_control(tg, early_control);
 
-       if (dc_is_rgb_signal(pipe_ctx->stream->signal))
-               dce110_dac_encoder_control(pipe_ctx, true);
+       if (link->ext_enc_id.id)
+               dce110_external_encoder_control(EXTERNAL_ENCODER_CONTROL_ENABLE, link, timing);
 }
 
 static enum bp_result link_transmitter_control(
@@ -1219,8 +1248,8 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
                                               link_enc->transmitter - TRANSMITTER_UNIPHY_A);
        }
 
-       if (dc_is_rgb_signal(pipe_ctx->stream->signal))
-               dce110_dac_encoder_control(pipe_ctx, false);
+       if (link->ext_enc_id.id)
+               dce110_external_encoder_control(EXTERNAL_ENCODER_CONTROL_DISABLE, link, NULL);
 }
 
 void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,
@@ -1603,22 +1632,6 @@ static enum dc_status dce110_enable_stream_timing(
 
        return DC_OK;
 }
-static void
-dce110_select_crtc_source(struct pipe_ctx *pipe_ctx)
-{
-       struct dc_link *link = pipe_ctx->stream->link;
-       struct dc_bios *bios = link->ctx->dc_bios;
-       struct bp_crtc_source_select crtc_source_select = {0};
-       enum engine_id engine_id = link->link_enc->preferred_engine;
-
-       if (dc_is_rgb_signal(pipe_ctx->stream->signal))
-               engine_id = link->link_enc->analog_engine;
-       crtc_source_select.controller_id = CONTROLLER_ID_D0 + pipe_ctx->stream_res.tg->inst;
-       crtc_source_select.color_depth = pipe_ctx->stream->timing.display_color_depth;
-       crtc_source_select.engine_id = engine_id;
-       crtc_source_select.sink_signal = pipe_ctx->stream->signal;
-       bios->funcs->select_crtc_source(bios, &crtc_source_select);
-}
 
 enum dc_status dce110_apply_single_controller_ctx_to_hw(
                struct pipe_ctx *pipe_ctx,
@@ -1639,10 +1652,6 @@ enum dc_status dce110_apply_single_controller_ctx_to_hw(
                hws->funcs.disable_stream_gating(dc, pipe_ctx);
        }
 
-       if (pipe_ctx->stream->signal == SIGNAL_TYPE_RGB) {
-               dce110_select_crtc_source(pipe_ctx);
-       }
-
        if (pipe_ctx->stream_res.audio != NULL) {
                struct audio_output audio_output = {0};
 
@@ -1722,8 +1731,7 @@ enum dc_status dce110_apply_single_controller_ctx_to_hw(
                pipe_ctx->stream_res.tg->funcs->set_static_screen_control(
                                pipe_ctx->stream_res.tg, event_triggers, 2);
 
-       if (!dc_is_virtual_signal(pipe_ctx->stream->signal) &&
-               !dc_is_rgb_signal(pipe_ctx->stream->signal))
+       if (!dc_is_virtual_signal(pipe_ctx->stream->signal))
                pipe_ctx->stream_res.stream_enc->funcs->dig_connect_to_otg(
                        pipe_ctx->stream_res.stream_enc,
                        pipe_ctx->stream_res.tg->inst);
@@ -3376,6 +3384,15 @@ void dce110_enable_tmds_link_output(struct dc_link *link,
        link->phy_state.symclk_state = SYMCLK_ON_TX_ON;
 }
 
+static void dce110_enable_analog_link_output(
+               struct dc_link *link,
+               uint32_t pix_clk_100hz)
+{
+       link->link_enc->funcs->enable_analog_output(
+                       link->link_enc,
+                       pix_clk_100hz);
+}
+
 void dce110_enable_dp_link_output(
                struct dc_link *link,
                const struct link_resource *link_res,
@@ -3423,6 +3440,11 @@ void dce110_enable_dp_link_output(
                }
        }
 
+       if (link->ext_enc_id.id) {
+               dce110_external_encoder_control(EXTERNAL_ENCODER_CONTROL_INIT, link, NULL);
+               dce110_external_encoder_control(EXTERNAL_ENCODER_CONTROL_SETUP, link, NULL);
+       }
+
        if (dc->link_srv->dp_get_encoding_format(link_settings) == DP_8b_10b_ENCODING) {
                if (dc->clk_mgr->funcs->notify_link_rate_change)
                        dc->clk_mgr->funcs->notify_link_rate_change(dc->clk_mgr, link);
@@ -3513,8 +3535,10 @@ static const struct hw_sequencer_funcs dce110_funcs = {
        .enable_lvds_link_output = dce110_enable_lvds_link_output,
        .enable_tmds_link_output = dce110_enable_tmds_link_output,
        .enable_dp_link_output = dce110_enable_dp_link_output,
+       .enable_analog_link_output = dce110_enable_analog_link_output,
        .disable_link_output = dce110_disable_link_output,
        .dac_load_detect = dce110_dac_load_detect,
+       .prepare_ddc = dce110_prepare_ddc,
 };
 
 static const struct hwseq_private_funcs dce110_private_funcs = {