drm/mediatek: Add support for MT8195 Digital Parallel Interface

Add support for the DPI block found in the MT8195 and MT8188 SoCs.
Inside of the SoC, this block is directly connected to the HDMI IP.

Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20250217154836.108895-11-angelogioacchino.delregno@collabora.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>

diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index 14364d96f4d7349381bf79349450d54cf477dce8..0fd13e6dd3f16ed5a9c6e8a021eb9be1cb6e8d1b 100644 (file)
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -1139,6 +1139,24 @@ static const struct mtk_dpi_conf mt8192_conf = {
        .csc_enable_bit = CSC_ENABLE,
 };
 
+static const struct mtk_dpi_conf mt8195_conf = {
+       .max_clock_khz = 594000,
+       .output_fmts = mt8183_output_fmts,
+       .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts),
+       .pixels_per_iter = 1,
+       .is_ck_de_pol = true,
+       .swap_input_support = true,
+       .support_direct_pin = true,
+       .dimension_mask = HPW_MASK,
+       .hvsize_mask = HSIZE_MASK,
+       .channel_swap_shift = CH_SWAP,
+       .yuv422_en_bit = YUV422_EN,
+       .csc_enable_bit = CSC_ENABLE,
+       .input_2p_en_bit = DPI_INPUT_2P_EN,
+       .clocked_by_hdmi = true,
+       .output_1pixel = true,
+};
+
 static const struct mtk_dpi_conf mt8195_dpintf_conf = {
        .dpi_factor = dpi_factor_mt8195_dp_intf,
        .num_dpi_factor = ARRAY_SIZE(dpi_factor_mt8195_dp_intf),
@@ -1242,6 +1260,7 @@ static const struct of_device_id mtk_dpi_of_ids[] = {
        { .compatible = "mediatek,mt8188-dp-intf", .data = &mt8195_dpintf_conf },
        { .compatible = "mediatek,mt8192-dpi", .data = &mt8192_conf },
        { .compatible = "mediatek,mt8195-dp-intf", .data = &mt8195_dpintf_conf },
+       { .compatible = "mediatek,mt8195-dpi", .data = &mt8195_conf },
        { /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, mtk_dpi_of_ids);

diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
index 61b276bce70f8c3b985b02a12e551ab98ce79654..23eeefce8fd200cccfada6bafef5b81396309a02 100644 (file)
--- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
+++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
@@ -43,6 +43,7 @@
 
 /* DPI_CON: DPI instances */
 #define DPI_OUTPUT_1T1P_EN             BIT(24)
+#define DPI_INPUT_2P_EN                        BIT(25)
 /* DPI_CON: DPINTF instances */
 #define DPINTF_YUV422_EN               BIT(24)
 #define DPINTF_CSC_ENABLE              BIT(26)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index f22ad2882697cc5459192ce969b8b8ebd11f6901..772c3d0f5d14d8838f941490c3cb3c45f5c82f20 100644 (file)
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -810,6 +810,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
          .data = (void *)MTK_DPI },
        { .compatible = "mediatek,mt8195-dp-intf",
          .data = (void *)MTK_DP_INTF },
+       { .compatible = "mediatek,mt8195-dpi",
+         .data = (void *)MTK_DPI },
        { .compatible = "mediatek,mt2701-dsi",
          .data = (void *)MTK_DSI },
        { .compatible = "mediatek,mt8173-dsi",