hw/pci-host/{dino,astro}: Don't call pci_register_root_bus() in init
target/sparc: Loosen various decode for v7
linux-user: Add syscall dispatch support
tcg/optimize: Fix folding of vector bitsel
include/hw/core/cpu: Introduce MMUIdxMap
include/hw/core/cpu: Introduce cpu_tlb_fast
include/hw/core/cpu: Invert the indexing into CPUTLBDescFast
accel/tcg: Remove dead mmap_unlock() call in invalidate_phys_page_range
accel/tcg: Remove cpu_loop_exit_restore() stub
accel/tcg: Properly unlink a TB linked to itself
accel/tcg: Introduce and use tb_flush__exclusive_or_serial
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# gpg: Signature made Wed 24 Sep 2025 11:59:31 AM PDT
# gpg: using RSA key
7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-misc-
20250924' of https://gitlab.com/rth7680/qemu: (32 commits)
accel/tcg: Remove cpu_loop_exit_restore() stub
accel/tcg: Remove dead mmap_unlock() call in invalidate_phys_page_range
accel/tcg: Improve buffer overflow in tb_gen_code
accel/tcg: Create queue_tb_flush from tb_flush
linux-user: Split out begin_parallel_context
plugins: Use tb_flush__exclusive_or_serial
accel/tcg: Move post-load tb_flush to vm_change_state hook
accel/tcg: Split out tb_flush__exclusive_or_serial
hw/ppc/spapr: Use tb_invalidate_phys_range in h_page_init
target/riscv: Record misa_ext in TCGTBCPUState.cs_base
target/alpha: Simplify call_pal implementation
gdbstub: Remove tb_flush uses
tests/tcg/multiarch: Add tb-link test
accel/tcg: Properly unlink a TB linked to itself
target/hppa: Adjust mmu indexes to begin with 0
include/hw/core/cpu: Invert the indexing into CPUTLBDescFast
include/hw/core/cpu: Introduce cpu_tlb_fast
include/hw/core/cpu: Introduce MMUIdxMap
tcg/optimize: Fix folding of vector bitsel
hw/pci-host/astro: Don't call pci_regsiter_root_bus() in init
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>