+++ /dev/null
-From 598c0b0c7da8d9e34a894e479b067af49cf1a882 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 5 Dec 2023 06:25:49 +0300
-Subject: arm64: dts: qcom: sm8150: switch UFS QMP PHY to new style of bindings
-
-From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
-[ Upstream commit 935c76f7f85912962d72eceabdfa2c38c4c07f02 ]
-
-Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
-resource region, no per-PHY subnodes).
-
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Link: https://lore.kernel.org/r/20231205032552.1583336-7-dmitry.baryshkov@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Stable-dep-of: eff7496b7281 ("arm64: dts: qcom: sm8150: Fix UFS PHY clocks")
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sm8150.dtsi | 20 ++++++--------------
- 1 file changed, 6 insertions(+), 14 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
-index a072b40c96987..c00840219a45d 100644
---- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
-@@ -1634,7 +1634,7 @@ ufs_mem_hc: ufshc@1d84000 {
- <0 0x01d90000 0 0x8000>;
- reg-names = "std", "ice";
- interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
-- phys = <&ufs_mem_phy_lanes>;
-+ phys = <&ufs_mem_phy>;
- phy-names = "ufsphy";
- lanes-per-direction = <2>;
- #reset-cells = <1>;
-@@ -1679,10 +1679,8 @@ ufs_mem_hc: ufshc@1d84000 {
-
- ufs_mem_phy: phy@1d87000 {
- compatible = "qcom,sm8150-qmp-ufs-phy";
-- reg = <0 0x01d87000 0 0x1c0>;
-- #address-cells = <2>;
-- #size-cells = <2>;
-- ranges;
-+ reg = <0 0x01d87000 0 0x1000>;
-+
- clock-names = "ref",
- "ref_aux";
- clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
-@@ -1690,16 +1688,10 @@ ufs_mem_phy: phy@1d87000 {
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
-- status = "disabled";
-
-- ufs_mem_phy_lanes: phy@1d87400 {
-- reg = <0 0x01d87400 0 0x16c>,
-- <0 0x01d87600 0 0x200>,
-- <0 0x01d87c00 0 0x200>,
-- <0 0x01d87800 0 0x16c>,
-- <0 0x01d87a00 0 0x200>;
-- #phy-cells = <0>;
-- };
-+ #phy-cells = <0>;
-+
-+ status = "disabled";
- };
-
- ipa_virt: interconnect@1e00000 {
---
-2.43.0
-
arm64-dts-qcom-msm8998-drop-usb-phy-clock-index.patch
arm64-dts-qcom-msm8998-switch-usb-qmp-phy-to-new-sty.patch
arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
-arm64-dts-qcom-sm8150-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch
printk-add-panic_in_progress-helper.patch
+++ /dev/null
-From 7a3c8fb2a959dcc36ec3602323bdad07cdcfe960 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 5 Dec 2023 06:25:49 +0300
-Subject: arm64: dts: qcom: sm8150: switch UFS QMP PHY to new style of bindings
-
-From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
-[ Upstream commit 935c76f7f85912962d72eceabdfa2c38c4c07f02 ]
-
-Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
-resource region, no per-PHY subnodes).
-
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Link: https://lore.kernel.org/r/20231205032552.1583336-7-dmitry.baryshkov@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Stable-dep-of: eff7496b7281 ("arm64: dts: qcom: sm8150: Fix UFS PHY clocks")
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sm8150.dtsi | 20 ++++++--------------
- 1 file changed, 6 insertions(+), 14 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
-index eb1a9369926d2..0c2981feb3c8c 100644
---- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
-@@ -1979,7 +1979,7 @@ ufs_mem_hc: ufshc@1d84000 {
- <0 0x01d90000 0 0x8000>;
- reg-names = "std", "ice";
- interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
-- phys = <&ufs_mem_phy_lanes>;
-+ phys = <&ufs_mem_phy>;
- phy-names = "ufsphy";
- lanes-per-direction = <2>;
- #reset-cells = <1>;
-@@ -2024,10 +2024,8 @@ ufs_mem_hc: ufshc@1d84000 {
-
- ufs_mem_phy: phy@1d87000 {
- compatible = "qcom,sm8150-qmp-ufs-phy";
-- reg = <0 0x01d87000 0 0x1c0>;
-- #address-cells = <2>;
-- #size-cells = <2>;
-- ranges;
-+ reg = <0 0x01d87000 0 0x1000>;
-+
- clock-names = "ref",
- "ref_aux";
- clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
-@@ -2037,16 +2035,10 @@ ufs_mem_phy: phy@1d87000 {
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
-- status = "disabled";
-
-- ufs_mem_phy_lanes: phy@1d87400 {
-- reg = <0 0x01d87400 0 0x16c>,
-- <0 0x01d87600 0 0x200>,
-- <0 0x01d87c00 0 0x200>,
-- <0 0x01d87800 0 0x16c>,
-- <0 0x01d87a00 0 0x200>;
-- #phy-cells = <0>;
-- };
-+ #phy-cells = <0>;
-+
-+ status = "disabled";
- };
-
- ipa_virt: interconnect@1e00000 {
---
-2.43.0
-
wifi-wfx-fix-memory-leak-when-starting-ap.patch
arm64-dts-qcom-msm8998-switch-usb-qmp-phy-to-new-sty.patch
arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
-arm64-dts-qcom-sm8150-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sc8280xp-update-ufs-phy-nodes.patch
+++ /dev/null
-From d2d99ebdaf71bdfb00ae51b832b06f2f2831b645 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 5 Dec 2023 06:25:49 +0300
-Subject: arm64: dts: qcom: sm8150: switch UFS QMP PHY to new style of bindings
-
-From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
-[ Upstream commit 935c76f7f85912962d72eceabdfa2c38c4c07f02 ]
-
-Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
-resource region, no per-PHY subnodes).
-
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Link: https://lore.kernel.org/r/20231205032552.1583336-7-dmitry.baryshkov@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Stable-dep-of: eff7496b7281 ("arm64: dts: qcom: sm8150: Fix UFS PHY clocks")
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sm8150.dtsi | 20 ++++++--------------
- 1 file changed, 6 insertions(+), 14 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
-index 26b6d84548a56..c3ba152a8202d 100644
---- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
-@@ -2032,7 +2032,7 @@ ufs_mem_hc: ufshc@1d84000 {
- <0 0x01d90000 0 0x8000>;
- reg-names = "std", "ice";
- interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
-- phys = <&ufs_mem_phy_lanes>;
-+ phys = <&ufs_mem_phy>;
- phy-names = "ufsphy";
- lanes-per-direction = <2>;
- #reset-cells = <1>;
-@@ -2077,10 +2077,8 @@ ufs_mem_hc: ufshc@1d84000 {
-
- ufs_mem_phy: phy@1d87000 {
- compatible = "qcom,sm8150-qmp-ufs-phy";
-- reg = <0 0x01d87000 0 0x1c0>;
-- #address-cells = <2>;
-- #size-cells = <2>;
-- ranges;
-+ reg = <0 0x01d87000 0 0x1000>;
-+
- clock-names = "ref",
- "ref_aux";
- clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
-@@ -2090,16 +2088,10 @@ ufs_mem_phy: phy@1d87000 {
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
-- status = "disabled";
-
-- ufs_mem_phy_lanes: phy@1d87400 {
-- reg = <0 0x01d87400 0 0x16c>,
-- <0 0x01d87600 0 0x200>,
-- <0 0x01d87c00 0 0x200>,
-- <0 0x01d87800 0 0x16c>,
-- <0 0x01d87a00 0 0x200>;
-- #phy-cells = <0>;
-- };
-+ #phy-cells = <0>;
-+
-+ status = "disabled";
- };
-
- cryptobam: dma-controller@1dc4000 {
---
-2.43.0
-
arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch
-arm64-dts-qcom-sm8150-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch
+++ /dev/null
-From 4c280e4f98c4bf62ab7eb0a003d4949fdd6c311a Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 5 Dec 2023 06:25:49 +0300
-Subject: arm64: dts: qcom: sm8150: switch UFS QMP PHY to new style of bindings
-
-From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
-[ Upstream commit 935c76f7f85912962d72eceabdfa2c38c4c07f02 ]
-
-Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
-resource region, no per-PHY subnodes).
-
-Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
-Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Link: https://lore.kernel.org/r/20231205032552.1583336-7-dmitry.baryshkov@linaro.org
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-Stable-dep-of: eff7496b7281 ("arm64: dts: qcom: sm8150: Fix UFS PHY clocks")
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm64/boot/dts/qcom/sm8150.dtsi | 20 ++++++--------------
- 1 file changed, 6 insertions(+), 14 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
-index 3221478663ac6..7a57acbe19acc 100644
---- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
-+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
-@@ -2016,7 +2016,7 @@ ufs_mem_hc: ufshc@1d84000 {
- <0 0x01d90000 0 0x8000>;
- reg-names = "std", "ice";
- interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
-- phys = <&ufs_mem_phy_lanes>;
-+ phys = <&ufs_mem_phy>;
- phy-names = "ufsphy";
- lanes-per-direction = <2>;
- #reset-cells = <1>;
-@@ -2061,10 +2061,8 @@ ufs_mem_hc: ufshc@1d84000 {
-
- ufs_mem_phy: phy@1d87000 {
- compatible = "qcom,sm8150-qmp-ufs-phy";
-- reg = <0 0x01d87000 0 0x1c0>;
-- #address-cells = <2>;
-- #size-cells = <2>;
-- ranges;
-+ reg = <0 0x01d87000 0 0x1000>;
-+
- clock-names = "ref",
- "ref_aux";
- clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
-@@ -2074,16 +2072,10 @@ ufs_mem_phy: phy@1d87000 {
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
-- status = "disabled";
-
-- ufs_mem_phy_lanes: phy@1d87400 {
-- reg = <0 0x01d87400 0 0x16c>,
-- <0 0x01d87600 0 0x200>,
-- <0 0x01d87c00 0 0x200>,
-- <0 0x01d87800 0 0x16c>,
-- <0 0x01d87a00 0 0x200>;
-- #phy-cells = <0>;
-- };
-+ #phy-cells = <0>;
-+
-+ status = "disabled";
- };
-
- cryptobam: dma-controller@1dc4000 {
---
-2.43.0
-
arm64-dts-qcom-msm8998-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-qcm2290-declare-vls-clamp-register-fo.patch
arm64-dts-qcom-sm6115-declare-vls-clamp-register-for.patch
-arm64-dts-qcom-sm8150-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch
arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch
arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch