ARM: dts: qcom: align SDHCI clocks with DT schema

The DT schema expects clocks iface-core order.  No functional change.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220712144245.17417-6-krzysztof.kozlowski@linaro.org

diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 1c8d3bdc8fff465d270c19a8ee24baebcb3e6d00..f2fb7c975af84f562f40584e79e0b38bfb050561 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -425,10 +425,10 @@
                        reg-names = "hc", "core";
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
-                       clocks = <&gcc GCC_SDCC1_APPS_CLK>,
-                                <&gcc GCC_SDCC1_AHB_CLK>,
+                       clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+                                <&gcc GCC_SDCC1_APPS_CLK>,
                                 <&xo_board>;
-                       clock-names = "core", "iface", "xo";
+                       clock-names = "iface", "core", "xo";
                        status = "disabled";
                };
 
@@ -438,10 +438,10 @@
                        reg-names = "hc", "core";
                        interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
-                       clocks = <&gcc GCC_SDCC2_APPS_CLK>,
-                                <&gcc GCC_SDCC2_AHB_CLK>,
+                       clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+                                <&gcc GCC_SDCC2_APPS_CLK>,
                                 <&xo_board>;
-                       clock-names = "core", "iface", "xo";
+                       clock-names = "iface", "core", "xo";
                        status = "disabled";
                };
 

diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index 473b19204f10dd43a72ab1d012399e10ff67f8a7..b23591110bd2babc57df3214c3039b1a72eb59a6 100644 (file)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -228,9 +228,9 @@
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
                        bus-width = <8>;
-                       clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>,
+                       clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>,
                                 <&gcc GCC_DCD_XO_CLK>;
-                       clock-names = "core", "iface", "xo";
+                       clock-names = "iface", "core", "xo";
                        status = "disabled";
                };
 

diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi
index 5ec46782ffb2cb32222b0971626bf6cb78e88085..918ad686bfba52649bbfa56fd7aa86801cc3c159 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8226.dtsi
@@ -134,10 +134,10 @@
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
-                       clocks = <&gcc GCC_SDCC1_APPS_CLK>,
-                                <&gcc GCC_SDCC1_AHB_CLK>,
+                       clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+                                <&gcc GCC_SDCC1_APPS_CLK>,
                                 <&xo_board>;
-                       clock-names = "core", "iface", "xo";
+                       clock-names = "iface", "core", "xo";
                        pinctrl-names = "default";
                        pinctrl-0 = <&sdhc1_default_state>;
                        status = "disabled";
@@ -150,10 +150,10 @@
                        interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
-                       clocks = <&gcc GCC_SDCC2_APPS_CLK>,
-                                <&gcc GCC_SDCC2_AHB_CLK>,
+                       clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+                                <&gcc GCC_SDCC2_APPS_CLK>,
                                 <&xo_board>;
-                       clock-names = "core", "iface", "xo";
+                       clock-names = "iface", "core", "xo";
                        pinctrl-names = "default";
                        pinctrl-0 = <&sdhc2_default_state>;
                        status = "disabled";
@@ -166,10 +166,10 @@
                        interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
-                       clocks = <&gcc GCC_SDCC3_APPS_CLK>,
-                                <&gcc GCC_SDCC3_AHB_CLK>,
+                       clocks = <&gcc GCC_SDCC3_AHB_CLK>,
+                                <&gcc GCC_SDCC3_APPS_CLK>,
                                 <&xo_board>;
-                       clock-names = "core", "iface", "xo";
+                       clock-names = "iface", "core", "xo";
                        pinctrl-names = "default";
                        pinctrl-0 = <&sdhc3_default_state>;
                        status = "disabled";

diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index e137e1ec8ac93c7b89badf893ca900d9699fc583..7a9be0acf3f5ac8e3ef8e735a7c89bbc90b73c14 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -443,10 +443,10 @@
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
-                       clocks = <&gcc GCC_SDCC1_APPS_CLK>,
-                                <&gcc GCC_SDCC1_AHB_CLK>,
+                       clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+                                <&gcc GCC_SDCC1_APPS_CLK>,
                                 <&xo_board>;
-                       clock-names = "core", "iface", "xo";
+                       clock-names = "iface", "core", "xo";
                        bus-width = <8>;
                        non-removable;
 
@@ -460,10 +460,10 @@
                        interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
-                       clocks = <&gcc GCC_SDCC3_APPS_CLK>,
-                                <&gcc GCC_SDCC3_AHB_CLK>,
+                       clocks = <&gcc GCC_SDCC3_AHB_CLK>,
+                                <&gcc GCC_SDCC3_APPS_CLK>,
                                 <&xo_board>;
-                       clock-names = "core", "iface", "xo";
+                       clock-names = "iface", "core", "xo";
                        bus-width = <4>;
 
                        #address-cells = <1>;
@@ -479,10 +479,10 @@
                        interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
-                       clocks = <&gcc GCC_SDCC2_APPS_CLK>,
-                                <&gcc GCC_SDCC2_AHB_CLK>,
+                       clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+                                <&gcc GCC_SDCC2_APPS_CLK>,
                                 <&xo_board>;
-                       clock-names = "core", "iface", "xo";
+                       clock-names = "iface", "core", "xo";
                        bus-width = <4>;
 
                        #address-cells = <1>;

diff --git a/arch/arm/boot/dts/qcom-msm8974pro.dtsi b/arch/arm/boot/dts/qcom-msm8974pro.dtsi
index 1e882e16a221448310dd8911f76b87c7cb875fc7..58df6e75ab6da18a1afa470aa68158a73ac49457 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8974pro.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974pro.dtsi
@@ -10,10 +10,10 @@
 };
 
 &sdhc_1 {
-       clocks = <&gcc GCC_SDCC1_APPS_CLK>,
-                <&gcc GCC_SDCC1_AHB_CLK>,
+       clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+                <&gcc GCC_SDCC1_APPS_CLK>,
                 <&xo_board>,
                 <&gcc GCC_SDCC1_CDCCAL_FF_CLK>,
                 <&gcc GCC_SDCC1_CDCCAL_SLEEP_CLK>;
-       clock-names = "core", "iface", "xo", "cal", "sleep";
+       clock-names = "iface", "core", "xo", "cal", "sleep";
 };