staging: r8188eu: Remove wrapper rtw_udelay_os()

This wrapper is a simple call to udelay(). Remove it.

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Link: https://lore.kernel.org/r/20210805192644.15978-4-Larry.Finger@lwfinger.net
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/r8188eu/core/rtw_efuse.c b/drivers/staging/r8188eu/core/rtw_efuse.c
index 3e53ec522519e3504bc2e58c2f981179779fff84..6e790f529d61a4cd6d75dfbd1b5db7a040b960d6 100644 (file)
--- a/drivers/staging/r8188eu/core/rtw_efuse.c
+++ b/drivers/staging/r8188eu/core/rtw_efuse.c
@@ -186,7 +186,7 @@ ReadEFuseByte(
        /*  This fix the problem that Efuse read error in high temperature condition. */
        /*  Designer says that there shall be some delay after ready bit is set, or the */
        /*  result will always stay on last data we read. */
-       rtw_udelay_os(50);
+       udelay(50);
        value32 = rtw_read32(Adapter, EFUSE_CTRL);
 
        *pbuf = (u8)(value32 & 0xff);

diff --git a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
index e092563a357721a03fd685306605b61e331e8a0d..37bca779ee00161bd84b7490924b35770fc2025c 100644 (file)
--- a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
+++ b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
@@ -66,7 +66,7 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
                                        if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd)))
                                                poll_bit = true;
                                        else
-                                               rtw_udelay_os(10);
+                                               udelay(10);
 
                                        if (poll_count++ > max_poll_count) {
                                                DBG_88E("Fail to polling Offset[%#x]\n", offset);
@@ -76,9 +76,9 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
                                break;
                        case PWR_CMD_DELAY:
                                if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US)
-                                       rtw_udelay_os(GET_PWR_CFG_OFFSET(pwrcfgcmd));
+                                       udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd));
                                else
-                                       rtw_udelay_os(GET_PWR_CFG_OFFSET(pwrcfgcmd)*1000);
+                                       udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd)*1000);
                                break;
                        case PWR_CMD_END:
                                /*  When this command is parsed, end the process */

diff --git a/drivers/staging/r8188eu/hal/odm_interface.c b/drivers/staging/r8188eu/hal/odm_interface.c
index a64eeb5ae2e29add717159706f59eedd18d5651c..239a9703bb3442f1299cd474607678bac2013515 100644 (file)
--- a/drivers/staging/r8188eu/hal/odm_interface.c
+++ b/drivers/staging/r8188eu/hal/odm_interface.c
@@ -132,7 +132,7 @@ void ODM_IsWorkItemScheduled(void *pRtWorkItem)
 /*  ODM Timer relative API. */
 void ODM_StallExecution(u32 usDelay)
 {
-       rtw_udelay_os(usDelay);
+       udelay(usDelay);
 }
 
 void ODM_delay_ms(u32 ms)
@@ -142,7 +142,7 @@ void ODM_delay_ms(u32 ms)
 
 void ODM_delay_us(u32 us)
 {
-       rtw_udelay_os(us);
+       udelay(us);
 }
 
 void ODM_sleep_ms(u32 ms)

diff --git a/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c b/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c
index 9b0d02a759a4bb2338c757e14de98e18d107a8c6..732d42ab3e0d9c0a680a73d85128ae14947470dc 100644 (file)
--- a/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_hal_init.c
@@ -533,7 +533,7 @@ static s32 _FWFreeToGo(struct adapter *padapter)
                        DBG_88E("%s: Polling FW ready success!! REG_MCUFWDL:0x%08x\n", __func__, value32);
                        return _SUCCESS;
                }
-               rtw_udelay_os(5);
+               udelay(5);
        } while (counter++ < POLLING_READY_TIMEOUT_COUNT);
 
        DBG_88E("%s: Polling FW ready fail!! REG_MCUFWDL:0x%08x\n", __func__, value32);

diff --git a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
index 37f2342ddbaa382473f6eb82638fd91f6b06270c..58d8e01134904b9f45fda3e2df98d2dc9fae5c89 100644 (file)
--- a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
@@ -170,12 +170,12 @@ phy_RFSerialRead(
        tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge;  /* T65 RF */
 
        PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge));
-       rtw_udelay_os(10);/*  PlatformStallExecution(10); */
+       udelay(10);/*  PlatformStallExecution(10); */
 
        PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2);
-       rtw_udelay_os(100);/* PlatformStallExecution(100); */
+       udelay(100);/* PlatformStallExecution(100); */
 
-       rtw_udelay_os(10);/* PlatformStallExecution(10); */
+       udelay(10);/* PlatformStallExecution(10); */
 
        if (eRFPath == RF_PATH_A)
                RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT8);

diff --git a/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c b/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c
index 77889dc05858c87fd858ed12f00ee2951788a51c..6628ad1eb1bb462a51225d7d12d993cbab08e647 100644 (file)
--- a/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c
@@ -480,18 +480,18 @@ static int phy_RF6052_Config_ParaFile(struct adapter *Adapter)
                }
                /*----Set RF_ENV enable----*/
                PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);
-               rtw_udelay_os(1);/* PlatformStallExecution(1); */
+               udelay(1);/* PlatformStallExecution(1); */
 
                /*----Set RF_ENV output high----*/
                PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
-               rtw_udelay_os(1);/* PlatformStallExecution(1); */
+               udelay(1);/* PlatformStallExecution(1); */
 
                /* Set bit number of Address and Data for RF register */
                PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0);  /*  Set 1 to 4 bits for 8255 */
-               rtw_udelay_os(1);/* PlatformStallExecution(1); */
+               udelay(1);/* PlatformStallExecution(1); */
 
                PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0);     /*  Set 0 to 12  bits for 8255 */
-               rtw_udelay_os(1);/* PlatformStallExecution(1); */
+               udelay(1);/* PlatformStallExecution(1); */
 
                /*----Initialize RF fom connfiguration file----*/
                switch (eRFPath) {

diff --git a/drivers/staging/r8188eu/include/osdep_service.h b/drivers/staging/r8188eu/include/osdep_service.h
index 16d6df7027888a4d4515578b9d38ef7f62defe45..eb993a030953de9f6f8f017a1040dc601357639c 100644 (file)
--- a/drivers/staging/r8188eu/include/osdep_service.h
+++ b/drivers/staging/r8188eu/include/osdep_service.h
@@ -236,8 +236,6 @@ void rtw_usleep_os(int us);
 
 u32  rtw_atoi(u8 *s);
 
-void rtw_udelay_os(int us);
-
 static inline unsigned char _cancel_timer_ex(struct timer_list *ptimer)
 {
        return del_timer_sync(ptimer);

diff --git a/drivers/staging/r8188eu/os_dep/osdep_service.c b/drivers/staging/r8188eu/os_dep/osdep_service.c
index 99497bb11e0b50634c5df5fbfbb034a29cc495e1..2192250f21d4996f11a9af16e4b7a20507247c41 100644 (file)
--- a/drivers/staging/r8188eu/os_dep/osdep_service.c
+++ b/drivers/staging/r8188eu/os_dep/osdep_service.c
@@ -141,11 +141,6 @@ void rtw_usleep_os(int us)
                msleep((us/1000) + 1);
 }
 
-void rtw_udelay_os(int us)
-{
-       udelay((unsigned long)us);
-}
-
 #define RTW_SUSPEND_LOCK_NAME "rtw_wifi"
 
 static const struct device_type wlan_type = {