arm64: dts: rockchip: enable automatic fan control on Rock 5B

This links the PWM fan on Radxa Rock 5B as an active cooling device
managed automatically by the thermal subsystem, with a target SoC
temperature of 65C and a minimum-spin interval from 55C to 65C to
ensure airflow when the system gets warm

Helped-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: Alexey Charkov <alchark@gmail.com>
Link: https://lore.kernel.org/r/20240617-rk-dts-additions-v5-4-c1f5f3267f1e@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
index afcc38a5bed81b0e1d882e32239965bd701da255..2e47f8091cdaac0139318b5c4b8b234e3f0117a2 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -52,7 +52,7 @@
 
        fan: pwm-fan {
                compatible = "pwm-fan";
-               cooling-levels = <0 95 145 195 255>;
+               cooling-levels = <0 120 150 180 210 240 255>;
                fan-supply = <&vcc5v0_sys>;
                pwms = <&pwm1 0 50000 0>;
                #cooling-cells = <2>;
@@ -286,6 +286,36 @@
        };
 };
 
+&package_thermal {
+       polling-delay = <1000>;
+
+       trips {
+               package_fan0: package-fan0 {
+                       temperature = <55000>;
+                       hysteresis = <2000>;
+                       type = "active";
+               };
+
+               package_fan1: package-fan1 {
+                       temperature = <65000>;
+                       hysteresis = <2000>;
+                       type = "active";
+               };
+       };
+
+       cooling-maps {
+               map1 {
+                       trip = <&package_fan0>;
+                       cooling-device = <&fan THERMAL_NO_LIMIT 1>;
+               };
+
+               map2 {
+                       trip = <&package_fan1>;
+                       cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
+               };
+       };
+};
+
 &pcie2x1l0 {
        pinctrl-names = "default";
        pinctrl-0 = <&pcie2_0_rst>;