phy: qcom: phy-qcom-m31: Update IPQ5332 M31 USB phy initialization sequence

The current configuration used for the IPQ5332 M31 USB PHY fails the
Near End High Speed Signal Quality compliance test. To resolve this,
update the initialization sequence as specified in the Hardware Design
Document.

Fixes: 08e49af50701 ("phy: qcom: Introduce M31 USB PHY driver")
Cc: stable@kernel.org
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250630-ipq5332_hsphy_complaince-v2-1-63621439ebdb@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/qualcomm/phy-qcom-m31.c b/drivers/phy/qualcomm/phy-qcom-m31.c
index 7caeea1b109e922c0cd12e985bc8868d5bce8b4f..168ea980fda03de502dff8bb39134d6f844f28f7 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-m31.c
+++ b/drivers/phy/qualcomm/phy-qcom-m31.c
@@ -58,14 +58,16 @@
  #define USB2_0_TX_ENABLE              BIT(2)
 
 #define USB2PHY_USB_PHY_M31_XCFGI_4    0xc8
- #define HSTX_SLEW_RATE_565PS          GENMASK(1, 0)
+ #define HSTX_SLEW_RATE_400PS          GENMASK(2, 0)
  #define PLL_CHARGING_PUMP_CURRENT_35UA        GENMASK(4, 3)
  #define ODT_VALUE_38_02_OHM           GENMASK(7, 6)
 
 #define USB2PHY_USB_PHY_M31_XCFGI_5    0xcc
- #define ODT_VALUE_45_02_OHM           BIT(2)
  #define HSTX_PRE_EMPHASIS_LEVEL_0_55MA        BIT(0)
 
+#define USB2PHY_USB_PHY_M31_XCFGI_9    0xdc
+ #define HSTX_CURRENT_17_1MA_385MV     BIT(1)
+
 #define USB2PHY_USB_PHY_M31_XCFGI_11   0xe4
  #define XCFG_COARSE_TUNE_NUM          BIT(1)
  #define XCFG_FINE_TUNE_NUM            BIT(3)
@@ -164,7 +166,7 @@ static struct m31_phy_regs m31_ipq5332_regs[] = {
        },
        {
                USB2PHY_USB_PHY_M31_XCFGI_4,
-               HSTX_SLEW_RATE_565PS | PLL_CHARGING_PUMP_CURRENT_35UA | ODT_VALUE_38_02_OHM,
+               HSTX_SLEW_RATE_400PS | PLL_CHARGING_PUMP_CURRENT_35UA | ODT_VALUE_38_02_OHM,
                0
        },
        {
@@ -174,9 +176,13 @@ static struct m31_phy_regs m31_ipq5332_regs[] = {
        },
        {
                USB2PHY_USB_PHY_M31_XCFGI_5,
-               ODT_VALUE_45_02_OHM | HSTX_PRE_EMPHASIS_LEVEL_0_55MA,
+               HSTX_PRE_EMPHASIS_LEVEL_0_55MA,
                4
        },
+       {
+               USB2PHY_USB_PHY_M31_XCFGI_9,
+               HSTX_CURRENT_17_1MA_385MV,
+       },
        {
                USB_PHY_UTMI_CTRL5,
                0x0,