[committed] Fix length computation for logical shifts on H8

This fixes the length computation for logical shifts on the H8/SX.

The H8/SX has a richer set of logical shifts compared to early parts in the H8
family.  It has special 2 byte instructions for shifts by power of two
immediate values as well as a special 4 byte shift by other immediate values.

These were never accounted for (AFIACT) in the length computation for shifts.
Until now that's mostly just affected branch shortening.  But an upcoming patch
uses instruction lengths to select between two potential sequences and getting
these lengths wrong will cause it to miss optimization opportunities on the
H8/SX.

gcc
	* config/h8300/h8300.cc (compute_a_shift_length): Fix computation
	of logical shifts on the H8/SX.

diff --git a/gcc/config/h8300/h8300.cc b/gcc/config/h8300/h8300.cc
index 5936cdca177c9b2e4f2cf7c764b07f7e27ef2a64..5f9bbc9793b23adf64d8406439bc637d028550af 100644 (file)
--- a/gcc/config/h8300/h8300.cc
+++ b/gcc/config/h8300/h8300.cc
@@ -4299,6 +4299,11 @@ compute_a_shift_length (rtx operands[3], rtx_code code)
          /* Fall through.  */
 
        case SHIFT_INLINE:
+         /* H8/SX has a richer set of logical shifts.  */
+         if (TARGET_H8300SX
+             && (code == ASHIFT || code == LSHIFTRT))
+           return (exact_log2 (n) >= 0) ? 2 : 4;
+
          n = info.remainder;
 
          if (info.shift2 != NULL)