aarch64: Fix the 2nd operand in gcsstr and gcssttr instructions.

The assembler wrongly expects plain register name instead of
memory-form 2nd operand for gcsstr and gcssttr instructions.
This patch fixes the issue.

diff --git a/gas/testsuite/gas/aarch64/gcs-1-bad.l b/gas/testsuite/gas/aarch64/gcs-1-bad.l
index ca8d17ab8fc5123f2444a6c54193ab2354be1e6e..4c69c6e1c575fa6a6bdd8821c215976fe36bedcb 100644 (file)
--- a/gas/testsuite/gas/aarch64/gcs-1-bad.l
+++ b/gas/testsuite/gas/aarch64/gcs-1-bad.l
@@ -19,27 +19,27 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `gcspopm x15'
 [^ :]+:[0-9]+: Error: selected processor does not support `gcspopm x30'
 [^ :]+:[0-9]+: Error: selected processor does not support `gcspopm xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x0,x1'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x0,x16'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x0,sp'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x15,x1'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x15,x16'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x15,sp'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x30,x1'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x30,x16'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x30,sp'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr xzr,x1'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr xzr,x16'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr xzr,sp'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x0,x1'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x0,x16'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x0,sp'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x15,x1'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x15,x16'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x15,sp'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x30,x1'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x30,x16'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x30,sp'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr xzr,x1'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr xzr,x16'
-[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr xzr,sp'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x0,\[x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x0,\[x16\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x0,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x15,\[x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x15,\[x16\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x15,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x30,\[x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x30,\[x16\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr x30,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr xzr,\[x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr xzr,\[x16\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcsstr xzr,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x0,\[x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x0,\[x16\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x0,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x15,\[x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x15,\[x16\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x15,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x30,\[x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x30,\[x16\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr x30,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr xzr,\[x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr xzr,\[x16\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `gcssttr xzr,\[sp\]'

diff --git a/gas/testsuite/gas/aarch64/gcs-1.d b/gas/testsuite/gas/aarch64/gcs-1.d
index 09fa418e5eab6f27004dcdfa43486ecaa92afec5..ff059a3652595828a799a0dcd1b1f2dc0a6918ef 100644 (file)
--- a/gas/testsuite/gas/aarch64/gcs-1.d
+++ b/gas/testsuite/gas/aarch64/gcs-1.d
@@ -29,27 +29,27 @@
 .*:    d52b772f        gcspopm x15
 .*:    d52b773e        gcspopm x30
 .*:    d52b773f        gcspopm
-.*:    d91f0c20        gcsstr  x0, x1
-.*:    d91f0e00        gcsstr  x0, x16
-.*:    d91f0fe0        gcsstr  x0, sp
-.*:    d91f0c2f        gcsstr  x15, x1
-.*:    d91f0e0f        gcsstr  x15, x16
-.*:    d91f0fef        gcsstr  x15, sp
-.*:    d91f0c3e        gcsstr  x30, x1
-.*:    d91f0e1e        gcsstr  x30, x16
-.*:    d91f0ffe        gcsstr  x30, sp
-.*:    d91f0c3f        gcsstr  xzr, x1
-.*:    d91f0e1f        gcsstr  xzr, x16
-.*:    d91f0fff        gcsstr  xzr, sp
-.*:    d91f1c20        gcssttr x0, x1
-.*:    d91f1e00        gcssttr x0, x16
-.*:    d91f1fe0        gcssttr x0, sp
-.*:    d91f1c2f        gcssttr x15, x1
-.*:    d91f1e0f        gcssttr x15, x16
-.*:    d91f1fef        gcssttr x15, sp
-.*:    d91f1c3e        gcssttr x30, x1
-.*:    d91f1e1e        gcssttr x30, x16
-.*:    d91f1ffe        gcssttr x30, sp
-.*:    d91f1c3f        gcssttr xzr, x1
-.*:    d91f1e1f        gcssttr xzr, x16
-.*:    d91f1fff        gcssttr xzr, sp
+.*:    d91f0c20        gcsstr  x0, \[x1\]
+.*:    d91f0e00        gcsstr  x0, \[x16\]
+.*:    d91f0fe0        gcsstr  x0, \[sp\]
+.*:    d91f0c2f        gcsstr  x15, \[x1\]
+.*:    d91f0e0f        gcsstr  x15, \[x16\]
+.*:    d91f0fef        gcsstr  x15, \[sp\]
+.*:    d91f0c3e        gcsstr  x30, \[x1\]
+.*:    d91f0e1e        gcsstr  x30, \[x16\]
+.*:    d91f0ffe        gcsstr  x30, \[sp\]
+.*:    d91f0c3f        gcsstr  xzr, \[x1\]
+.*:    d91f0e1f        gcsstr  xzr, \[x16\]
+.*:    d91f0fff        gcsstr  xzr, \[sp\]
+.*:    d91f1c20        gcssttr x0, \[x1\]
+.*:    d91f1e00        gcssttr x0, \[x16\]
+.*:    d91f1fe0        gcssttr x0, \[sp\]
+.*:    d91f1c2f        gcssttr x15, \[x1\]
+.*:    d91f1e0f        gcssttr x15, \[x16\]
+.*:    d91f1fef        gcssttr x15, \[sp\]
+.*:    d91f1c3e        gcssttr x30, \[x1\]
+.*:    d91f1e1e        gcssttr x30, \[x16\]
+.*:    d91f1ffe        gcssttr x30, \[sp\]
+.*:    d91f1c3f        gcssttr xzr, \[x1\]
+.*:    d91f1e1f        gcssttr xzr, \[x16\]
+.*:    d91f1fff        gcssttr xzr, \[sp\]

diff --git a/gas/testsuite/gas/aarch64/gcs-1.s b/gas/testsuite/gas/aarch64/gcs-1.s
index 35584a8810ea3b5e704dce6ee794664d14014e8c..17734f9f979d4b2952471a7126d18f477e7a9925 100644 (file)
--- a/gas/testsuite/gas/aarch64/gcs-1.s
+++ b/gas/testsuite/gas/aarch64/gcs-1.s
@@ -14,7 +14,7 @@
        .irp op gcsstr, gcssttr
         .irp reg1 x0, x15, x30, xzr
        .irp reg2 x1, x16, sp
-       \op \reg1, \reg2
+       \op \reg1, [\reg2]
        .endr
        .endr
        .endr

diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 6aae9c7cb830ef350817f06e55857ff416e6f058..0f84832523eef1fad9e2a6e67db91a83e7fe1671 100644 (file)
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -4283,8 +4283,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
   GCS_INSN ("gcsss2", 0xd52b7760, 0xffffffe0, OP1 (Rt), QL_I1X, 0),
   GCS_INSN ("gcspopm", 0xd52b773f, 0xffffffff, OP0 (), {}, 0),
   GCS_INSN ("gcspopm", 0xd52b7720, 0xffffffe0, OP1 (Rt), QL_I1X, 0),
-  GCS_INSN ("gcsstr", 0xd91f0c00, 0xfffffc00, OP2 (Rt, Rn_SP), QL_I2SAMEX, 0),
-  GCS_INSN ("gcssttr", 0xd91f1c00, 0xfffffc00, OP2 (Rt, Rn_SP), QL_I2SAMEX, 0),
+  GCS_INSN ("gcsstr", 0xd91f0c00, 0xfffffc00, OP2 (Rt, ADDR_SIMPLE), QL_DST_X, 0),
+  GCS_INSN ("gcssttr", 0xd91f1c00, 0xfffffc00, OP2 (Rt, ADDR_SIMPLE), QL_DST_X, 0),
   CORE_INSN ("gcsb", 0xd503227f, 0xffffffff, ic_system, 0, OP1 (BARRIER_GCSB), {}, F_ALIAS),
   CORE_INSN ("sys", 0xd5080000, 0xfff80000, ic_system, 0, OP5 (UIMM3_OP1, CRn, CRm, UIMM3_OP2, Rt), QL_SYS, F_HAS_ALIAS | F_OPD4_OPT | F_DEFAULT (0x1F)),
   D128_INSN ("sysp", 0xd5480000, 0xfff80000, OP6 (UIMM3_OP1, CRn, CRm, UIMM3_OP2, Rt, PAIRREG_OR_XZR), QL_SYSP, F_HAS_ALIAS | F_OPD_NARROW | F_OPD4_OPT | F_OPD_PAIR_OPT | F_DEFAULT (0x1f)),