arm64: dts: qcom: sa8775p: Mark PCIe EP controller as cache coherent

The PCIe EP controller on SA8775P supports cache coherency, hence add
the "dma-coherent" property to mark it as such.

Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1710166298-27144-4-git-send-email-quic_msarkar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index dcb2d8435d47a6da020f3a430a32b0a2ff7ea072..5632fa896b93a09ba32a1733f82ef211f721dea0 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -4649,6 +4649,7 @@
                                <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_0 0>;
                interconnect-names = "pcie-mem", "cpu-pcie";
 
+               dma-coherent;
                iommus = <&pcie_smmu 0x0000 0x7f>;
                resets = <&gcc GCC_PCIE_0_BCR>;
                reset-names = "core";