--- /dev/null
+From 5b5896e4e1f353ef3dbc4e4e9ee44d53ccf105d7 Mon Sep 17 00:00:00 2001
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Tue, 11 Sep 2012 12:37:55 +0200
+Subject: drm/i915: enable lvds pin pairs before dpll on gen2
+
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+commit 5b5896e4e1f353ef3dbc4e4e9ee44d53ccf105d7 upstream.
+
+Otherwise things migt not work too well.
+
+Breakage introduced in
+
+commit eb1cbe4848b01f9f073064377875bc7d71eb401b
+Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Wed Mar 28 23:12:16 2012 +0200
+
+ drm/i915: split PLL update code out of i9xx_crtc_mode_set
+
+Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_display.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -3926,12 +3926,6 @@ static void i8xx_update_pll(struct drm_c
+ POSTING_READ(DPLL(pipe));
+ udelay(150);
+
+- I915_WRITE(DPLL(pipe), dpll);
+-
+- /* Wait for the clocks to stabilize. */
+- POSTING_READ(DPLL(pipe));
+- udelay(150);
+-
+ /* The LVDS pin pair needs to be on before the DPLLs are enabled.
+ * This is an exception to the general rule that mode_set doesn't turn
+ * things on.
+@@ -3939,6 +3933,12 @@ static void i8xx_update_pll(struct drm_c
+ if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
+ intel_update_lvds(crtc, clock, adjusted_mode);
+
++ I915_WRITE(DPLL(pipe), dpll);
++
++ /* Wait for the clocks to stabilize. */
++ POSTING_READ(DPLL(pipe));
++ udelay(150);
++
+ /* The pixel multiplier can only be updated once the
+ * DPLL is enabled and the clocks are stable.
+ *
--- /dev/null
+From b98b60167279df3acac9422c3c9820d9ebbcf9fb Mon Sep 17 00:00:00 2001
+From: Wang Xingchao <xingchao.wang@intel.com>
+Date: Thu, 13 Sep 2012 07:43:22 +0800
+Subject: drm/i915: HDMI - Clear Audio Enable bit for Hot Plug
+
+From: Wang Xingchao <xingchao.wang@intel.com>
+
+commit b98b60167279df3acac9422c3c9820d9ebbcf9fb upstream.
+
+Clear Audio Enable bit to trigger unsolicated event to notify Audio
+Driver part the HDMI hot plug change. The patch fixed the bug when
+remove HDMI cable the bit was not cleared correctly.
+
+In intel_hdmi_dpms(), if intel_hdmi->has_audio been true, the "Audio enable bit" will
+be set to trigger unsolicated event to notify Alsa driver the change.
+
+intel_hdmi->has_audio will be reset to false from intel_hdmi_detect() after
+remove the hdmi cable, here's debug log:
+
+[ 187.494153] [drm:output_poll_execute], [CONNECTOR:17:HDMI-A-1] status updated from 1 to 2
+[ 187.525349] [drm:intel_hdmi_detect], HDMI: has_audio = 0
+
+so when comes back to intel_hdmi_dpms(), the "Audio enable bit" will not be cleared. And this
+cause the eld infomation and pin presence doesnot update accordingly in alsa driver side.
+
+This patch will also trigger unsolicated event to alsa driver to notify the hot plug event:
+
+[ 187.853159] ALSA sound/pci/hda/patch_hdmi.c:772 HDMI hot plug event: Codec=3 Pin=5 Presence_Detect=0 ELD_Valid=1
+[ 187.853268] ALSA sound/pci/hda/patch_hdmi.c:990 HDMI status: Codec=3 Pin=5 Presence_Detect=0 ELD_Valid=0
+
+Signed-off-by: Wang Xingchao <xingchao.wang@intel.com>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_hdmi.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/intel_hdmi.c
++++ b/drivers/gpu/drm/i915/intel_hdmi.c
+@@ -400,7 +400,7 @@ static void intel_hdmi_dpms(struct drm_e
+ u32 temp;
+ u32 enable_bits = SDVO_ENABLE;
+
+- if (intel_hdmi->has_audio)
++ if (intel_hdmi->has_audio || mode != DRM_MODE_DPMS_ON)
+ enable_bits |= SDVO_AUDIO_ENABLE;
+
+ temp = I915_READ(intel_hdmi->sdvox_reg);
--- /dev/null
+From 7e81a42e341a4f15d76624b7c02ffb21b085b56f Mon Sep 17 00:00:00 2001
+From: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Sat, 15 Sep 2012 09:41:57 +0100
+Subject: drm/i915: Reduce a pin-leak BUG into a WARN
+
+From: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 7e81a42e341a4f15d76624b7c02ffb21b085b56f upstream.
+
+Pin-leaks persist and we get the perennial bug reports of machine
+lockups to the BUG_ON(pin_count==MAX). If we instead loudly report that
+the object cannot be pinned at that time it should prevent the driver from
+locking up, and hopefully restore a semblance of working whilst still
+leaving us a OOPS to debug.
+
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/i915_gem.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/i915_gem.c
++++ b/drivers/gpu/drm/i915/i915_gem.c
+@@ -3044,7 +3044,8 @@ i915_gem_object_pin(struct drm_i915_gem_
+ {
+ int ret;
+
+- BUG_ON(obj->pin_count == DRM_I915_GEM_OBJECT_MAX_PIN_COUNT);
++ if (WARN_ON(obj->pin_count == DRM_I915_GEM_OBJECT_MAX_PIN_COUNT))
++ return -EBUSY;
+
+ if (obj->gtt_space != NULL) {
+ if ((alignment && obj->gtt_offset & (alignment - 1)) ||
--- /dev/null
+From 974a3b0f9f05b748fe11f1afc31efc32aa5160cb Mon Sep 17 00:00:00 2001
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Sun, 9 Sep 2012 11:54:16 +0200
+Subject: drm/i915: set the right gen3 flip_done mode also at resume
+
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+commit 974a3b0f9f05b748fe11f1afc31efc32aa5160cb upstream.
+
+Currently we've only frobbed this bit at irq_init time, but did
+not restore it at resume time. Move it to the gen3 clock gating
+function to fix this.
+
+Notice while reading through code.
+
+Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/i915_irq.c | 3 ---
+ drivers/gpu/drm/i915/intel_pm.c | 3 +++
+ 2 files changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/i915/i915_irq.c
++++ b/drivers/gpu/drm/i915/i915_irq.c
+@@ -2626,9 +2626,6 @@ void intel_irq_init(struct drm_device *d
+ dev->driver->irq_handler = i8xx_irq_handler;
+ dev->driver->irq_uninstall = i8xx_irq_uninstall;
+ } else if (INTEL_INFO(dev)->gen == 3) {
+- /* IIR "flip pending" means done if this bit is set */
+- I915_WRITE(ECOSKPD, _MASKED_BIT_DISABLE(ECO_FLIP_DONE));
+-
+ dev->driver->irq_preinstall = i915_irq_preinstall;
+ dev->driver->irq_postinstall = i915_irq_postinstall;
+ dev->driver->irq_uninstall = i915_irq_uninstall;
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -3528,6 +3528,9 @@ static void gen3_init_clock_gating(struc
+
+ if (IS_PINEVIEW(dev))
+ I915_WRITE(ECOSKPD, _MASKED_BIT_ENABLE(ECO_GATING_CX_ONLY));
++
++ /* IIR "flip pending" means done if this bit is set */
++ I915_WRITE(ECOSKPD, _MASKED_BIT_DISABLE(ECO_FLIP_DONE));
+ }
+
+ static void i85x_init_clock_gating(struct drm_device *dev)
--- /dev/null
+From 610bd7da160f76f1644ecb4cd7f39511b49a22cc Mon Sep 17 00:00:00 2001
+From: Dave Airlie <airlied@redhat.com>
+Date: Fri, 14 Sep 2012 13:28:23 +1000
+Subject: drm/nouveau: fix booting with plymouth + dumb support
+
+From: Dave Airlie <airlied@redhat.com>
+
+commit 610bd7da160f76f1644ecb4cd7f39511b49a22cc upstream.
+
+We noticed a plymouth bug on Fedora 18, and I then
+noticed this stupid thinko, fixing it fixed the problem
+with plymouth.
+
+Acked-by: Ben Skeggs <bskeggs@redhat.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/nouveau/nouveau_display.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/nouveau/nouveau_display.c
++++ b/drivers/gpu/drm/nouveau/nouveau_display.c
+@@ -598,7 +598,7 @@ nouveau_display_dumb_create(struct drm_f
+ args->size = args->pitch * args->height;
+ args->size = roundup(args->size, PAGE_SIZE);
+
+- ret = nouveau_gem_new(dev, args->size, 0, TTM_PL_FLAG_VRAM, 0, 0, &bo);
++ ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
+ if (ret)
+ return ret;
+
--- /dev/null
+From 2064db725cc6d4ea19a24c138bc37939b63e3ae6 Mon Sep 17 00:00:00 2001
+From: Maxim Levitsky <maximlevitsky@gmail.com>
+Date: Tue, 14 Aug 2012 02:22:07 +0300
+Subject: drm/nv86/fifo: suspend fix
+
+From: Maxim Levitsky <maximlevitsky@gmail.com>
+
+commit 2064db725cc6d4ea19a24c138bc37939b63e3ae6 upstream.
+
+This fix is a backport from the reworked nouveau driver. It masks off the
+engines we're not expecting to use before attempting a channel kickoff.
+
+Signed-off-by: Maxim Levitsky <maximlevitsky@gmail.com>
+Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
+Cc: Sven Joachim <svenjoac@gmx.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/nouveau/nv84_fifo.c | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/drivers/gpu/drm/nouveau/nv84_fifo.c
++++ b/drivers/gpu/drm/nouveau/nv84_fifo.c
+@@ -117,17 +117,22 @@ nv84_fifo_context_del(struct nouveau_cha
+ struct drm_device *dev = chan->dev;
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ unsigned long flags;
++ u32 save;
+
+ /* remove channel from playlist, will context switch if active */
+ spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
+ nv_mask(dev, 0x002600 + (chan->id * 4), 0x80000000, 0x00000000);
+ nv50_fifo_playlist_update(dev);
+
++ save = nv_mask(dev, 0x002520, 0x0000003f, 0x15);
++
+ /* tell any engines on this channel to unload their contexts */
+ nv_wr32(dev, 0x0032fc, chan->ramin->vinst >> 12);
+ if (!nv_wait_ne(dev, 0x0032fc, 0xffffffff, 0xffffffff))
+ NV_INFO(dev, "PFIFO: channel %d unload timeout\n", chan->id);
+
++ nv_wr32(dev, 0x002520, save);
++
+ nv_wr32(dev, 0x002600 + (chan->id * 4), 0x00000000);
+ spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
+
+@@ -184,10 +189,13 @@ nv84_fifo_fini(struct drm_device *dev, i
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct nv84_fifo_priv *priv = nv_engine(dev, engine);
+ int i;
++ u32 save;
+
+ /* set playlist length to zero, fifo will unload context */
+ nv_wr32(dev, 0x0032ec, 0);
+
++ save = nv_mask(dev, 0x002520, 0x0000003f, 0x15);
++
+ /* tell all connected engines to unload their contexts */
+ for (i = 0; i < priv->base.channels; i++) {
+ struct nouveau_channel *chan = dev_priv->channels.ptr[i];
+@@ -199,6 +207,7 @@ nv84_fifo_fini(struct drm_device *dev, i
+ }
+ }
+
++ nv_wr32(dev, 0x002520, save);
+ nv_wr32(dev, 0x002140, 0);
+ return 0;
+ }
--- /dev/null
+From 4e58591c8961b3e31709313f75819f2eec06e322 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Tue, 21 Aug 2012 19:06:21 -0400
+Subject: drm/radeon: don't disable plls that are in use by other crtcs
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 4e58591c8961b3e31709313f75819f2eec06e322 upstream.
+
+Some plls are shared for DP.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/atombios_crtc.c | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+--- a/drivers/gpu/drm/radeon/atombios_crtc.c
++++ b/drivers/gpu/drm/radeon/atombios_crtc.c
+@@ -1668,9 +1668,22 @@ static void atombios_crtc_disable(struct
+ struct drm_device *dev = crtc->dev;
+ struct radeon_device *rdev = dev->dev_private;
+ struct radeon_atom_ss ss;
++ int i;
+
+ atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
+
++ for (i = 0; i < rdev->num_crtc; i++) {
++ if (rdev->mode_info.crtcs[i] &&
++ rdev->mode_info.crtcs[i]->enabled &&
++ i != radeon_crtc->crtc_id &&
++ radeon_crtc->pll_id == rdev->mode_info.crtcs[i]->pll_id) {
++ /* one other crtc is using this pll don't turn
++ * off the pll
++ */
++ goto done;
++ }
++ }
++
+ switch (radeon_crtc->pll_id) {
+ case ATOM_PPLL1:
+ case ATOM_PPLL2:
+@@ -1687,6 +1700,7 @@ static void atombios_crtc_disable(struct
+ default:
+ break;
+ }
++done:
+ radeon_crtc->pll_id = -1;
+ }
+
--- /dev/null
+From 41fa54377057ab38bc3e08ebb46168a7daf2e63b Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 29 Aug 2012 19:48:26 -0400
+Subject: drm/radeon: fix dig encoder selection on DCE61
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 41fa54377057ab38bc3e08ebb46168a7daf2e63b upstream.
+
+Was using the DCE41 code which was wrong. Fixes
+blank displays on a number of Trinity systems.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/atombios_encoders.c | 31 ++++++++++++++++++++++++-----
+ 1 file changed, 26 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/atombios_encoders.c
++++ b/drivers/gpu/drm/radeon/atombios_encoders.c
+@@ -1769,13 +1769,34 @@ static int radeon_atom_pick_dig_encoder(
+ struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
+ struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+ struct drm_encoder *test_encoder;
+- struct radeon_encoder_atom_dig *dig;
++ struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+ uint32_t dig_enc_in_use = 0;
+
+- /* DCE4/5 */
+- if (ASIC_IS_DCE4(rdev)) {
+- dig = radeon_encoder->enc_priv;
+- if (ASIC_IS_DCE41(rdev)) {
++ if (ASIC_IS_DCE6(rdev)) {
++ /* DCE6 */
++ switch (radeon_encoder->encoder_id) {
++ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
++ if (dig->linkb)
++ return 1;
++ else
++ return 0;
++ break;
++ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
++ if (dig->linkb)
++ return 3;
++ else
++ return 2;
++ break;
++ case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
++ if (dig->linkb)
++ return 5;
++ else
++ return 4;
++ break;
++ }
++ } else if (ASIC_IS_DCE4(rdev)) {
++ /* DCE4/5 */
++ if (ASIC_IS_DCE41(rdev) && !ASIC_IS_DCE61(rdev)) {
+ /* ontario follows DCE4 */
+ if (rdev->family == CHIP_PALM) {
+ if (dig->linkb)
--- /dev/null
+From 4a2b6662c3632176b4fdf012243dd3751367bf1f Mon Sep 17 00:00:00 2001
+From: Jerome Glisse <jglisse@redhat.com>
+Date: Tue, 28 Aug 2012 16:50:22 -0400
+Subject: drm/radeon: force dma32 to fix regression rs4xx,rs6xx,rs740
+
+From: Jerome Glisse <jglisse@redhat.com>
+
+commit 4a2b6662c3632176b4fdf012243dd3751367bf1f upstream.
+
+It seems some of those IGP dislike non dma32 page despite what
+documentation says. Fix regression since we allowed non dma32
+pages. It seems it only affect some revision of those IGP chips
+as we don't know which one just force dma32 for all of them.
+
+https://bugzilla.redhat.com/show_bug.cgi?id=785375
+
+Signed-off-by: Jerome Glisse <jglisse@redhat.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_device.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_device.c
++++ b/drivers/gpu/drm/radeon/radeon_device.c
+@@ -774,7 +774,7 @@ int radeon_device_init(struct radeon_dev
+ if (rdev->flags & RADEON_IS_AGP)
+ rdev->need_dma32 = true;
+ if ((rdev->flags & RADEON_IS_PCI) &&
+- (rdev->family < CHIP_RS400))
++ (rdev->family <= CHIP_RS740))
+ rdev->need_dma32 = true;
+
+ dma_bits = rdev->need_dma32 ? 32 : 40;
--- /dev/null
+From f492c171a38d77fc13a8998a0721f2da50835224 Mon Sep 17 00:00:00 2001
+From: Christian König <deathsimple@vodafone.de>
+Date: Thu, 13 Sep 2012 10:33:47 +0200
+Subject: drm/radeon: make 64bit fences more robust v3
+
+From: Christian König <deathsimple@vodafone.de>
+
+commit f492c171a38d77fc13a8998a0721f2da50835224 upstream.
+
+Only increase the higher 32bits if we really detect a wrap around.
+
+v2: instead of increasing the higher 32bits just use the higher
+ 32bits from the last emitted fence.
+v3: also use last emitted fence value as upper limit.
+
+The intention of this patch is to make fences as robust as
+they where before introducing 64bit fences. This is
+necessary because on older systems it looks like the fence
+value gets corrupted on initialization.
+
+Fixes:
+https://bugs.freedesktop.org/show_bug.cgi?id=51344
+
+Should also fix:
+https://bugs.freedesktop.org/show_bug.cgi?id=54129
+https://bugs.freedesktop.org/show_bug.cgi?id=54662
+https://bugzilla.redhat.com/show_bug.cgi?id=846505
+https://bugzilla.redhat.com/show_bug.cgi?id=845639
+
+3.5 needs a separate patch due to changes in the
+fence code. Will send that out separately.
+
+Signed-off-by: Christian König <deathsimple@vodafone.de>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+
+---
+ drivers/gpu/drm/radeon/radeon_fence.c | 8 +++++---
+ 1 file changed, 5 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_fence.c
++++ b/drivers/gpu/drm/radeon/radeon_fence.c
+@@ -75,7 +75,7 @@ int radeon_fence_emit(struct radeon_devi
+
+ void radeon_fence_process(struct radeon_device *rdev, int ring)
+ {
+- uint64_t seq, last_seq;
++ uint64_t seq, last_seq, last_emitted;
+ unsigned count_loop = 0;
+ bool wake = false;
+
+@@ -102,13 +102,15 @@ void radeon_fence_process(struct radeon_
+ */
+ last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq);
+ do {
++ last_emitted = rdev->fence_drv[ring].seq;
+ seq = radeon_fence_read(rdev, ring);
+ seq |= last_seq & 0xffffffff00000000LL;
+ if (seq < last_seq) {
+- seq += 0x100000000LL;
++ seq &= 0xffffffff;
++ seq |= last_emitted & 0xffffffff00000000LL;
+ }
+
+- if (seq == last_seq) {
++ if (seq <= last_seq || seq > last_emitted) {
+ break;
+ }
+ /* If we loop over we don't want to return without
drm-radeon-atom-powergating-fixes-for-dce6.patch
drm-i915-fix-wrong-order-of-parameters-in-port-checking.patch
drm-radeon-convert-radeon-vfct-code-to-use-acpi_get_table_with_size.patch
+drm-radeon-don-t-disable-plls-that-are-in-use-by-other-crtcs.patch
+drm-radeon-force-dma32-to-fix-regression-rs4xx-rs6xx-rs740.patch
+drm-radeon-fix-dig-encoder-selection-on-dce61.patch
+drm-radeon-make-64bit-fences-more-robust-v3.patch
+drm-nouveau-fix-booting-with-plymouth-dumb-support.patch
+drm-i915-set-the-right-gen3-flip_done-mode-also-at-resume.patch
+drm-i915-enable-lvds-pin-pairs-before-dpll-on-gen2.patch
+drm-i915-hdmi-clear-audio-enable-bit-for-hot-plug.patch
+drm-i915-reduce-a-pin-leak-bug-into-a-warn.patch
+drm-nv86-fifo-suspend-fix.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
