]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: qcom: msm8996: Use the header with DSI phy clock IDs
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tue, 8 Apr 2025 09:32:05 +0000 (11:32 +0200)
committerBjorn Andersson <andersson@kernel.org>
Tue, 8 Apr 2025 21:56:16 +0000 (16:56 -0500)
Use the header with DSI phy clock IDs to make code more readable.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-8-73b482a6dd02@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/msm8996.dtsi

index 4719e1fc70d2cb15a6a63d3e28622ae078a367ef..ede851fbf628428f5740ca8add65ffc05360cc62 100644 (file)
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 #include <dt-bindings/clock/qcom,gcc-msm8996.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
                        clocks = <&xo_board>,
                                 <&gcc GPLL0>,
                                 <&gcc GCC_MMSS_NOC_CFG_AHB_CLK>,
-                                <&mdss_dsi0_phy 1>,
-                                <&mdss_dsi0_phy 0>,
-                                <&mdss_dsi1_phy 1>,
-                                <&mdss_dsi1_phy 0>,
+                                <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
+                                <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>,
+                                <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
                                 <&mdss_hdmi_phy>;
                        clock-names = "xo",
                                      "gpll0",
                                              "core_mmss",
                                              "pixel",
                                              "core";
-                               assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
-                               assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
+                               assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
+                                                 <&mmcc PCLK0_CLK_SRC>;
+                               assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                                        <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
 
                                phys = <&mdss_dsi0_phy>;
                                status = "disabled";
                                              "core_mmss",
                                              "pixel",
                                              "core";
-                               assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;
-                               assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;
+                               assigned-clocks = <&mmcc BYTE1_CLK_SRC>,
+                                                 <&mmcc PCLK1_CLK_SRC>;
+                               assigned-clock-parents = <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
+                                                        <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>;
 
                                phys = <&mdss_dsi1_phy>;
                                status = "disabled";