]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amd/display: Removing Unused DPP Functions
authorRyan Seto <ryanseto@amd.com>
Fri, 6 Jun 2025 18:57:07 +0000 (14:57 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 18 Jun 2025 16:19:20 +0000 (12:19 -0400)
[Why & How]
The functions in this commit are defined for dpp401 but never used.
Removing them as they are not necessary.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Ryan Seto <ryanseto@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.c
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.h
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c

index 97bf26fa3573898027ada5f6cac701b9b103724c..36187f890d5d0bc26949b215cb7f6617157ce2fe 100644 (file)
@@ -231,7 +231,7 @@ static struct dpp_funcs dcn401_dpp_funcs = {
        .dpp_program_regamma_pwl        = NULL,
        .dpp_set_pre_degam                      = dpp3_set_pre_degam,
        .dpp_program_input_lut          = NULL,
-       .dpp_full_bypass                        = dpp401_full_bypass,
+       .dpp_full_bypass                        = NULL,
        .dpp_setup                                      = dpp401_dpp_setup,
        .dpp_program_degamma_pwl        = NULL,
        .dpp_program_cm_dealpha         = dpp3_program_cm_dealpha,
index 702b787c640ef5bc7236143c4f8b988335ae7a83..5a6a861402b3c4eaa740f39084831d1c7928b8a5 100644 (file)
@@ -684,8 +684,6 @@ void dpp401_dscl_set_scaler_manual_scale(
        struct dpp *dpp_base,
        const struct scaler_data *scl_data);
 
-void dpp401_full_bypass(struct dpp *dpp_base);
-
 void dpp401_dpp_setup(
        struct dpp *dpp_base,
        enum surface_pixel_format format,
index 712aff7e17f7a0f727f7751676216c9168d875a2..7aab77b588694de74542c24f87dc2b1ff8e159bf 100644 (file)
@@ -88,30 +88,6 @@ enum dscl_mode_sel {
        DSCL_MODE_DSCL_BYPASS = 6
 };
 
-void dpp401_full_bypass(struct dpp *dpp_base)
-{
-       struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base);
-
-       /* Input pixel format: ARGB8888 */
-       REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0,
-                       CNVC_SURFACE_PIXEL_FORMAT, 0x8);
-
-       /* Zero expansion */
-       REG_SET_3(FORMAT_CONTROL, 0,
-                       CNVC_BYPASS, 0,
-                       FORMAT_CONTROL__ALPHA_EN, 0,
-                       FORMAT_EXPANSION_MODE, 0);
-
-       /* COLOR_KEYER_CONTROL.COLOR_KEYER_EN = 0 this should be default */
-       if (dpp->tf_mask->CM_BYPASS_EN)
-               REG_SET(CM_CONTROL, 0, CM_BYPASS_EN, 1);
-       else
-               REG_SET(CM_CONTROL, 0, CM_BYPASS, 1);
-
-       /* Setting degamma bypass for now */
-       REG_SET(CM_DGAM_CONTROL, 0, CM_DGAM_LUT_MODE, 0);
-}
-
 void dpp401_set_cursor_attributes(
        struct dpp *dpp_base,
        struct dc_cursor_attributes *cursor_attributes)