]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: ti: k3-j784s4-evm: Add support for multiple CAN instances
authorBhavya Kapoor <b-kapoor@ti.com>
Thu, 11 Apr 2024 20:17:47 +0000 (01:47 +0530)
committerVignesh Raghavendra <vigneshr@ti.com>
Wed, 12 Jun 2024 16:01:27 +0000 (21:31 +0530)
CAN instances 0 and 1 in the mcu domain and 16 in the main domain are
brought on the evm through headers J42, J43 and J46 respectively. Thus,
add their respective transceiver's 0, 1 and 2 dt nodes to add support
for these CAN instances.

CAN instance 4 in the main domain is brought on the evm through header
J45. The CAN High and Low lines from the SoC are routed through a mux
on the evm. The select lines need to be set for the CAN signals to
reach to its transceiver on the evm. Therefore, add transceiver 3
dt node to add support for this CAN instance.

Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Link: https://lore.kernel.org/r/20240411201747.18697-1-b-kapoor@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts

index 46706907423a37d71ae22c40bc2c86530839adcb..500b70ffe0db454a9aea5086de22c0b2eb1a9bd9 100644 (file)
                        };
                };
        };
+
+       transceiver0: can-phy0 {
+               compatible = "ti,tcan1042";
+               #phy-cells = <0>;
+               max-bitrate = <5000000>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
+               standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_HIGH>;
+       };
+
+       transceiver1: can-phy1 {
+               compatible = "ti,tcan1042";
+               #phy-cells = <0>;
+               max-bitrate = <5000000>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&mcu_mcan1_gpio_pins_default>;
+               standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>;
+       };
+
+       transceiver2: can-phy2 {
+               /* standby pin has been grounded by default */
+               compatible = "ti,tcan1042";
+               #phy-cells = <0>;
+               max-bitrate = <5000000>;
+       };
+
+       transceiver3: can-phy3 {
+               compatible = "ti,tcan1042";
+               #phy-cells = <0>;
+               max-bitrate = <5000000>;
+               standby-gpios = <&exp2 7 GPIO_ACTIVE_HIGH>;
+               mux-states = <&mux1 1>;
+       };
+
+       mux1: mux-controller {
+               compatible = "gpio-mux";
+               #mux-state-cells = <1>;
+               mux-gpios = <&exp2 14 GPIO_ACTIVE_HIGH>;
+       };
 };
 
 &wkup_gpio0 {
                        J784S4_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AH33) MCAN13_RX.I2C4_SDA */
                >;
        };
+
+       main_mcan4_pins_default: main-mcan4-default-pins {
+               pinctrl-single,pins = <
+                       J784S4_IOPAD(0x088, PIN_INPUT, 0) /* (AF36) MCAN4_RX */
+                       J784S4_IOPAD(0x084, PIN_OUTPUT, 0) /* (AG38) MCAN4_TX */
+               >;
+       };
+
+       main_mcan16_pins_default: main-mcan16-default-pins {
+               pinctrl-single,pins = <
+                       J784S4_IOPAD(0x028, PIN_INPUT, 0) /* (AE33) MCAN16_RX */
+                       J784S4_IOPAD(0x024, PIN_OUTPUT, 0) /* (AH34) MCAN16_TX */
+               >;
+       };
 };
 
 &wkup_pmx2 {
                        J784S4_WKUP_IOPAD(0x108, PIN_INPUT, 0) /* (Y36) MCU_ADC1_AIN7 */
                >;
        };
+
+       mcu_mcan0_pins_default: mcu-mcan0-default-pins {
+               pinctrl-single,pins = <
+                       J784S4_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (K33) MCU_MCAN0_TX */
+                       J784S4_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (F38) MCU_MCAN0_RX */
+               >;
+       };
+
+       mcu_mcan1_pins_default: mcu-mcan1-default-pins {
+               pinctrl-single,pins = <
+                       J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (H35) WKUP_GPIO0_4.MCU_MCAN1_TX */
+                       J784S4_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (K36) WKUP_GPIO0_5.MCU_MCAN1_RX */
+               >;
+       };
+
+       mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins {
+               pinctrl-single,pins = <
+                       J784S4_WKUP_IOPAD(0x040, PIN_INPUT, 7) /* (J38) MCU_SPI0_D1.WKUP_GPIO0_69 */
+               >;
+       };
+
+       mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins {
+               pinctrl-single,pins = <
+                       J784S4_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (J35) WKUP_GPIO0_2 */
+               >;
+       };
 };
 
 &wkup_pmx1 {
                };
        };
 };
+
+&mcu_mcan0 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_mcan0_pins_default>;
+       phys = <&transceiver0>;
+};
+
+&mcu_mcan1 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_mcan1_pins_default>;
+       phys = <&transceiver1>;
+};
+
+&main_mcan16 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_mcan16_pins_default>;
+       phys = <&transceiver2>;
+};
+
+&main_mcan4 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_mcan4_pins_default>;
+       phys = <&transceiver3>;
+};