--- /dev/null
+From 3e073367a57d41e506f20aebb98e308387ce3090 Mon Sep 17 00:00:00 2001
+From: Michael Cree <mcree@orcon.net.nz>
+Date: Wed, 1 Sep 2010 11:25:17 -0400
+Subject: alpha: Fix printk format errors
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Michael Cree <mcree@orcon.net.nz>
+
+commit 3e073367a57d41e506f20aebb98e308387ce3090 upstream.
+
+When compiling alpha generic build get errors such as:
+arch/alpha/kernel/err_marvel.c: In function ‘marvel_print_err_cyc’:
+arch/alpha/kernel/err_marvel.c:119: error: format ‘%ld’ expects type ‘long int’, but argument 6 has type ‘u64’
+
+Replaced a number of %ld format specifiers with %lld since u64
+is unsigned long long.
+
+Signed-off-by: Michael Cree <mcree@orcon.net.nz>
+Signed-off-by: Matt Turner <mattst88@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/alpha/kernel/err_marvel.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/alpha/kernel/err_marvel.c
++++ b/arch/alpha/kernel/err_marvel.c
+@@ -109,7 +109,7 @@ marvel_print_err_cyc(u64 err_cyc)
+ #define IO7__ERR_CYC__CYCLE__M (0x7)
+
+ printk("%s Packet In Error: %s\n"
+- "%s Error in %s, cycle %ld%s%s\n",
++ "%s Error in %s, cycle %lld%s%s\n",
+ err_print_prefix,
+ packet_desc[EXTRACT(err_cyc, IO7__ERR_CYC__PACKET)],
+ err_print_prefix,
+@@ -313,7 +313,7 @@ marvel_print_po7_ugbge_sym(u64 ugbge_sym
+ }
+
+ printk("%s Up Hose Garbage Symptom:\n"
+- "%s Source Port: %ld - Dest PID: %ld - OpCode: %s\n",
++ "%s Source Port: %lld - Dest PID: %lld - OpCode: %s\n",
+ err_print_prefix,
+ err_print_prefix,
+ EXTRACT(ugbge_sym, IO7__PO7_UGBGE_SYM__UPH_SRC_PORT),
+@@ -552,7 +552,7 @@ marvel_print_pox_spl_cmplt(u64 spl_cmplt
+ #define IO7__POX_SPLCMPLT__REM_BYTE_COUNT__M (0xfff)
+
+ printk("%s Split Completion Error:\n"
+- "%s Source (Bus:Dev:Func): %ld:%ld:%ld\n",
++ "%s Source (Bus:Dev:Func): %lld:%lld:%lld\n",
+ err_print_prefix,
+ err_print_prefix,
+ EXTRACT(spl_cmplt, IO7__POX_SPLCMPLT__SOURCE_BUS),
--- /dev/null
+From 2e217fac094a083b18cf69f76b09a56e71fb0a2b Mon Sep 17 00:00:00 2001
+From: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Sun, 12 Sep 2010 18:25:19 +0100
+Subject: drm/i915: Ensure that the crtcinfo is populated during mode_fixup()
+
+From: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 897493504addc5609f04a2c4f73c37ab972c29b2 upstream.
+
+This should fix the mysterious mode setting failures reported during
+boot up and after resume, generally for i8xx class machines.
+
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=16478
+Reported-and-tested-by: Xavier Chantry <chantry.xavier@gmail.com>
+Buzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29413
+Tested-by: Daniel Vetter <daniel@ffwll.ch>
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/i915/intel_display.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -2376,11 +2376,19 @@ static bool intel_crtc_mode_fixup(struct
+ struct drm_display_mode *adjusted_mode)
+ {
+ struct drm_device *dev = crtc->dev;
++
+ if (HAS_PCH_SPLIT(dev)) {
+ /* FDI link clock is fixed at 2.7G */
+ if (mode->clock * 3 > 27000 * 4)
+ return MODE_CLOCK_HIGH;
+ }
++
++ /* XXX some encoders set the crtcinfo, others don't.
++ * Obviously we need some form of conflict resolution here...
++ */
++ if (adjusted_mode->crtc_htotal == 0)
++ drm_mode_set_crtcinfo(adjusted_mode, 0);
++
+ return true;
+ }
+