RISC-V: Tweak generic vector COST model

Notice current generic vector cost model make PR112387 failed to vectorize.

Adapt it same as ARM SVE generic vector cost model which can fix it.

Committed as it is obvious fix.

	PR target/112387

gcc/ChangeLog:

	* config/riscv/riscv.cc: Adapt generic cost model same ARM SVE.

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/costmodel/riscv/rvv/pr112387.c: Moved to...
	* gcc.dg/vect/costmodel/riscv/rvv/pr112387-1.c: ...here.
	* gcc.dg/vect/costmodel/riscv/rvv/pr112387-2.c: New test.

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index ab0f95e5fe9e0a56b91052ee71bddadf82c50d64..f60726711e8315029af3b9e88c6c280525a67ba9 100644 (file)
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -355,13 +355,13 @@ static const common_vector_cost generic_vls_vector_cost = {
   1, /* fp_stmt_cost  */
   1, /* gather_load_cost  */
   1, /* scatter_store_cost  */
-  1, /* vec_to_scalar_cost  */
+  2, /* vec_to_scalar_cost  */
   1, /* scalar_to_vec_cost  */
-  1, /* permute_cost  */
-  3, /* align_load_cost  */
-  3, /* align_store_cost  */
-  3, /* unalign_load_cost  */
-  3, /* unalign_store_cost  */
+  2, /* permute_cost  */
+  1, /* align_load_cost  */
+  1, /* align_store_cost  */
+  1, /* unalign_load_cost  */
+  1, /* unalign_store_cost  */
 };
 
 /* Generic costs for VLA vector operations.  */
@@ -371,13 +371,13 @@ static const scalable_vector_cost generic_vla_vector_cost = {
     1, /* fp_stmt_cost  */
     1, /* gather_load_cost  */
     1, /* scatter_store_cost  */
-    1, /* vec_to_scalar_cost  */
+    2, /* vec_to_scalar_cost  */
     1, /* scalar_to_vec_cost  */
-    1, /* permute_cost  */
-    3, /* align_load_cost  */
-    3, /* align_store_cost  */
-    3, /* unalign_load_cost  */
-    3, /* unalign_store_cost  */
+    2, /* permute_cost  */
+    1, /* align_load_cost  */
+    1, /* align_store_cost  */
+    1, /* unalign_load_cost  */
+    1, /* unalign_store_cost  */
   },
 };
 

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387-1.c
similarity index 100%
rename from gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387.c
rename to gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387-1.c

diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387-2.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387-2.c
new file mode 100644 (file)
index 0000000..d9fcad6
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387-2.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -mtune=generic-ooo -O3 -ftree-vectorize -fdump-tree-vect-details" } */
+
+#include <stdint-gcc.h>
+
+void
+f2 (uint64_t *__restrict y, uint64_t *__restrict x,
+    uint64_t *__restrict indices, uint64_t n)
+{
+  for (int64_t i = 0; i < n; ++i)
+    {
+      y[i * 2] = x[indices[i * 2]] + 1;
+      y[i * 2 + 1] = x[indices[i * 2 + 1]] + 2;
+    }
+}
+
+/* { dg-final { scan-tree-dump "Loop contains only SLP stmts" vect } } */
+/* { dg-final { scan-assembler-not "vlseg" } } */
+/* { dg-final { scan-assembler-not "vsseg" } } */