]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: exynos: Add initial support for Samsung Galaxy S20 (x1slte)
authorUmer Uddin <umer.uddin@mentallysanemainliners.org>
Mon, 9 Dec 2024 08:00:59 +0000 (08:00 +0000)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 9 Dec 2024 19:50:57 +0000 (20:50 +0100)
Add initial support for the Samsung Galaxy S20 (x1slte/SM-G980F)
phone. It was launched in 2020, and it's based on the Exynos 990 SoC. It
has only one configuration with 8GB of RAM and 128GB of UFS 3.0 storage.

This device tree adds support for the following:

- SimpleFB
- 8GB RAM
- Buttons

Signed-off-by: Umer Uddin <umer.uddin@mentallysanemainliners.org>
Link: https://lore.kernel.org/r/20241209080059.11891-5-umer.uddin@mentallysanemainliners.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm64/boot/dts/exynos/Makefile
arch/arm64/boot/dts/exynos/exynos990-x1slte.dts [new file with mode: 0644]

index fe47aafcda0da665497e914691579545aace9697..ee73e1a2db7ea64a0b8e9067a1a264e366f59bc3 100644 (file)
@@ -11,5 +11,6 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \
        exynos990-c1s.dtb               \
        exynos990-r8s.dtb               \
        exynos990-x1s.dtb               \
+       exynos990-x1slte.dtb            \
        exynosautov9-sadk.dtb           \
        exynosautov920-sadk.dtb
diff --git a/arch/arm64/boot/dts/exynos/exynos990-x1slte.dts b/arch/arm64/boot/dts/exynos/exynos990-x1slte.dts
new file mode 100644 (file)
index 0000000..d372099
--- /dev/null
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
+/*
+ * Samsung Galaxy S20 (x1slte/SM-G980F) device tree source
+ *
+ * Copyright (c) 2024, Umer Uddin <umer.uddin@mentallysanemainliners.org>
+ */
+
+/dts-v1/;
+#include "exynos990-x1s-common.dtsi"
+
+/ {
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       model = "Samsung Galaxy S20";
+       compatible = "samsung,x1slte", "samsung,exynos990";
+
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0x0 0x80000000 0x0 0x3ab00000>,
+                     /* Memory hole */
+                     <0x0 0xc1200000 0x0 0x1ee00000>,
+                     /* Memory hole */
+                     <0x0 0xe1900000 0x0 0x1e700000>,
+                     /* Memory hole */
+                     <0x8 0x80000000 0x1 0x7ec00000>;
+       };
+};