s390x: disasm-test: add forgotten opcodes SRNMT, LDE, and LDER

diff --git a/none/tests/s390x/disasm-test/disasm-test.post.exp b/none/tests/s390x/disasm-test/disasm-test.post.exp
index 34722229c02ed5ed4fa9eb759a60ea80a6131541..0f31f36ca6872f704d510dce3d739df4c6613e12 100644 (file)
--- a/none/tests/s390x/disasm-test/disasm-test.post.exp
+++ b/none/tests/s390x/disasm-test/disasm-test.post.exp
@@ -1,4 +1,4 @@
-Total: 148751 tests generated
-Total: 148659 insns verified
+Total: 148776 tests generated
+Total: 148684 insns verified
 Total:      0 disassembly mismatches
 Total:     92 specification exceptions

diff --git a/none/tests/s390x/disasm-test/opcode.c b/none/tests/s390x/disasm-test/opcode.c
index ef064913343914eec3b5a3375cebc4419068d137..e98a5e9e5ebea8d824fcb593cbd6290862606f29 100644 (file)
--- a/none/tests/s390x/disasm-test/opcode.c
+++ b/none/tests/s390x/disasm-test/opcode.c
@@ -965,6 +965,7 @@ static const char *opcodes[] = {
    "pfpo",                         // pfpo
    "srnm   d12(b2)",
    "srnmb  d12(b2)",               // fpext
+   "srnmt  d12(b2)",
    "sfpc   r1",
    // sfasr  not implemented
    "ste    f1,d12(x2,b2)",
@@ -976,6 +977,8 @@ static const char *opcodes[] = {
    // Chapter 10: Control Instructions                      not implemented
    // Chapter 14: I/O Instructions                          not implemented
    // Chapter 18: Hexadecimal-Floating-Point Instructions   not implemented
+   "lder    f1,f2",
+   "lde     f1,d12(x2,b2)",
 
    // Chapter 19: Binary-Floating-Point Instructions
    // Register pairs: 0-2 1-3 4-6 5-7 8-10 9-11 12-14 13-15