.27 patches

diff --git a/queue-2.6.27/arm-tighten-check-for-allowable-cpsr-values.patch b/queue-2.6.27/arm-tighten-check-for-allowable-cpsr-values.patch
new file mode 100644 (file)
index 0000000..c3ec8fb
--- /dev/null
+++ b/queue-2.6.27/arm-tighten-check-for-allowable-cpsr-values.patch
@@ -0,0 +1,52 @@
+From 41e2e8fd34fff909a0e40129f6ac4233ecfa67a9 Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@arm.linux.org.uk>
+Date: Fri, 13 Aug 2010 23:33:46 +0100
+Subject: ARM: Tighten check for allowable CPSR values
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Russell King <rmk+kernel@arm.linux.org.uk>
+
+commit 41e2e8fd34fff909a0e40129f6ac4233ecfa67a9 upstream.
+
+Reviewed-by: Arve Hjønnevåg <arve@android.com>
+Acked-by: Dima Zavin <dima@android.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/arm/include/asm/ptrace.h |   17 +++++++++++++----
+ 1 file changed, 13 insertions(+), 4 deletions(-)
+
+--- a/arch/arm/include/asm/ptrace.h
++++ b/arch/arm/include/asm/ptrace.h
+@@ -124,15 +124,24 @@ struct pt_regs {
+  */
+ static inline int valid_user_regs(struct pt_regs *regs)
+ {
+-      if (user_mode(regs) && (regs->ARM_cpsr & PSR_I_BIT) == 0) {
+-              regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
+-              return 1;
++      unsigned long mode = regs->ARM_cpsr & MODE_MASK;
++
++      /*
++       * Always clear the F (FIQ) and A (delayed abort) bits
++       */
++      regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
++
++      if ((regs->ARM_cpsr & PSR_I_BIT) == 0) {
++              if (mode == USR_MODE)
++                      return 1;
++              if (elf_hwcap & HWCAP_26BIT && mode == USR26_MODE)
++                      return 1;
+       }
+ 
+       /*
+        * Force CPSR to something logical...
+        */
+-      regs->ARM_cpsr &= PSR_f | PSR_s | (PSR_x & ~PSR_A_BIT) | PSR_T_BIT | MODE32_BIT;
++      regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
+       if (!(elf_hwcap & HWCAP_26BIT))
+               regs->ARM_cpsr |= USR_MODE;
+ 

diff --git a/queue-2.6.27/series b/queue-2.6.27/series
new file mode 100644 (file)
index 0000000..f228322
--- /dev/null
+++ b/queue-2.6.27/series
@@ -0,0 +1 @@
+arm-tighten-check-for-allowable-cpsr-values.patch