]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
authorJakub Kicinski <kuba@kernel.org>
Thu, 8 Aug 2024 21:03:51 +0000 (14:03 -0700)
committerJakub Kicinski <kuba@kernel.org>
Fri, 16 Aug 2024 00:18:52 +0000 (17:18 -0700)
Cross-merge networking fixes after downstream PR.

Conflicts:

Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml
  c25504a0ba36 ("dt-bindings: net: fsl,qoriq-mc-dpmac: add missed property phys")
  be034ee6c33d ("dt-bindings: net: fsl,qoriq-mc-dpmac: using unevaluatedProperties")
https://lore.kernel.org/20240815110934.56ae623a@canb.auug.org.au

drivers/net/dsa/vitesse-vsc73xx-core.c
  5b9eebc2c7a5 ("net: dsa: vsc73xx: pass value in phy_write operation")
  fa63c6434b6f ("net: dsa: vsc73xx: check busy flag in MDIO operations")
  2524d6c28bdc ("net: dsa: vsc73xx: use defined values in phy operations")
https://lore.kernel.org/20240813104039.429b9fe6@canb.auug.org.au
Resolve by using FIELD_PREP(), Stephen's resolution is simpler.

Adjacent changes:

net/vmw_vsock/af_vsock.c
  69139d2919dd ("vsock: fix recursive ->recvmsg calls")
  744500d81f81 ("vsock: add support for SIOCOUTQ ioctl")

Link: https://patch.msgid.link/20240815141149.33862-1-pabeni@redhat.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
1  2 
Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml
MAINTAINERS
drivers/net/dsa/vitesse-vsc73xx-core.c
drivers/net/ethernet/cadence/macb_main.c
drivers/net/ethernet/mellanox/mlx5/core/en.h
drivers/net/ethernet/xilinx/xilinx_axienet.h
drivers/net/phy/vitesse.c
include/net/af_vsock.h
net/vmw_vsock/af_vsock.c

index f19c4fa66f18b35e653da05f90172ff18dcffb41,42f9843d1868ac1177589e396527847e4b04e567..be8a2163b73edb1f74dd86bba37ebb2e2e520514
@@@ -30,6 -36,12 +30,10 @@@ properties
        A reference to a node representing a PCS PHY device found on
        the internal MDIO bus.
  
 -  managed: true
 -
+   phys:
+     description: A reference to the SerDes lane(s)
+     maxItems: 1
  required:
    - reg
  
diff --cc MAINTAINERS
Simple merge
index a82b550a9e40f39bb4a4d0c029ddf436e5b823ca,e3f95d2cc2c1689557f463edcdea4f4fb559f6a2..4d693c029c1ff3ba80a809742631005d931b2a7f
  #define VSC73XX_VLANACCESS_VLAN_TBL_CMD_CLEAR_TABLE   3
  
  /* MII block 3 registers */
 -#define VSC73XX_MII_STAT      0x0
 -#define VSC73XX_MII_CMD               0x1
 -#define VSC73XX_MII_DATA      0x2
 +#define VSC73XX_MII_STAT              0x0
 +#define VSC73XX_MII_CMD                       0x1
 +#define VSC73XX_MII_DATA              0x2
 +#define VSC73XX_MII_MPRES             0x3
 +
 +#define VSC73XX_MII_STAT_BUSY         BIT(3)
 +#define VSC73XX_MII_STAT_READ         BIT(2)
 +#define VSC73XX_MII_STAT_WRITE                BIT(1)
 +
 +#define VSC73XX_MII_CMD_SCAN          BIT(27)
 +#define VSC73XX_MII_CMD_OPERATION     BIT(26)
 +#define VSC73XX_MII_CMD_PHY_ADDR      GENMASK(25, 21)
 +#define VSC73XX_MII_CMD_PHY_REG               GENMASK(20, 16)
 +#define VSC73XX_MII_CMD_WRITE_DATA    GENMASK(15, 0)
 +
 +#define VSC73XX_MII_DATA_FAILURE      BIT(16)
 +#define VSC73XX_MII_DATA_READ_DATA    GENMASK(15, 0)
 +
 +#define VSC73XX_MII_MPRES_NOPREAMBLE  BIT(6)
 +#define VSC73XX_MII_MPRES_PRESCALEVAL GENMASK(5, 0)
 +#define VSC73XX_MII_PRESCALEVAL_MIN   3 /* min allowed mdio clock prescaler */
  
+ #define VSC73XX_MII_STAT_BUSY BIT(3)
  /* Arbiter block 5 registers */
  #define VSC73XX_ARBEMPTY              0x0c
  #define VSC73XX_ARBDISC                       0x0e
@@@ -557,20 -557,24 +576,28 @@@ static int vsc73xx_phy_read(struct dsa_
        u32 val;
        int ret;
  
+       ret = vsc73xx_mdio_busy_check(vsc);
+       if (ret)
+               return ret;
        /* Setting bit 26 means "read" */
 -      cmd = BIT(26) | (phy << 21) | (regnum << 16);
 -      ret = vsc73xx_write(vsc, VSC73XX_BLOCK_MII, 0, 1, cmd);
 +      cmd = VSC73XX_MII_CMD_OPERATION |
 +            FIELD_PREP(VSC73XX_MII_CMD_PHY_ADDR, phy) |
 +            FIELD_PREP(VSC73XX_MII_CMD_PHY_REG, regnum);
 +      ret = vsc73xx_write(vsc, VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL,
 +                          VSC73XX_MII_CMD, cmd);
        if (ret)
                return ret;
-       msleep(2);
+       ret = vsc73xx_mdio_busy_check(vsc);
+       if (ret)
+               return ret;
 -      ret = vsc73xx_read(vsc, VSC73XX_BLOCK_MII, 0, 2, &val);
 +      ret = vsc73xx_read(vsc, VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL,
 +                         VSC73XX_MII_DATA, &val);
        if (ret)
                return ret;
 -      if (val & BIT(16)) {
 +      if (val & VSC73XX_MII_DATA_FAILURE) {
                dev_err(vsc->dev, "reading reg %02x from phy%d failed\n",
                        regnum, phy);
                return -EIO;
@@@ -590,21 -594,12 +617,15 @@@ static int vsc73xx_phy_write(struct dsa
        u32 cmd;
        int ret;
  
-       /* It was found through tedious experiments that this router
-        * chip really hates to have it's PHYs reset. They
-        * never recover if that happens: autonegotiation stops
-        * working after a reset. Just filter out this command.
-        * (Resetting the whole chip is OK.)
-        */
-       if (regnum == 0 && (val & BIT(15))) {
-               dev_info(vsc->dev, "reset PHY - disallowed\n");
-               return 0;
-       }
+       ret = vsc73xx_mdio_busy_check(vsc);
+       if (ret)
+               return ret;
  
 -      cmd = (phy << 21) | (regnum << 16) | val;
 -      ret = vsc73xx_write(vsc, VSC73XX_BLOCK_MII, 0, 1, cmd);
 +      cmd = FIELD_PREP(VSC73XX_MII_CMD_PHY_ADDR, phy) |
-             FIELD_PREP(VSC73XX_MII_CMD_PHY_REG, regnum);
++            FIELD_PREP(VSC73XX_MII_CMD_PHY_REG, regnum) |
++            FIELD_PREP(VSC73XX_MII_CMD_WRITE_DATA, val);
 +      ret = vsc73xx_write(vsc, VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL,
 +                          VSC73XX_MII_CMD, cmd);
        if (ret)
                return ret;
  
index 67ac4a2756ca2b85dd889e78166886dd2f8d3d1d,3b5fcaf0dd36db1667e77428a4fbe912cdd8ef82..54eb4e8377c447b90c2c9a1e0790119cbbc53268
@@@ -526,44 -434,32 +516,40 @@@ static struct phy_driver vsc82xx_driver
        .phy_id_mask    = 0x000ffff0,
        /* PHY_GBIT_FEATURES */
        .config_init    = vsc738x_config_init,
-       .config_aneg    = vsc73xx_config_aneg,
        .read_page      = vsc73xx_read_page,
        .write_page     = vsc73xx_write_page,
 +      .get_tunable    = vsc73xx_get_tunable,
 +      .set_tunable    = vsc73xx_set_tunable,
  }, {
        .phy_id         = PHY_ID_VSC7388,
        .name           = "Vitesse VSC7388",
        .phy_id_mask    = 0x000ffff0,
        /* PHY_GBIT_FEATURES */
        .config_init    = vsc738x_config_init,
-       .config_aneg    = vsc73xx_config_aneg,
        .read_page      = vsc73xx_read_page,
        .write_page     = vsc73xx_write_page,
 +      .get_tunable    = vsc73xx_get_tunable,
 +      .set_tunable    = vsc73xx_set_tunable,
  }, {
        .phy_id         = PHY_ID_VSC7395,
        .name           = "Vitesse VSC7395",
        .phy_id_mask    = 0x000ffff0,
        /* PHY_GBIT_FEATURES */
        .config_init    = vsc739x_config_init,
-       .config_aneg    = vsc73xx_config_aneg,
        .read_page      = vsc73xx_read_page,
        .write_page     = vsc73xx_write_page,
 +      .get_tunable    = vsc73xx_get_tunable,
 +      .set_tunable    = vsc73xx_set_tunable,
  }, {
        .phy_id         = PHY_ID_VSC7398,
        .name           = "Vitesse VSC7398",
        .phy_id_mask    = 0x000ffff0,
        /* PHY_GBIT_FEATURES */
        .config_init    = vsc739x_config_init,
-       .config_aneg    = vsc73xx_config_aneg,
        .read_page      = vsc73xx_read_page,
        .write_page     = vsc73xx_write_page,
 +      .get_tunable    = vsc73xx_get_tunable,
 +      .set_tunable    = vsc73xx_set_tunable,
  }, {
        .phy_id         = PHY_ID_VSC8662,
        .name           = "Vitesse VSC8662",
Simple merge
Simple merge