--- /dev/null
+From joerg.roedel@amd.com Wed Apr 11 15:50:04 2012
+From: Joerg Roedel <joerg.roedel@amd.com>
+Date: Wed, 11 Apr 2012 18:40:38 +0200
+Subject: iommu/amd: Make sure IOMMU interrupts are re-enabled on resume
+To: Greg KH <gregkh@linuxfoundation.org>
+Message-ID: <20120411164038.GK2428@amd.com>
+Content-Disposition: inline
+
+From: Joerg Roedel <joerg.roedel@amd.com>
+
+commit 9ddd592a191b32f2ee6c4b6ed2bd52665c3a49f5 upstream
+
+Unfortunatly the interrupts for the event log and the
+peripheral page-faults are only enabled at boot but not
+re-enabled at resume. Fix that for 3.2.
+
+Cc: stable@vger.kernel.org
+Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
+---
+ drivers/iommu/amd_iommu_init.c | 24 +++++++++++++++++-------
+ 1 file changed, 17 insertions(+), 7 deletions(-)
+
+--- a/drivers/iommu/amd_iommu_init.c
++++ b/drivers/iommu/amd_iommu_init.c
+@@ -1033,8 +1033,9 @@ static int iommu_setup_msi(struct amd_io
+ {
+ int r;
+
+- if (pci_enable_msi(iommu->dev))
+- return 1;
++ r = pci_enable_msi(iommu->dev);
++ if (r)
++ return r;
+
+ r = request_threaded_irq(iommu->dev->irq,
+ amd_iommu_int_handler,
+@@ -1044,24 +1045,33 @@ static int iommu_setup_msi(struct amd_io
+
+ if (r) {
+ pci_disable_msi(iommu->dev);
+- return 1;
++ return r;
+ }
+
+ iommu->int_enabled = true;
+- iommu_feature_enable(iommu, CONTROL_EVT_INT_EN);
+
+ return 0;
+ }
+
+ static int iommu_init_msi(struct amd_iommu *iommu)
+ {
++ int ret;
++
+ if (iommu->int_enabled)
+- return 0;
++ goto enable_faults;
+
+ if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSI))
+- return iommu_setup_msi(iommu);
++ ret = iommu_setup_msi(iommu);
++ else
++ ret = -ENODEV;
++
++ if (ret)
++ return ret;
+
+- return 1;
++enable_faults:
++ iommu_feature_enable(iommu, CONTROL_EVT_INT_EN);
++
++ return 0;
+ }
+
+ /****************************************************************************